mirror of
https://github.com/RT-Thread/rt-thread.git
synced 2026-09-20 17:44:20 +08:00
fix ls2k libc and irq
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@@ -39,7 +39,7 @@ void rt_hw_interrupt_enable(rt_base_t level)
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/**
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* exception handle table
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*/
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#define RT_EXCEPTION_MAX 31
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#define RT_EXCEPTION_MAX 31
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exception_func_t sys_exception_handlers[RT_EXCEPTION_MAX];
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/**
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@@ -59,10 +59,13 @@ exception_func_t rt_set_except_vector(int n, exception_func_t func)
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return old_handler;
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}
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void mips_dump_regs(struct pt_regs *regs) {
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void mips_dump_regs(struct pt_regs *regs)
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{
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int i, j;
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for(i = 0; i < 32 / 4; i++) {
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for(j = 0; j < 4; j++) {
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for (i = 0; i < 32 / 4; i++)
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{
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for (j = 0; j < 4; j++)
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{
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int reg = 4 * i + j;
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rt_kprintf("%d: 0x%08x, ", reg, regs->regs[reg]);
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}
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@@ -84,9 +87,10 @@ void cache_error_handler(void)
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static void unhandled_exception_handle(struct pt_regs *regs)
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{
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rt_kprintf("Unknown Exception, EPC: 0x%08x, CAUSE: 0x%08x\n", read_c0_epc(), read_c0_cause());
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rt_kprintf("ST0: 0x%08x ",regs->cp0_status);
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rt_kprintf("ErrorPC: 0x%08x\n",read_c0_errorepc());
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rt_kprintf("Unknown Exception, EPC: 0x%08x, CAUSE: 0x%08x\n", read_c0_epc(),
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read_c0_cause());
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rt_kprintf("ST0: 0x%08x ", regs->cp0_status);
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rt_kprintf("ErrorPC: 0x%08x\n", read_c0_errorepc());
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mips_dump_regs(regs);
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rt_hw_cpu_shutdown();
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}
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@@ -95,8 +99,9 @@ static void install_default_exception_handler(void)
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{
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rt_int32_t i;
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for (i=0; i<RT_EXCEPTION_MAX; i++)
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sys_exception_handlers[i] = (exception_func_t)unhandled_exception_handle;
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for (i = 0; i < RT_EXCEPTION_MAX; i++)
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sys_exception_handlers[i] =
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(exception_func_t)unhandled_exception_handle;
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}
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int rt_hw_exception_init(void)
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@@ -117,14 +122,16 @@ int rt_hw_exception_init(void)
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void rt_general_exc_dispatch(struct pt_regs *regs)
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{
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rt_ubase_t exccode = 0;
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rt_ubase_t cause, exccode;
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cause = read_c0_cause();
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exccode = (cause & CAUSEF_EXCCODE) >> CAUSEB_EXCCODE;
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if (exccode == 0) {
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if (exccode == 0)
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{
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rt_ubase_t status, pending;
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status = read_c0_status();
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pending = (CAUSEF_IP) & (status & ST0_IM);
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status = read_c0_status();
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pending = (cause & CAUSEF_IP) & (status & ST0_IM);
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if (pending & CAUSEF_IP0)
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rt_do_mips_cpu_irq(0);
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if (pending & CAUSEF_IP1)
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@@ -141,7 +148,9 @@ void rt_general_exc_dispatch(struct pt_regs *regs)
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rt_do_mips_cpu_irq(6);
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if (pending & CAUSEF_IP7)
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rt_do_mips_cpu_irq(7);
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} else {
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}
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else
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{
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if (sys_exception_handlers[exccode])
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sys_exception_handlers[exccode](regs);
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}
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