From 1e10891f372c0c28e15c59a28eb3b5da8e23b96c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=E5=91=A8=E4=BC=A0=E7=A6=8F?= <46174387+zhouchuanfu@users.noreply.github.com> Date: Wed, 22 May 2019 09:48:13 +0800 Subject: [PATCH] Update drv_usart.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 修复dma_config里面rcc的bug。 --- bsp/stm32/libraries/HAL_Drivers/drv_usart.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_usart.c b/bsp/stm32/libraries/HAL_Drivers/drv_usart.c index b07ed98c1c..bc6dfd0d95 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_usart.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_usart.c @@ -660,12 +660,12 @@ static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag) #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) \ || defined(SOC_SERIES_STM32L0) /* enable DMA clock && Delay after an RCC peripheral clock enabling*/ - SET_BIT(RCC->AHBENR, uart->config->dma_rx->dma_rcc); - tmpreg = READ_BIT(RCC->AHBENR, uart->config->dma_rx->dma_rcc); + SET_BIT(RCC->AHBENR, dma_config->dma_rcc); + tmpreg = READ_BIT(RCC->AHBENR, dma_config->dma_rcc); #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) /* enable DMA clock && Delay after an RCC peripheral clock enabling*/ - SET_BIT(RCC->AHB1ENR, uart->config->dma_rx->dma_rcc); - tmpreg = READ_BIT(RCC->AHB1ENR, uart->config->dma_rx->dma_rcc); + SET_BIT(RCC->AHB1ENR, dma_config->dma_rcc); + tmpreg = READ_BIT(RCC->AHB1ENR, dma_config->dma_rcc); #endif UNUSED(tmpreg); /* To avoid compiler warnings */ }