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https://github.com/RT-Thread/rt-thread.git
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[components][drivers][mmc] add HS400 support to mmc driver
- added HS400 supprt (both eMMC5.0 and eMMC5.1 flavor are supported) Signed-off-by: Fan YANG <fan.yang@hpmicro.com>
This commit is contained in:
@@ -1,11 +1,12 @@
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2015-06-15 hichard first version
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* 2015-06-15 hichard first version
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* 2024-05-25 HPMicro add strobe support
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*/
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#ifndef __MMC_H__
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@@ -45,6 +46,7 @@ extern "C" {
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#define EXT_CSD_PART_CONFIG 179 /* R/W */
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#define EXT_CSD_ERASED_MEM_CONT 181 /* RO */
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#define EXT_CSD_BUS_WIDTH 183 /* R/W */
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#define EXT_CSD_STROBE_SUPPORT 184 /* RO */
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#define EXT_CSD_HS_TIMING 185 /* R/W */
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#define EXT_CSD_POWER_CLASS 187 /* R/W */
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#define EXT_CSD_REV 192 /* RO */
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@@ -130,8 +132,9 @@ extern "C" {
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#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
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#define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */
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#define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */
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#define EXT_CSD_DDR_BUS_WIDTH_8_EH_DS 0x86/* Card is in 8 bit DDR mode with Enhanced Data Strobe */
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#define EXT_CSD_TIMING_BC 0 /* Backwards compatility */
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#define EXT_CSD_TIMING_BC 0 /* Backwards compatibility */
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#define EXT_CSD_TIMING_HS 1 /* High speed */
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#define EXT_CSD_TIMING_HS200 2 /* HS200 */
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#define EXT_CSD_TIMING_HS400 3 /* HS400 */
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@@ -1,11 +1,12 @@
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2011-07-25 weety first version
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* 2011-07-25 weety first version
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* 2024-05-24 HPMicro add HS400 support
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*/
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#ifndef __MMCSD_CARD_H__
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@@ -130,6 +131,7 @@ struct rt_sdio_function {
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struct rt_mmc_ext_csd
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{
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rt_uint32_t cache_size;
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rt_uint32_t enhanced_data_strobe;
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};
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struct rt_mmcsd_card {
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@@ -156,13 +158,14 @@ struct rt_mmcsd_card {
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#define CARD_FLAG_HIGHSPEED (1 << 0) /* SDIO bus speed 50MHz */
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#define CARD_FLAG_SDHC (1 << 1) /* SDHC card */
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#define CARD_FLAG_SDXC (1 << 2) /* SDXC card */
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#define CARD_FLAG_HIGHSPEED_DDR (1 << 3) /*HIGH SPEED DDR*/
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#define CARD_FLAG_HS200 (1 << 4) /* BUS SPEED 200mHz*/
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#define CARD_FLAG_HIGHSPEED_DDR (1 << 3) /* HIGH SPEED DDR */
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#define CARD_FLAG_HS200 (1 << 4) /* BUS SPEED 200MHz */
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#define CARD_FLAG_HS400 (1 << 5) /* BUS SPEED 400MHz */
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struct rt_sd_scr scr;
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struct rt_mmcsd_csd csd;
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rt_uint32_t hs_max_data_rate; /* max data transfer rate in high speed mode */
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rt_uint8_t sdio_function_num; /* totol number of SDIO functions */
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rt_uint8_t sdio_function_num; /* total number of SDIO functions */
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struct rt_sdio_cccr cccr; /* common card info */
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struct rt_sdio_cis cis; /* common tuple info */
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struct rt_sdio_function *sdio_function[SDIO_MAX_FUNCTIONS + 1]; /* SDIO functions (devices) */
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@@ -1,11 +1,12 @@
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2011-07-25 weety first version
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* 2011-07-25 weety first version
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* 2024-05-25 HPMicro add HS400 support
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*/
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#ifndef __HOST_H__
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@@ -60,6 +61,7 @@ struct rt_mmcsd_io_cfg
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#define MMCSD_TIMING_MMC_DDR52 8
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#define MMCSD_TIMING_MMC_HS200 9
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#define MMCSD_TIMING_MMC_HS400 10
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#define MMCSD_TIMING_MMC_HS400_ENH_DS 11
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unsigned char drv_type; /* driver type (A, B, C, D) */
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@@ -120,15 +122,19 @@ struct rt_mmcsd_host
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#define MMCSD_HOST_IS_SPI (1 << 3)
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#define controller_is_spi(host) (host->flags & MMCSD_HOST_IS_SPI)
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#define MMCSD_SUP_SDIO_IRQ (1 << 4) /* support signal pending SDIO IRQs */
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#define MMCSD_SUP_HIGHSPEED (1 << 5) /* support high speed SDR*/
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#define MMCSD_SUP_HIGHSPEED (1 << 5) /* support high speed SDR */
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#define MMCSD_SUP_DDR_3V3 (1 << 6)
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#define MMCSD_SUP_DDR_1V8 (1 << 7)
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#define MMCSD_SUP_DDR_1V2 (1 << 8)
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#define MMCSD_SUP_HIGHSPEED_DDR (MMCSD_SUP_DDR_3V3 | MMCSD_SUP_DDR_1V8 | MMCSD_SUP_DDR_1V2)/* HIGH SPEED DDR*/
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#define MMCSD_SUP_HIGHSPEED_DDR (MMCSD_SUP_DDR_3V3 | MMCSD_SUP_DDR_1V8 | MMCSD_SUP_DDR_1V2)/* HIGH SPEED DDR */
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#define MMCSD_SUP_HS200_1V8 (1 << 9)
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#define MMCSD_SUP_HS200_1V2 (1 << 10)
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#define MMCSD_SUP_HS200 (MMCSD_SUP_HS200_1V2 | MMCSD_SUP_HS200_1V8) /* hs200 sdr */
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#define MMCSD_SUP_NONREMOVABLE (1 << 11)
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#define MMCSD_SUP_HS400_1V8 (1 << 12)
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#define MMCSD_SUP_HS400_1V2 (1 << 13)
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#define MMCSD_SUP_HS400 (MMCSD_SUP_HS400_1V2 | MMCSD_SUP_HS400_1V8) /* hs400 ddr */
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#define MMCSD_SUP_ENH_DS (1 << 14)
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rt_uint32_t max_seg_size; /* maximum size of one dma segment */
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rt_uint32_t max_dma_segs; /* maximum number of dma segments in one request */
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