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wangjiyang added bsp/evb4020 & modified libcpu/arm/sep4020

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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1128 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
wangjiyang
2010-11-28 08:11:24 +00:00
parent 8732a6feb8
commit 08668dc481
5 changed files with 619 additions and 351 deletions
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libcpu/arm/sep4020/cpu.c
+190 -42
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@@ -1,42 +1,190 @@
/*
* File : cpu.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2006-08-23 Bernard first version
*/
#include <rtthread.h>
/**
* @addtogroup AT91SAM7X
*/
/*@{*/
/**
* this function will reset CPU
*
*/
void rt_hw_cpu_reset()
{
}
/**
* this function will shutdown CPU
*
*/
void rt_hw_cpu_shutdown()
{
rt_kprintf("shutdown...\n");
while (1);
}
/*@}*/
/*
* File : cpu.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://openlab.rt-thread.com/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2006-03-13 Bernard first version
*/
#include <rtthread.h>
#include <sep4020.h>
extern rt_uint32_t rt_hw_interrupt_disable(void);
//TODO
#warning I DON'T KNOW IF THE MMU OPERATION WORKS ON SEP4020
/**
* @addtogroup S3C24X0
*/
/*@{*/
#define ICACHE_MASK (rt_uint32_t)(1 << 12)
#define DCACHE_MASK (rt_uint32_t)(1 << 2)
#ifdef __GNUC__
rt_inline rt_uint32_t cp15_rd(void)
{
rt_uint32_t i;
asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
return i;
}
rt_inline void cache_enable(rt_uint32_t bit)
{
__asm__ __volatile__( \
"mrc p15,0,r0,c1,c0,0\n\t" \
"orr r0,r0,%0\n\t" \
"mcr p15,0,r0,c1,c0,0" \
: \
:"r" (bit) \
:"memory");
}
rt_inline void cache_disable(rt_uint32_t bit)
{
__asm__ __volatile__( \
"mrc p15,0,r0,c1,c0,0\n\t" \
"bic r0,r0,%0\n\t" \
"mcr p15,0,r0,c1,c0,0" \
: \
:"r" (bit) \
:"memory");
}
#endif
#ifdef __CC_ARM
rt_inline rt_uint32_t cp15_rd(void)
{
rt_uint32_t i;
__asm
{
mrc p15, 0, i, c1, c0, 0
}
return i;
}
rt_inline void cache_enable(rt_uint32_t bit)
{
rt_uint32_t value;
__asm
{
mrc p15, 0, value, c1, c0, 0
orr value, value, bit
mcr p15, 0, value, c1, c0, 0
}
}
rt_inline void cache_disable(rt_uint32_t bit)
{
rt_uint32_t value;
__asm
{
mrc p15, 0, value, c1, c0, 0
bic value, value, bit
mcr p15, 0, value, c1, c0, 0
}
}
#endif
/**
* enable I-Cache
*
*/
void rt_hw_cpu_icache_enable()
{
cache_enable(ICACHE_MASK);
}
/**
* disable I-Cache
*
*/
void rt_hw_cpu_icache_disable()
{
cache_disable(ICACHE_MASK);
}
/**
* return the status of I-Cache
*
*/
rt_base_t rt_hw_cpu_icache_status()
{
return (cp15_rd() & ICACHE_MASK);
}
/**
* enable D-Cache
*
*/
void rt_hw_cpu_dcache_enable()
{
cache_enable(DCACHE_MASK);
}
/**
* disable D-Cache
*
*/
void rt_hw_cpu_dcache_disable()
{
cache_disable(DCACHE_MASK);
}
/**
* return the status of D-Cache
*
*/
rt_base_t rt_hw_cpu_dcache_status()
{
return (cp15_rd() & DCACHE_MASK);
}
/**
* reset cpu by dog's time-out
*
*/
void rt_hw_cpu_reset()
{
/* enable watchdog */
*(RP)(RTC_CTR) = 0x02;
/*Enable watchdog reset*/
*(RP)(RTC_INT_EN) = 0x20;
/* Initialize watchdog timer count register */
*(RP)(RTC_WD_CNT) = 0x0001;
while(1); /* loop forever and wait for reset to happen */
/* NEVER REACHED */
}
/**
* shutdown CPU
*
*/
void rt_hw_cpu_shutdown()
{
rt_uint32_t UNUSED level;
rt_kprintf("shutdown...\n");
level = rt_hw_interrupt_disable();
RT_ASSERT(RT_NULL);
}
/*@}*/
libcpu/arm/sep4020/interrupt.c
+46 -31
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@@ -9,30 +9,30 @@
*
* Change Logs:
* Date Author Notes
* 2006-08-23 Bernard first version
* 2010-03-17 zchong SEP4020
* 2006-03-13 Bernard first version
*/
#include <rtthread.h>
#include "sep4020.h"
#include <sep4020.h>
#define MAX_HANDLERS 32
extern rt_uint32_t rt_interrupt_nest;
extern rt_uint32_t rt_interrupt_nest;
/* exception and interrupt handler table */
/* exception and interrupt handler table */
rt_isr_handler_t isr_table[MAX_HANDLERS];
rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
rt_uint32_t rt_thread_switch_interrput_flag;
/**
* @addtogroup SEP4020
* @addtogroup S3C24X0
*/
/*@{*/
void rt_hw_interrupt_handler(int vector)
rt_isr_handler_t rt_hw_interrupt_handle(rt_uint32_t vector)
{
rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
return RT_NULL;
}
/**
@@ -42,16 +42,33 @@ void rt_hw_interrupt_init()
{
register rt_uint32_t idx;
/* disable all interrupts */
INTC_IER = 0x0;
/*Make sure all intc registers in proper state*/
/* mask all interrupts */
INTC_IMR = 0xFFFFFFFF;
/*mask all the irq*/
*(RP)(INTC_IMR) = 0xFFFFFFFF;
/*enable all the irq*/
*(RP)(INTC_IER) = 0XFFFFFFFF;
/*Dont use any forced irq*/
*(RP)(INTC_IFR) = 0x0;
/*Disable all the fiq*/
*(RP)(INTC_FIER) = 0x0;
/*Mask all the fiq*/
*(RP)(INTC_FIMR) = 0x0F;
/*Dont use forced fiq*/
*(RP)(INTC_FIFR) = 0x0;
/*Intrrupt priority register*/
*(RP)(INTC_IPLR) = 0x0;
/* init exceptions table */
for(idx=0; idx < MAX_HANDLERS; idx++)
{
isr_table[idx] = (rt_isr_handler_t)rt_hw_interrupt_handler;
/* init exceptions table */
for(idx=0; idx < MAX_HANDLERS; idx++)
{
isr_table[idx] = (rt_isr_handler_t)rt_hw_interrupt_handle;
}
/* init interrupt nest, and context in thread sp */
@@ -65,29 +82,25 @@ void rt_hw_interrupt_init()
* This function will mask a interrupt.
* @param vector the interrupt number
*/
void rt_hw_interrupt_mask(int vector)
{
INTC_IMR |= 1 << vector;
void rt_hw_interrupt_mask(rt_uint32_t vector)
{
*(RP)(INTC_IMR) |= 1 << vector;
}
/**
* This function will un-mask a interrupt.
* @param vector the interrupt number
*/
void rt_hw_interrupt_umask(int vector)
void rt_hw_interrupt_umask(rt_uint32_t vector)
{
/* un-mask interrupt */
if ((vector == INT_NOTUSED0) || (vector == INT_NOTUSED16))
if(vector == 16)
{
rt_kprintf("Interrupt vec %d is not used!\n", vector);
// while(1);
}
else if (vector == INTGLOBAL)
INTC_IMR = 0x0;
else
INTC_IMR &= ~(1 << vector);
}
*(RP)(INTC_IMR) &= ~(1 << vector);
}
/**
* This function will install a interrupt service routine to a interrupt.
@@ -95,12 +108,14 @@ void rt_hw_interrupt_umask(int vector)
* @param new_handler the interrupt service routine to be installed
* @param old_handler the old interrupt service routine
*/
void rt_hw_interrupt_install(int vector, rt_isr_handler_t new_handler, rt_isr_handler_t *old_handler)
void rt_hw_interrupt_install(rt_uint32_t vector, rt_isr_handler_t new_handler, rt_isr_handler_t *old_handler)
{
if(vector >= 0 && vector < MAX_HANDLERS)
if(vector < MAX_HANDLERS)
{
if (*old_handler != RT_NULL) *old_handler = isr_table[vector];
if (new_handler != RT_NULL) isr_table[vector] = new_handler;
if (*old_handler != RT_NULL)
*old_handler = isr_table[vector];
if (new_handler != RT_NULL)
isr_table[vector] = new_handler;
}
}
libcpu/arm/sep4020/stack.c
+11 -13
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@@ -9,14 +9,12 @@
*
* Change Logs:
* Date Author Notes
* 2006-08-23 Bernard the first version
* 2006-03-13 Bernard the first version
*/
#include <rtthread.h>
#define SVCMODE 0x13
#include <sep4020.h>
/**
* @addtogroup AT91SAM7
* @addtogroup S3C24X0
*/
/*@{*/
@@ -24,7 +22,7 @@
* This function will initialize thread stack
*
* @param tentry the entry of thread
* @param parameter the parameter of entry
* @param parameter the parameter of entry
* @param stack_addr the beginning stack address
* @param texit the function will be called when thread exit
*
@@ -33,11 +31,11 @@
rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
rt_uint8_t *stack_addr, void *texit)
{
unsigned long *stk;
rt_uint32_t *stk;
stk = (unsigned long *)stack_addr;
*(stk) = (unsigned long)tentry; /* entry point */
*(--stk) = (unsigned long)texit; /* lr */
stk = (rt_uint32_t*)stack_addr;
*(stk) = (rt_uint32_t)tentry; /* entry point */
*(--stk) = (rt_uint32_t)texit; /* lr */
*(--stk) = 0; /* r12 */
*(--stk) = 0; /* r11 */
*(--stk) = 0; /* r10 */
@@ -50,9 +48,9 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
*(--stk) = 0; /* r3 */
*(--stk) = 0; /* r2 */
*(--stk) = 0; /* r1 */
*(--stk) = (unsigned long)parameter; /* r0 : argument */
*(--stk) = SVCMODE; /* cpsr */
*(--stk) = SVCMODE; /* spsr */
*(--stk) = (rt_uint32_t)parameter; /* r0 : argument */
*(--stk) = Mode_SVC; /* cpsr */
*(--stk) = Mode_SVC; /* spsr */
/* return task's current stack address */
return (rt_uint8_t *)stk;
libcpu/arm/sep4020/start_rvds.S
+239 -229
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File diff suppressed because it is too large Load Diff
libcpu/arm/sep4020/trap.c
+133 -36
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@@ -9,58 +9,155 @@
*
* Change Logs:
* Date Author Notes
* 2006-08-25 Bernard first version
* 2010-03-18 zchong for sep4020
* 2006-03-13 Bernard first version
* 2006-05-27 Bernard add skyeye support
* 2007-11-19 Yi.Qiu fix rt_hw_trap_irq function
*/
#include <rtthread.h>
#include <rthw.h>
#include "sep4020.h"
#include <sep4020.h>
/**
* @addtogroup SEP4020
* @addtogroup S3C24X0
*/
/*@{*/
extern rt_isr_handler_t isr_table[];
void rt_hw_trap_irq()
{
rt_uint32_t intstat,intnum;
rt_uint8_t i = 0;
extern struct rt_thread *rt_current_thread;
/**
* this function will show registers of CPU
*
* @param regs the registers point
*/
void rt_hw_show_register (struct rt_hw_register *regs)
{
rt_kprintf("Execption:\n");
rt_kprintf("r00:0x%08x r01:0x%08x r02:0x%08x r03:0x%08x\n", regs->r0, regs->r1, regs->r2, regs->r3);
rt_kprintf("r04:0x%08x r05:0x%08x r06:0x%08x r07:0x%08x\n", regs->r4, regs->r5, regs->r6, regs->r7);
rt_kprintf("r08:0x%08x r09:0x%08x r10:0x%08x\n", regs->r8, regs->r9, regs->r10);
rt_kprintf("fp :0x%08x ip :0x%08x\n", regs->fp, regs->ip);
rt_kprintf("sp :0x%08x lr :0x%08x pc :0x%08x\n", regs->sp, regs->lr, regs->pc);
rt_kprintf("cpsr:0x%08x\n", regs->cpsr);
}
/**
* When ARM7TDMI comes across an instruction which it cannot handle,
* it takes the undefined instruction trap.
*
* @param regs system registers
*
* @note never invoke this function in application
*/
void rt_hw_trap_udef(struct rt_hw_register *regs)
{
rt_hw_show_register(regs);
rt_kprintf("undefined instruction\n");
rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
rt_hw_backtrace((rt_uint32_t *)regs->fp, (rt_uint32_t)rt_current_thread->entry);
rt_hw_cpu_shutdown();
}
/**
* The software interrupt instruction (SWI) is used for entering
* Supervisor mode, usually to request a particular supervisor
* function.
*
* @param regs system registers
*
* @note never invoke this function in application
*/
void rt_hw_trap_swi(struct rt_hw_register *regs)
{
rt_hw_show_register(regs);
rt_kprintf("software interrupt\n");
rt_hw_cpu_shutdown();
}
/**
* An abort indicates that the current memory access cannot be completed,
* which occurs during an instruction prefetch.
*
* @param regs system registers
*
* @note never invoke this function in application
*/
void rt_hw_trap_pabt(struct rt_hw_register *regs)
{
rt_hw_show_register(regs);
rt_kprintf("prefetch abort\n");
rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
rt_hw_backtrace((rt_uint32_t *)regs->fp, (rt_uint32_t)rt_current_thread->entry);
rt_hw_cpu_shutdown();
}
/**
* An abort indicates that the current memory access cannot be completed,
* which occurs during a data access.
*
* @param regs system registers
*
* @note never invoke this function in application
*/
void rt_hw_trap_dabt(struct rt_hw_register *regs)
{
rt_hw_show_register(regs);
rt_kprintf("data abort\n");
rt_kprintf("thread - %s stack:\n", rt_current_thread->name);
rt_hw_backtrace((rt_uint32_t *)regs->fp, (rt_uint32_t)rt_current_thread->entry);
rt_hw_cpu_shutdown();
}
/**
* Normally, system will never reach here
*
* @param regs system registers
*
* @note never invoke this function in application
*/
void rt_hw_trap_resv(struct rt_hw_register *regs)
{
rt_kprintf("not used\n");
rt_hw_show_register(regs);
rt_hw_cpu_shutdown();
}
extern rt_isr_handler_t isr_table[];
void rt_hw_trap_irq()
{
unsigned long intstat;
rt_uint32_t i = 0;
rt_isr_handler_t isr_func;
/* get interrupt source */
intstat = INTC_IFSR;
intnum = intstat;
if (intstat == INTGLOBAL) return;
while(intnum != 0x00000001)
/*Get the final intrrupt source*/
intstat = *(RP)(INTC_IFSR);;
/*Shift to get the intrrupt number*/
while(intstat != 1)
{
intnum = intnum>>1;
intstat = intstat >> 1;
i++;
}
/* get interrupt service routine */
isr_func = isr_table[i];
/* turn to interrupt service routine */
isr_func(intstat);
}
/* get interrupt service routine */
isr_func = isr_table[i];
/* turn to interrupt service routine */
isr_func(i);
}
void rt_hw_trap_fiq()
{
rt_kprintf("fast interrupt request\n");
}
extern struct rt_thread* rt_current_thread;
void rt_hw_trap_abort()
{
rt_kprintf("Abort occured!!! Thread [%s] suspended.\n",rt_current_thread->name);
rt_thread_suspend(rt_current_thread);
rt_schedule();
rt_kprintf("fast interrupt request\n");
}
/*@}*/