diff --git a/libcpu/arm/cortex-a/stack.c b/libcpu/arm/cortex-a/stack.c
index 0117514c61..5bb57ca4dd 100644
--- a/libcpu/arm/cortex-a/stack.c
+++ b/libcpu/arm/cortex-a/stack.c
@@ -31,9 +31,6 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
                              rt_uint8_t *stack_addr, void *texit)
 {
     rt_uint32_t *stk;
-#ifdef RT_USING_FPU
-    rt_uint32_t i;
-#endif
 
     stack_addr += sizeof(rt_uint32_t);
     stack_addr  = (rt_uint8_t *)RT_ALIGN_DOWN((rt_uint32_t)stack_addr, 8);
@@ -67,10 +64,8 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
     /* FPU context initialization matches context_gcc.S restore order:
      * Stack layout (high to low): FPEXC -> FPSCR -> D16-D31 -> D0-D15
      */
-    for (i = 0; i < VFP_DATA_NR; i++)
-    {
-        *(--stk) = 0;   /* Initialize D0-D31 (64 words for 32 double regs) */
-    }
+    stk -= VFP_DATA_NR;
+    rt_memset(stk, 0, VFP_DATA_NR * sizeof(rt_uint32_t));  /* Initialize D0-D31 (64 words for 32 double regs) */
     *(--stk) = 0;       /* FPSCR: Floating-Point Status and Control Register */
     *(--stk) = 0x40000000;  /* FPEXC: Enable FPU (bit 30 = EN) */
 #endif