From ff56b97d7473a4e6f559ef0ad6c3544c21b66b86 Mon Sep 17 00:00:00 2001 From: Christophe De Wagter Date: Wed, 18 Mar 2026 12:07:47 +0100 Subject: [PATCH] Fix bebop camera startup and view video with gstreamer (#3615) * [conf] gstreamer instead of vlc * Quickfix for now video At first boot of a Bebop1, the camera did not work. Wait half a second more, and the camera works now also at 1st boot time. * OpenCV 4.10 --------- Co-authored-by: OpenUAS --- conf/userconf/tudelft/course_control_panel.xml | 14 +++++++++++++- sw/airborne/boards/bebop/mt9f002.c | 2 +- sw/airborne/boards/bebop/mt9v117.c | 6 +++--- 3 files changed, 17 insertions(+), 5 deletions(-) diff --git a/conf/userconf/tudelft/course_control_panel.xml b/conf/userconf/tudelft/course_control_panel.xml index f7d1c2ad32..7e08e91e52 100644 --- a/conf/userconf/tudelft/course_control_panel.xml +++ b/conf/userconf/tudelft/course_control_panel.xml @@ -1,6 +1,7 @@
+
@@ -29,6 +30,12 @@ + + + + + + @@ -76,8 +83,13 @@ + + + + + + - diff --git a/sw/airborne/boards/bebop/mt9f002.c b/sw/airborne/boards/bebop/mt9f002.c index 9f2a6f469c..627873a844 100644 --- a/sw/airborne/boards/bebop/mt9f002.c +++ b/sw/airborne/boards/bebop/mt9f002.c @@ -1049,7 +1049,7 @@ void mt9f002_init(struct mt9f002_t *mt) /* Software reset */ write_reg(mt, MT9F002_SOFTWARE_RESET, 0x1, 1); - usleep(1000000); // Wait for one second + usleep(1500000); // Wait 1.5 seconds to give time for reset to finish /* Based on the interface configure stage 1 */ if (mt->interface == MT9F002_MIPI || mt->interface == MT9F002_HiSPi) { diff --git a/sw/airborne/boards/bebop/mt9v117.c b/sw/airborne/boards/bebop/mt9v117.c index ff9f565fed..573eca4c4d 100644 --- a/sw/airborne/boards/bebop/mt9v117.c +++ b/sw/airborne/boards/bebop/mt9v117.c @@ -244,7 +244,7 @@ static void write_reg(struct mt9v117_t *mt, uint16_t addr, uint32_t val, uint16_ } // Transmit the buffer - i2c_blocking_transmit(mt->i2c_periph, &mt->i2c_trans, MT9V117_ADDRESS, len + 2, 0.5); + i2c_blocking_transmit(mt->i2c_periph, &mt->i2c_trans, MT9V117_ADDRESS, len + 2, 0.1); } /** @@ -257,7 +257,7 @@ static uint32_t read_reg(struct mt9v117_t *mt, uint16_t addr, uint16_t len) mt->i2c_trans.buf[1] = addr & 0xFF; // Transmit the buffer and receive back - i2c_blocking_transceive(mt->i2c_periph, &mt->i2c_trans, MT9V117_ADDRESS, 2, len, 0.5); + i2c_blocking_transceive(mt->i2c_periph, &mt->i2c_trans, MT9V117_ADDRESS, 2, len, 0.1); /* Fix sigdness */ for (uint8_t i = 0; i < len; i++) { @@ -315,7 +315,7 @@ static inline void mt9v117_write_patch(struct mt9v117_t *mt) } // Transmit the buffer - i2c_blocking_transmit(mt->i2c_periph, &mt->i2c_trans, mt->i2c_trans.slave_addr, mt9v117_patch_lines[i].len, 0.5); + i2c_blocking_transmit(mt->i2c_periph, &mt->i2c_trans, mt->i2c_trans.slave_addr, mt9v117_patch_lines[i].len, 0.1); } write_reg(mt, MT9V117_LOGICAL_ADDRESS_ACCESS, 0x0000, 2);