diff --git a/sw/airborne/arch/stm32/mcu_periph/adc_arch.c b/sw/airborne/arch/stm32/mcu_periph/adc_arch.c
index dfe461d92a..e4050d4f06 100644
--- a/sw/airborne/arch/stm32/mcu_periph/adc_arch.c
+++ b/sw/airborne/arch/stm32/mcu_periph/adc_arch.c
@@ -105,6 +105,12 @@
 #include "led.h"
 #include BOARD_CONFIG
 
+
+#ifndef NVIC_ADC_IRQ_PRIO
+#define NVIC_ADC_IRQ_PRIO 0
+#endif
+
+
 // Macros to automatically enable the correct ADC
 
 #if defined(AD1_1_CHANNEL) || defined(AD1_2_CHANNEL) || defined(AD1_3_CHANNEL) || defined(AD1_4_CHANNEL)
@@ -451,10 +457,10 @@ static inline void adc_init_rcc( void )
 static inline void adc_init_irq( void )
 {
 #if defined(STM32F1)
-  nvic_set_priority(NVIC_ADC1_2_IRQ, 0);
+  nvic_set_priority(NVIC_ADC1_2_IRQ, NVIC_ADC_IRQ_PRIO);
   nvic_enable_irq(NVIC_ADC1_2_IRQ);
 #elif defined(STM32F4)
-  nvic_set_priority(NVIC_ADC_IRQ, 0);
+  nvic_set_priority(NVIC_ADC_IRQ, NVIC_ADC_IRQ_PRIO);
   nvic_enable_irq(NVIC_ADC_IRQ);
 #endif
 }
diff --git a/sw/airborne/arch/stm32/mcu_periph/can_arch.c b/sw/airborne/arch/stm32/mcu_periph/can_arch.c
index 44702dc19b..6d57fd5cb3 100644
--- a/sw/airborne/arch/stm32/mcu_periph/can_arch.c
+++ b/sw/airborne/arch/stm32/mcu_periph/can_arch.c
@@ -40,6 +40,12 @@
 
 #include "led.h"
 
+#ifdef RTOS_PRIO
+#define NVIC_USB_LP_CAN_RX0_IRQ_PRIO RTOS_PRIO+1
+#else
+#define NVIC_USB_LP_CAN_RX0_IRQ_PRIO 1
+#endif
+
 void _can_run_rx_callback(uint32_t id, uint8_t *buf, uint8_t len);
 
 bool can_initialized = false;
@@ -66,7 +72,7 @@ void can_hw_init(void)
 
   /* NVIC setup. */
   nvic_enable_irq(NVIC_USB_LP_CAN_RX0_IRQ);
-  nvic_set_priority(NVIC_USB_LP_CAN_RX0_IRQ, 1);
+  nvic_set_priority(NVIC_USB_LP_CAN_RX0_IRQ, NVIC_USB_LP_CAN_RX0_IRQ_PRIO);
 
   /* Reset CAN. */
   can_reset(CAN1);
diff --git a/sw/airborne/arch/stm32/mcu_periph/i2c_arch.c b/sw/airborne/arch/stm32/mcu_periph/i2c_arch.c
index 38e737db23..90f50482e6 100644
--- a/sw/airborne/arch/stm32/mcu_periph/i2c_arch.c
+++ b/sw/airborne/arch/stm32/mcu_periph/i2c_arch.c
@@ -71,6 +71,18 @@ static inline void __enable_irq(void)   { asm volatile ("cpsie i"); }
 #define __I2C_REG_CRITICAL_ZONE_STOP	__enable_irq();
 
 
+#ifndef NVIC_I2C_IRQ_PRIO
+#define NVIC_I2C1_IRQ_PRIO 0
+#define NVIC_I2C2_IRQ_PRIO 0
+#define NVIC_I2C3_IRQ_PRIO 0
+#else
+#define NVIC_I2C1_IRQ_PRIO NVIC_I2C_IRQ_PRIO
+#define NVIC_I2C2_IRQ_PRIO NVIC_I2C_IRQ_PRIO
+#define NVIC_I2C3_IRQ_PRIO NVIC_I2C_IRQ_PRIO
+#endif
+
+
+
 static inline void PPRZ_I2C_SEND_STOP(uint32_t i2c)
 {
   // Man: p722:  Stop generation after the current byte transfer or after the current Start condition is sent.
@@ -900,11 +912,11 @@ void i2c1_hw_init(void) {
   scb_set_priority_grouping(SCB_AIRCR_PRIGROUP_NOGROUP_SUB16);
 
   /* Configure and enable I2C1 event interrupt --------------------------------*/
-  nvic_set_priority(NVIC_I2C1_EV_IRQ, 0);
+  nvic_set_priority(NVIC_I2C1_EV_IRQ, NVIC_I2C1_IRQ_PRIO);
   nvic_enable_irq(NVIC_I2C1_EV_IRQ);
 
   /* Configure and enable I2C1 err interrupt ----------------------------------*/
-  nvic_set_priority(NVIC_I2C1_ER_IRQ, 1);
+  nvic_set_priority(NVIC_I2C1_ER_IRQ, NVIC_I2C1_IRQ_PRIO+1);
   nvic_enable_irq(NVIC_I2C1_ER_IRQ);
 
   /* Enable peripheral clocks -------------------------------------------------*/
@@ -989,11 +1001,11 @@ void i2c2_hw_init(void) {
   scb_set_priority_grouping(SCB_AIRCR_PRIGROUP_NOGROUP_SUB16);
 
   /* Configure and enable I2C2 event interrupt --------------------------------*/
-  nvic_set_priority(NVIC_I2C2_EV_IRQ, 0);
+  nvic_set_priority(NVIC_I2C2_EV_IRQ, NVIC_I2C2_IRQ_PRIO);
   nvic_enable_irq(NVIC_I2C2_EV_IRQ);
 
   /* Configure and enable I2C2 err interrupt ----------------------------------*/
-  nvic_set_priority(NVIC_I2C2_ER_IRQ, 1);
+  nvic_set_priority(NVIC_I2C2_ER_IRQ, NVIC_I2C2_IRQ_PRIO+1);
   nvic_enable_irq(NVIC_I2C2_ER_IRQ);
 
   /* Enable peripheral clocks -------------------------------------------------*/
@@ -1079,11 +1091,11 @@ void i2c3_hw_init(void) {
   scb_set_priority_grouping(SCB_AIRCR_PRIGROUP_NOGROUP_SUB16);
 
   /* Configure and enable I2C3 event interrupt --------------------------------*/
-  nvic_set_priority(NVIC_I2C3_EV_IRQ, 0);
+  nvic_set_priority(NVIC_I2C3_EV_IRQ, NVIC_I2C3_IRQ_PRIO);
   nvic_enable_irq(NVIC_I2C3_EV_IRQ);
 
   /* Configure and enable I2C3 err interrupt ----------------------------------*/
-  nvic_set_priority(NVIC_I2C3_ER_IRQ, 1);
+  nvic_set_priority(NVIC_I2C3_ER_IRQ, NVIC_I2C3_IRQ_PRIO+1);
   nvic_enable_irq(NVIC_I2C3_ER_IRQ);
 
   /* Enable peripheral clocks -------------------------------------------------*/
diff --git a/sw/airborne/arch/stm32/mcu_periph/spi_arch.c b/sw/airborne/arch/stm32/mcu_periph/spi_arch.c
index f2b5cc79f4..1f7dd2c7db 100644
--- a/sw/airborne/arch/stm32/mcu_periph/spi_arch.c
+++ b/sw/airborne/arch/stm32/mcu_periph/spi_arch.c
@@ -65,6 +65,11 @@
 
 #ifdef SPI_MASTER
 
+#ifndef NVIC_SPI_IRQ_PRIO
+#define NVIC_SPI_IRQ_PRIO 0
+#endif
+
+
 /**
  * Libopencm3 specifc communication parameters for a SPI peripheral in master mode.
  */
@@ -479,10 +484,10 @@ static void spi_configure_dma(uint32_t dma, uint8_t chan, uint32_t periph_addr,
 static void spi_arch_int_enable(struct spi_periph *spi) {
   /// @todo fix priority levels if necessary
   // enable receive interrupt
-  nvic_set_priority( ((struct spi_periph_dma *)spi->init_struct)->rx_nvic_irq, 0);
+  nvic_set_priority( ((struct spi_periph_dma *)spi->init_struct)->rx_nvic_irq, NVIC_SPI_IRQ_PRIO);
   nvic_enable_irq( ((struct spi_periph_dma *)spi->init_struct)->rx_nvic_irq );
   // enable transmit interrupt
-  nvic_set_priority( ((struct spi_periph_dma *)spi->init_struct)->tx_nvic_irq, 0);
+  nvic_set_priority( ((struct spi_periph_dma *)spi->init_struct)->tx_nvic_irq, NVIC_SPI_IRQ_PRIO);
   nvic_enable_irq( ((struct spi_periph_dma *)spi->init_struct)->tx_nvic_irq );
 }
 
diff --git a/sw/airborne/arch/stm32/subsystems/radio_control/ppm_arch.c b/sw/airborne/arch/stm32/subsystems/radio_control/ppm_arch.c
index b8554767f1..65865b3fa3 100644
--- a/sw/airborne/arch/stm32/subsystems/radio_control/ppm_arch.c
+++ b/sw/airborne/arch/stm32/subsystems/radio_control/ppm_arch.c
@@ -46,6 +46,12 @@
 
 
 #define ONE_MHZ_CLK 1000000
+#ifdef NVIC_TIM_IRQ_PRIO
+#define PPM_IRQ_PRIO  NVIC_TIM_IRQ_PRIO
+#else
+#define PPM_IRQ_PRIO 2
+#endif  
+
 
 uint8_t  ppm_cur_pulse;
 uint32_t ppm_last_pulse_time;
@@ -192,11 +198,11 @@ void ppm_arch_init ( void ) {
   timer_ic_set_filter(PPM_TIMER, PPM_CHANNEL, TIM_IC_OFF);
 
   /* Enable timer Interrupt(s). */
-  nvic_set_priority(PPM_IRQ, 2);
+  nvic_set_priority(PPM_IRQ, PPM_IRQ_PRIO);
   nvic_enable_irq(PPM_IRQ);
 
 #ifdef PPM_IRQ2
-  nvic_set_priority(PPM_IRQ2, 2);
+  nvic_set_priority(PPM_IRQ2, PPM_IRQ_PRIO);
   nvic_enable_irq(PPM_IRQ2);
 #endif
 
diff --git a/sw/airborne/arch/stm32/subsystems/radio_control/spektrum_arch.c b/sw/airborne/arch/stm32/subsystems/radio_control/spektrum_arch.c
index 464476a8ed..301d094b5f 100644
--- a/sw/airborne/arch/stm32/subsystems/radio_control/spektrum_arch.c
+++ b/sw/airborne/arch/stm32/subsystems/radio_control/spektrum_arch.c
@@ -49,6 +49,22 @@
 #define MIN_FRAME_SPACE  70  // 7ms
 #define MAX_BYTE_SPACE  3   // .3ms
 
+
+#ifndef NVIC_TIM6_IRQ_PRIO
+#define NVIC_TIM6_IRQ_PRIO 2
+#endif
+
+#ifndef NVIC_TIM6_DAC_IRQ_PRIO
+#define NVIC_TIM6_DAC_IRQ_PRIO 2
+#endif
+
+
+#ifdef NVIC_UART_IRQ_PRIO
+#define NVIC_PRIMARY_UART_PRIO NVIC_UART_IRQ_PRIO
+#else
+#define NVIC_PRIMARY_UART_PRIO 2
+#endif
+
 /*
  * in the makefile we set RADIO_CONTROL_SPEKTRUM_PRIMARY_PORT to be UARTx
  * but in uart_hw.c the initialisation functions are
@@ -481,11 +497,11 @@ void SpektrumTimerInit( void ) {
 
   /* Enable TIM6 interrupts */
 #ifdef STM32F1
-  nvic_set_priority(NVIC_TIM6_IRQ, 2);
+  nvic_set_priority(NVIC_TIM6_IRQ, NVIC_TIM6_IRQ_PRIO);
   nvic_enable_irq(NVIC_TIM6_IRQ);
 #elif defined STM32F4
   /* the define says DAC IRQ, but it is also the global TIM6 IRQ*/
-  nvic_set_priority(NVIC_TIM6_DAC_IRQ, 2);
+  nvic_set_priority(NVIC_TIM6_DAC_IRQ, NVIC_TIM6_DAC_IRQ_PRIO);
   nvic_enable_irq(NVIC_TIM6_DAC_IRQ);
 #endif
 
@@ -529,7 +545,7 @@ void SpektrumUartInit(void) {
   rcc_peripheral_enable_clock(PrimaryUart(_RCC_REG), PrimaryUart(_RCC_DEV));
 
   /* Enable USART interrupts */
-  nvic_set_priority(PrimaryUart(_IRQ), 2);
+  nvic_set_priority(PrimaryUart(_IRQ), NVIC_PRIMARY_UART_PRIO);
   nvic_enable_irq(PrimaryUart(_IRQ));
 
   /* Init GPIOS */
@@ -556,7 +572,7 @@ void SpektrumUartInit(void) {
   rcc_peripheral_enable_clock(SecondaryUart(_RCC_REG), SecondaryUart(_RCC_DEV));
 
   /* Enable USART interrupts */
-  nvic_set_priority(SecondaryUart(_IRQ), 3);
+  nvic_set_priority(SecondaryUart(_IRQ), NVIC_PRIMARY_UART_PRIO+1);
   nvic_enable_irq(SecondaryUart(_IRQ));
 
   /* Init GPIOS */;