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fix ppm interrupt definitions for lpc21

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This commit is contained in:
Felix Ruess
2010-10-25 21:59:10 +00:00
parent 3043392778
commit de7decbf65
2 changed files with 13 additions and 21 deletions
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sw/airborne/arch/lpc21/sys_time_hw.c
+9 -17
View File
@@ -19,15 +19,12 @@ uint32_t sys_time_chrono; /* T0TC ticks */
#define PPM_IT 0x00 #define PPM_IT 0x00
#endif #endif
#if defined RADIO_CONTROL && defined RADIO_CONTROL_TYPE_PPM //FIXME remove this and fix timer mask
#include <subsystems/radio_control/ppm.h>
#else
#define RADIO_CONTROL_PPM_IT 0x00 #define RADIO_CONTROL_PPM_IT 0x00
#endif
#ifdef MB_SCALE #ifdef MB_SCALE
#include "mb_scale.h" #include "mb_scale.h"
#else #else
#define MB_SCALE_IT 0x00 #define MB_SCALE_IT 0x00
#endif #endif
@@ -58,6 +55,7 @@ uint32_t sys_time_chrono; /* T0TC ticks */
#define TRIGGER_IT 0x00 #define TRIGGER_IT 0x00
#endif #endif
//FIXME: RADIO_CONTROL_PPM_IT not used anymore
#define TIMER0_IT_MASK (ACTUATORS_IT |\ #define TIMER0_IT_MASK (ACTUATORS_IT |\
PPM_IT |\ PPM_IT |\
RADIO_CONTROL_PPM_IT |\ RADIO_CONTROL_PPM_IT |\
@@ -85,7 +83,7 @@ void TIMER0_ISR ( void ) {
#ifdef SERVOS_PPM_MAT #ifdef SERVOS_PPM_MAT
ServosPPMMat_ISR(); ServosPPMMat_ISR();
#endif #endif
T0IR = ACTUATORS_IT; T0IR = ACTUATORS_IT;
} }
#endif /* ACTUATORS && (SERVOS_4017 || SERVOS_4015_MAT || SERVOS_PPM_MAT) */ #endif /* ACTUATORS && (SERVOS_4017 || SERVOS_4015_MAT || SERVOS_PPM_MAT) */
@@ -103,12 +101,6 @@ void TIMER0_ISR ( void ) {
LED_TOGGLE(3); LED_TOGGLE(3);
} }
#endif #endif
#if defined RADIO_CONTROL && defined RADIO_CONTROL_TYPE_PPM
if (T0IR&RADIO_CONTROL_PPM_IT) {
RADIO_CONTROL_PPM_ISR();
T0IR = RADIO_CONTROL_PPM_IT;
}
#endif
#ifdef MB_SCALE #ifdef MB_SCALE
if (T0IR&MB_SCALE_IT) { if (T0IR&MB_SCALE_IT) {
MB_SCALE_ICP_ISR(); MB_SCALE_ICP_ISR();
@@ -124,31 +116,31 @@ LED_TOGGLE(3);
#ifdef USE_PWM_INPUT1 #ifdef USE_PWM_INPUT1
if (T0IR&PWM_INPUT_IT1) { if (T0IR&PWM_INPUT_IT1) {
PWM_INPUT_ISR_1(); PWM_INPUT_ISR_1();
T0IR = PWM_INPUT_IT1; T0IR = PWM_INPUT_IT1;
} }
#endif #endif
#ifdef USE_PWM_INPUT2 #ifdef USE_PWM_INPUT2
if (T0IR&PWM_INPUT_IT2) { if (T0IR&PWM_INPUT_IT2) {
PWM_INPUT_ISR_2(); PWM_INPUT_ISR_2();
T0IR = PWM_INPUT_IT2; T0IR = PWM_INPUT_IT2;
} }
#endif #endif
#ifdef USE_PWM_INPUT3 #ifdef USE_PWM_INPUT3
if (T0IR&PWM_INPUT_IT3) { if (T0IR&PWM_INPUT_IT3) {
PWM_INPUT_ISR_3(); PWM_INPUT_ISR_3();
T0IR = PWM_INPUT_IT3; T0IR = PWM_INPUT_IT3;
} }
#endif #endif
#ifdef USE_PWM_INPUT4 #ifdef USE_PWM_INPUT4
if (T0IR&PWM_INPUT_IT4) { if (T0IR&PWM_INPUT_IT4) {
PWM_INPUT_ISR_4(); PWM_INPUT_ISR_4();
T0IR = PWM_INPUT_IT4; T0IR = PWM_INPUT_IT4;
} }
#endif #endif
#ifdef USE_AMI601 #ifdef USE_AMI601
if (T0IR&AMI601_IT) { if (T0IR&AMI601_IT) {
AMI601_ISR(); AMI601_ISR();
T0IR = AMI601_IT; T0IR = AMI601_IT;
} }
#endif #endif
} }
sw/airborne/arch/lpc21/sys_time_hw.h
+4 -4
View File
@@ -23,7 +23,7 @@
*/ */
/* /*
*\brief ARM7 timing functions *\brief ARM7 timing functions
* *
*/ */
@@ -100,7 +100,7 @@ static inline void sys_time_init( void ) {
/* disable compare registers */ /* disable compare registers */
T0CCR = 0; T0CCR = 0;
/* disable external match register */ /* disable external match register */
T0EMR = 0; T0EMR = 0;
/* enable timer 0 */ /* enable timer 0 */
T0TCR = TCR_ENABLE; T0TCR = TCR_ENABLE;
@@ -110,11 +110,11 @@ static inline void sys_time_init( void ) {
/* select TIMER0 as IRQ */ /* select TIMER0 as IRQ */
VICIntSelect &= ~VIC_BIT(VIC_TIMER0); VICIntSelect &= ~VIC_BIT(VIC_TIMER0);
/* enable TIMER0 interrupt */ /* enable TIMER0 interrupt */
VICIntEnable = VIC_BIT(VIC_TIMER0); VICIntEnable = VIC_BIT(VIC_TIMER0);
/* on slot vic slot 1 */ /* on slot vic slot 1 */
_VIC_CNTL(TIMER0_VIC_SLOT) = VIC_ENABLE | VIC_TIMER0; _VIC_CNTL(TIMER0_VIC_SLOT) = VIC_ENABLE | VIC_TIMER0;
/* address of the ISR */ /* address of the ISR */
_VIC_ADDR(TIMER0_VIC_SLOT) = (uint32_t)TIMER0_ISR; _VIC_ADDR(TIMER0_VIC_SLOT) = (uint32_t)TIMER0_ISR;
} }