diff --git a/sw/airborne/arch/lpc21/peripherals/ms2100_arch.c b/sw/airborne/arch/lpc21/peripherals/ms2100_arch.c index ec22b64b6c..f1353b8255 100644 --- a/sw/airborne/arch/lpc21/peripherals/ms2100_arch.c +++ b/sw/airborne/arch/lpc21/peripherals/ms2100_arch.c @@ -17,11 +17,11 @@ void ms2100_arch_init( void ) { ms2100_cur_axe = 0; /* configure SS pin */ - Ms2001Unselect(); /* pin idles high */ + Ms2100Unselect(); /* pin idles high */ SetBit(MS2100_SS_IODIR, MS2100_SS_PIN); /* pin is output */ /* configure RESET pin */ - Ms2001Reset(); /* pin idles low */ + Ms2100Reset(); /* pin idles low */ SetBit(MS2100_RESET_IODIR, MS2100_RESET_PIN); /* pin is output */ /* configure DRDY pin */ diff --git a/sw/airborne/arch/lpc21/peripherals/ms2100_arch.h b/sw/airborne/arch/lpc21/peripherals/ms2100_arch.h index 01fbf017b5..bd3b4d6d3a 100644 --- a/sw/airborne/arch/lpc21/peripherals/ms2100_arch.h +++ b/sw/airborne/arch/lpc21/peripherals/ms2100_arch.h @@ -16,20 +16,20 @@ extern volatile uint8_t ms2100_cur_axe; -#define Ms2001Select() SetBit(MS2100_SS_IOCLR,MS2100_SS_PIN) -#define Ms2001Unselect() SetBit(MS2100_SS_IOSET,MS2100_SS_PIN) +#define Ms2100Select() SetBit(MS2100_SS_IOCLR,MS2100_SS_PIN) +#define Ms2100Unselect() SetBit(MS2100_SS_IOSET,MS2100_SS_PIN) -#define Ms2001Reset() SetBit(MS2100_RESET_IOCLR,MS2100_RESET_PIN) -#define Ms2001Set() SetBit(MS2100_RESET_IOSET,MS2100_RESET_PIN) +#define Ms2100Reset() SetBit(MS2100_RESET_IOCLR,MS2100_RESET_PIN) +#define Ms2100Set() SetBit(MS2100_RESET_IOSET,MS2100_RESET_PIN) -#define Ms2001OnSpiInt() { \ +#define Ms2100OnSpiInt() { \ switch (ms2100_status) { \ case MS2100_SENDING_REQ: \ { \ /* read dummy control byte reply */ \ uint8_t foo __attribute__ ((unused)) = SSPDR; \ ms2100_status = MS2100_WAITING_EOC; \ - Ms2001Unselect(); \ + Ms2100Unselect(); \ SSP_ClearRti(); \ SSP_DisableRti(); \ SSP_Disable(); \ @@ -42,7 +42,7 @@ extern volatile uint8_t ms2100_cur_axe; new_val += SSPDR; \ if (abs(new_val) < 2000) \ ms2100_values[ms2100_cur_axe] = new_val; \ - Ms2001Unselect(); \ + Ms2100Unselect(); \ SSP_ClearRti(); \ SSP_DisableRti(); \ SSP_Disable(); \ @@ -59,22 +59,22 @@ extern volatile uint8_t ms2100_cur_axe; } -#define Ms2001SendReq() { \ - Ms2001Select(); \ +#define Ms2100SendReq() { \ + Ms2100Select(); \ ms2100_status = MS2100_SENDING_REQ; \ - Ms2001Set(); \ + Ms2100Set(); \ SSP_ClearRti(); \ SSP_EnableRti(); \ - Ms2001Reset(); \ + Ms2100Reset(); \ uint8_t control_byte = (ms2100_cur_axe+1) << 0 | \ MS2100_DIVISOR << 4; \ SSP_Send(control_byte); \ SSP_Enable(); \ } -#define Ms2001ReadRes() { \ +#define Ms2100ReadRes() { \ ms2100_status = MS2100_READING_RES; \ - Ms2001Select(); \ + Ms2100Select(); \ /* trigger 2 bytes read */ \ SSP_Send(0); \ SSP_Send(0); \ diff --git a/sw/airborne/arch/lpc21/subsystems/imu/imu_b2_arch.c b/sw/airborne/arch/lpc21/subsystems/imu/imu_b2_arch.c index 6cb17e1fb6..7cfdd63e96 100644 --- a/sw/airborne/arch/lpc21/subsystems/imu/imu_b2_arch.c +++ b/sw/airborne/arch/lpc21/subsystems/imu/imu_b2_arch.c @@ -115,10 +115,10 @@ static void SSP_ISR(void) { if (ms2100_status == MS2100_IDLE || ms2100_status == MS2100_GOT_EOC) { ImuSetSSP8bits(); if (ms2100_status == MS2100_IDLE) { - Ms2001SendReq(); + Ms2100SendReq(); } else { /* MS2100_GOT_EOC */ - Ms2001ReadRes(); + Ms2100ReadRes(); } imu_ssp_status = IMU_SSP_STA_BUSY_MS2100; } @@ -127,9 +127,9 @@ static void SSP_ISR(void) { } break; case IMU_SSP_STA_BUSY_MS2100: - Ms2001OnSpiInt(); + Ms2100OnSpiInt(); if (ms2100_status == MS2100_IDLE) { - Ms2001SendReq(); + Ms2100SendReq(); imu_ssp_status = IMU_SSP_STA_BUSY_MS2100; } else diff --git a/sw/airborne/arch/stm32/peripherals/ms2100_arch.c b/sw/airborne/arch/stm32/peripherals/ms2100_arch.c index 961ab71e53..893aedef3c 100644 --- a/sw/airborne/arch/stm32/peripherals/ms2100_arch.c +++ b/sw/airborne/arch/stm32/peripherals/ms2100_arch.c @@ -41,8 +41,8 @@ void ms2100_arch_init( void ) { ms2100_cur_axe = 0; /* set mag SS and reset as output and assert them (SS on PC12 reset on PC13) ----*/ - Ms2001Unselect(); - Ms2001Set(); + Ms2100Unselect(); + Ms2100Set(); RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE); GPIO_InitTypeDef GPIO_InitStructure; @@ -83,13 +83,13 @@ void ms2100_arch_init( void ) { #ifdef MS2100_HANDLES_SPI_IRQ void spi2_irq_handler(void) { - Ms2001OnSpiIrq(); + Ms2100OnSpiIrq(); } #endif #ifdef MS2100_HANDLES_DMA_IRQ void dma1_c4_irq_handler(void) { - Ms2001OnDmaIrq(); + Ms2100OnDmaIrq(); } #endif /* MS2100_HANDLES_DMA_IRQ */ diff --git a/sw/airborne/arch/stm32/peripherals/ms2100_arch.h b/sw/airborne/arch/stm32/peripherals/ms2100_arch.h index c95a26ce84..a76b4c0192 100644 --- a/sw/airborne/arch/stm32/peripherals/ms2100_arch.h +++ b/sw/airborne/arch/stm32/peripherals/ms2100_arch.h @@ -30,21 +30,21 @@ extern uint8_t ms2100_cur_axe; extern int16_t ms2100_last_reading; -#define Ms2001Select() GPIOC->BRR = GPIO_Pin_12 -#define Ms2001Unselect() GPIOC->BSRR = GPIO_Pin_12 +#define Ms2100Select() GPIOC->BRR = GPIO_Pin_12 +#define Ms2100Unselect() GPIOC->BSRR = GPIO_Pin_12 -#define Ms2001Reset() GPIOC->BSRR = GPIO_Pin_13; -#define Ms2001Set() GPIOC->BRR = GPIO_Pin_13 +#define Ms2100Reset() GPIOC->BSRR = GPIO_Pin_13; +#define Ms2100Set() GPIOC->BRR = GPIO_Pin_13 -#define Ms2001HasEOC() GPIO_ReadInputDataBit(GPIOB, GPIO_Pin_5) +#define Ms2100HasEOC() GPIO_ReadInputDataBit(GPIOB, GPIO_Pin_5) -#define Ms2001SendReq() { \ - Ms2001Select(); \ +#define Ms2100SendReq() { \ + Ms2100Select(); \ __IO uint32_t nCount = 4;for(; nCount != 0; nCount--); \ - Ms2001Reset(); \ + Ms2100Reset(); \ ms2100_status = MS2100_SENDING_REQ; \ nCount = 4;for(; nCount != 0; nCount--); \ - Ms2001Set(); \ + Ms2100Set(); \ uint16_t ctl_byte = ((ms2100_cur_axe+1) | (MS2100_DIVISOR << 4)); \ nCount = 20;for(; nCount != 0; nCount--); \ SPI_Cmd(SPI2, DISABLE); \ @@ -65,9 +65,9 @@ extern int16_t ms2100_last_reading; SPI_I2S_SendData(SPI2, ctl_byte); \ } -#define Ms2001ReadRes() { \ +#define Ms2100ReadRes() { \ ms2100_status = MS2100_READING_RES; \ - Ms2001Select(); \ + Ms2100Select(); \ SPI_Cmd(SPI2, DISABLE); \ SPI_InitTypeDef SPI_InitStructure = { \ .SPI_Direction = SPI_Direction_2Lines_FullDuplex, \ @@ -122,13 +122,13 @@ extern int16_t ms2100_last_reading; \ } -#define Ms2001OnDmaIrq() { \ +#define Ms2100OnDmaIrq() { \ /* ASSERT((ms2100_status == MS2100_READING_RES), \ * DEBUG_MS2100, MS2100_ERR_SPURIOUS_DMA_IRQ); \ */ \ if (abs(ms2100_last_reading) < 1000) \ ms2100_values[ms2100_cur_axe] = ms2100_last_reading; \ - Ms2001Unselect(); \ + Ms2100Unselect(); \ ms2100_cur_axe++; \ if (ms2100_cur_axe > 2) { \ ms2100_cur_axe = 0; \ @@ -140,13 +140,13 @@ extern int16_t ms2100_last_reading; DMA_ITConfig(DMA1_Channel4, DMA_IT_TC, DISABLE); \ } -#define Ms2001OnSpiIrq() { \ +#define Ms2100OnSpiIrq() { \ /* ASSERT((ms2100_status == MS2100_SENDING_REQ), \ * DEBUG_MS2100, MS2100_ERR_SPURIOUS_SPI_IRQ); \ */ \ /* read unused control byte reply */ \ uint8_t foo __attribute__ ((unused)) = SPI_I2S_ReceiveData(SPI2); \ - Ms2001Unselect(); \ + Ms2100Unselect(); \ ms2100_status = MS2100_WAITING_EOC; \ SPI_Cmd(SPI2, DISABLE); \ SPI_I2S_ITConfig(SPI2, SPI_I2S_IT_RXNE, DISABLE); \ diff --git a/sw/airborne/arch/stm32/subsystems/imu/imu_b2_arch.c b/sw/airborne/arch/stm32/subsystems/imu/imu_b2_arch.c index acad03c9a3..a525256575 100644 --- a/sw/airborne/arch/stm32/subsystems/imu/imu_b2_arch.c +++ b/sw/airborne/arch/stm32/subsystems/imu/imu_b2_arch.c @@ -93,11 +93,11 @@ void dma1_c4_irq_handler(void) { SPI_Cmd(SPI2, DISABLE); #if IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2100 if (ms2100_status == MS2100_IDLE) { - Ms2001SendReq(); + Ms2100SendReq(); imu_ssp_status = IMU_SSP_STA_BUSY_MS2100; } - else if (ms2100_status == MS2100_WAITING_EOC && Ms2001HasEOC()) { - Ms2001ReadRes(); + else if (ms2100_status == MS2100_WAITING_EOC && Ms2100HasEOC()) { + Ms2100ReadRes(); imu_ssp_status = IMU_SSP_STA_BUSY_MS2100; } else @@ -106,7 +106,7 @@ void dma1_c4_irq_handler(void) { break; case IMU_SSP_STA_BUSY_MS2100: #if IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2100 - Ms2001OnDmaIrq(); + Ms2100OnDmaIrq(); #endif break; default: @@ -118,6 +118,6 @@ void dma1_c4_irq_handler(void) { void spi2_irq_handler(void) { #if IMU_B2_MAG_TYPE == IMU_B2_MAG_MS2100 - Ms2001OnSpiIrq(); + Ms2100OnSpiIrq(); #endif } diff --git a/sw/airborne/lisa/test/lisa_test_ms2100.c b/sw/airborne/lisa/test/lisa_test_ms2100.c index 2d20f2aece..b493f1193c 100644 --- a/sw/airborne/lisa/test/lisa_test_ms2100.c +++ b/sw/airborne/lisa/test/lisa_test_ms2100.c @@ -70,11 +70,11 @@ static inline void main_periodic_task( void ) { switch(ms2100_status) { case MS2100_IDLE: - Ms2001SendReq(); + Ms2100SendReq(); break; case MS2100_WAITING_EOC: - if (Ms2001HasEOC()) { - Ms2001ReadRes(); + if (Ms2100HasEOC()) { + Ms2100ReadRes(); } break; }