diff --git a/sw/airborne/stm32/uart_hw.c b/sw/airborne/stm32/uart_hw.c
index 5f2a1442fe..19f118f9a2 100644
--- a/sw/airborne/stm32/uart_hw.c
+++ b/sw/airborne/stm32/uart_hw.c
@@ -290,7 +290,8 @@ uint8_t  uart3_tx_buffer[UART3_TX_BUFFER_SIZE];
 void uart3_init( void ) {
 
   /* init RCC */
-  Uart3_PeriphClockCmd; // RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
+  Uart3_PeriphClockCmd();
+  RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
 
   /* Enable USART3 interrupts */
   NVIC_InitTypeDef nvic;
diff --git a/sw/airborne/stm32/uart_hw.h b/sw/airborne/stm32/uart_hw.h
index 9327aed3c8..28245ad449 100644
--- a/sw/airborne/stm32/uart_hw.h
+++ b/sw/airborne/stm32/uart_hw.h
@@ -50,7 +50,7 @@
 #define Uart3_RxPin GPIO_Pin_11
 #define Uart3_TxPort GPIOC
 #define Uart3_RxPort GPIOC
-#define Uart3_PeriphClockCmd RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE)
+#define Uart3_PeriphClockCmd() RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE)
 
 #ifdef USE_UART1