mirror of
https://github.com/paparazzi/paparazzi.git
synced 2026-05-24 13:55:51 +08:00
Working for telemetry over a cable. Ongoing tests
This commit is contained in:
Pascal Brisset
@@ -1,14 +1,14 @@
|
||||
<!DOCTYPE module SYSTEM "module.dtd">
|
||||
|
||||
<!-- Driver for the MAXIM SPI/Uart MAX3100 converter -->
|
||||
|
||||
<module name="max3100">
|
||||
<header>
|
||||
<file name="max3100_hw.h"/>
|
||||
</header>
|
||||
<init fun="max3100_init()"/>
|
||||
<periodic fun="max3100_test_write()" period="0.2" autorun="TRUE"/>
|
||||
<!-- <event fun="Max3100_test_read()"/> -->
|
||||
<event fun="max3100_event()"/>
|
||||
<makefile>
|
||||
<flag name="MAX3100_BAUD_RATE" value="MAX3100_BAUD_RATE_9600"/>
|
||||
<file name="max3100_hw.c"/>
|
||||
</makefile>
|
||||
</module>
|
||||
|
||||
@@ -25,24 +25,52 @@
|
||||
#include "LPC21xx.h"
|
||||
#include "interrupt_hw.h"
|
||||
#include "max3100_hw.h"
|
||||
#include "led.h"
|
||||
|
||||
uint8_t max3100_status;
|
||||
bool max3100_data_available;
|
||||
|
||||
uint8_t max3100_tx_insert_idx, max3100_tx_extract_idx;
|
||||
uint8_t max3100_rx_insert_idx, max3100_rx_extract_idx;
|
||||
|
||||
uint8_t max3100_tx_buf[MAX3100_TX_BUF_LEN];
|
||||
uint8_t max3100_rx_buf[MAX3100_RX_BUF_LEN];
|
||||
#include "ap_downlink.h"
|
||||
#include "uart.h"
|
||||
|
||||
|
||||
static void EXTINT0_ISR(void) __attribute__((naked));
|
||||
uint8_t volatile max3100_status;
|
||||
bool volatile max3100_data_available;
|
||||
|
||||
uint8_t volatile max3100_tx_insert_idx, max3100_tx_extract_idx;
|
||||
uint8_t volatile max3100_rx_insert_idx, max3100_rx_extract_idx;
|
||||
|
||||
uint8_t volatile max3100_tx_buf[MAX3100_TX_BUF_LEN];
|
||||
uint8_t volatile max3100_rx_buf[MAX3100_RX_BUF_LEN];
|
||||
|
||||
|
||||
bool read_bytes = false;
|
||||
|
||||
|
||||
static void EXTINT2_ISR(void) __attribute__((naked));
|
||||
static void SPI1_ISR(void) __attribute__((naked));
|
||||
|
||||
#define PINSEL1_SCK (2 << 2)
|
||||
#define PINSEL1_MISO (2 << 4)
|
||||
#define PINSEL1_MOSI (2 << 6)
|
||||
#define PINSEL1_SSEL (2 << 8)
|
||||
|
||||
/* SSPCR0 settings */
|
||||
#define SSP_DSS 0x0F << 0 /* data size : 16 bits */
|
||||
// #define SSP_DSS 0x07 << 0 /* data size : 8 bits */
|
||||
#define SSP_FRF 0x00 << 4 /* frame format : SPI */
|
||||
#define SSP_CPOL 0x00 << 6 /* clock polarity : idle low */
|
||||
#define SSP_CPHA 0x00 << 7 /* clock phase : 0 */
|
||||
#define SSP_SCR 0x0F << 8 /* serial clock rate : 29.3kHz, SSP input clock / 16 */
|
||||
|
||||
/* SSPCR1 settings */
|
||||
#define SSP_LBM 0x00 << 0 /* loopback mode : disabled */
|
||||
#define SSP_SSE 0x00 << 1 /* SSP enable : disabled */
|
||||
#define SSP_MS 0x00 << 2 /* master slave mode : master */
|
||||
#define SSP_SOD 0x00 << 3 /* slave output disable : don't care when master */
|
||||
|
||||
#ifndef SSPCPSR_VAL
|
||||
#define SSPCPSR_VAL 0x04
|
||||
#endif
|
||||
|
||||
|
||||
void max3100_init( void ) {
|
||||
|
||||
max3100_status = MAX3100_STATUS_IDLE;
|
||||
max3100_data_available = false;
|
||||
max3100_tx_insert_idx = 0;
|
||||
@@ -50,6 +78,15 @@ void max3100_init( void ) {
|
||||
max3100_rx_insert_idx = 0;
|
||||
max3100_rx_extract_idx = 0;
|
||||
|
||||
/* setup pins for SSP (SCK, MISO, MOSI) */
|
||||
PINSEL1 |= PINSEL1_SCK | PINSEL1_MISO | PINSEL1_MOSI;
|
||||
|
||||
/* setup SSP */
|
||||
SSPCR0 = SSP_DSS | SSP_FRF | SSP_CPOL | SSP_CPHA | SSP_SCR;
|
||||
SSPCR1 = SSP_LBM | SSP_MS | SSP_SOD;
|
||||
SSPCPSR = SSPCPSR_VAL; /* Prescaler */
|
||||
|
||||
|
||||
/* From arm7/max1167_hw.c */
|
||||
|
||||
/* SS pin is output */
|
||||
@@ -57,7 +94,7 @@ void max3100_init( void ) {
|
||||
/* unselected max3100 */
|
||||
Max3100Unselect();
|
||||
|
||||
/* connect P0.16 to extint0 (IRQ) */
|
||||
/* connect P0.7 to extint2 (IRQ) */
|
||||
MAX3100_IRQ_PINSEL |= MAX3100_IRQ_PINSEL_VAL << MAX3100_IRQ_PINSEL_BIT;
|
||||
/* extint0 is edge trigered */
|
||||
SetBit(EXTMODE, MAX3100_IRQ_EINT);
|
||||
@@ -67,10 +104,10 @@ void max3100_init( void ) {
|
||||
SetBit(EXTINT, MAX3100_IRQ_EINT);
|
||||
|
||||
/* Configure interrupt vector for external pin interrupt */
|
||||
VICIntSelect &= ~VIC_BIT( VIC_EINT0 ); // EXTINT0 selected as IRQ
|
||||
VICIntEnable = VIC_BIT( VIC_EINT0 ); // EXTINT0 interrupt enabled
|
||||
VICVectCntl8 = VIC_ENABLE | VIC_EINT0;
|
||||
VICVectAddr8 = (uint32_t)EXTINT0_ISR; // address of the ISR
|
||||
VICIntSelect &= ~VIC_BIT( VIC_EINT2 ); // EXTINT2 selected as IRQ
|
||||
VICIntEnable = VIC_BIT( VIC_EINT2 ); // EXTINT2 interrupt enabled
|
||||
VICVectCntl8 = VIC_ENABLE | VIC_EINT2;
|
||||
VICVectAddr8 = (uint32_t)EXTINT2_ISR; // address of the ISR
|
||||
|
||||
/* Configure interrupt vector for SPI */
|
||||
VICIntSelect &= ~VIC_BIT(VIC_SPI1); /* SPI1 selected as IRQ */
|
||||
@@ -83,45 +120,47 @@ void max3100_init( void ) {
|
||||
}
|
||||
|
||||
|
||||
void EXTINT0_ISR(void) {
|
||||
/******* External interrupt: Data input available ***********/
|
||||
void EXTINT2_ISR(void) {
|
||||
ISR_ENTRY();
|
||||
|
||||
LED_ON(2);
|
||||
|
||||
max3100_data_available = true;
|
||||
|
||||
SetBit(EXTINT, MAX3100_IRQ_EINT); /* clear extint0 */
|
||||
SetBit(EXTINT, MAX3100_IRQ_EINT); /* clear extint */
|
||||
VICVectAddr = 0x00000000; /* clear this interrupt from the VIC */
|
||||
|
||||
LED_OFF(2);
|
||||
|
||||
ISR_EXIT();
|
||||
}
|
||||
|
||||
void SPI1_ISR(void) {
|
||||
uint8_t read_byte;
|
||||
|
||||
ISR_ENTRY();
|
||||
|
||||
while (bit_is_set(SSPSR, RNE)) {
|
||||
// uint8_t byte1 = SSPDR;
|
||||
//uint8_t byte2 = SSPDR;
|
||||
// uint16_t data = byte1 << 8 | byte2;
|
||||
uint16_t data = SSPDR;
|
||||
|
||||
if (bit_is_set(data, MAX3100_R_BIT)) { /* Data available */
|
||||
max3100_rx_buf[max3100_rx_insert_idx] = data & 0xff;
|
||||
max3100_rx_insert_idx++; // automatic overflow because len=256
|
||||
read_bytes = true;
|
||||
}
|
||||
}
|
||||
SpiClearRti(); /* clear interrupt */
|
||||
SpiDisableRti();
|
||||
SpiDisable ();
|
||||
Max3100Unselect();
|
||||
max3100_status = MAX3100_STATUS_IDLE;
|
||||
|
||||
switch (max3100_status) {
|
||||
case MAX3100_STATUS_READING:
|
||||
SpiRead(read_byte);
|
||||
SpiRead(max3100_rx_buf[max3100_rx_insert_idx]);
|
||||
max3100_rx_insert_idx++; // automatic overflow because len=256
|
||||
max3100_data_available = Max3100BitR(read_byte);
|
||||
break;
|
||||
|
||||
case MAX3100_STATUS_WRITING:
|
||||
SpiRead(read_byte);
|
||||
SpiRead(read_byte);
|
||||
break;
|
||||
}
|
||||
|
||||
VICVectAddr = 0x00000000; /* clear this interrupt from the VIC */
|
||||
ISR_EXIT();
|
||||
}
|
||||
|
||||
|
||||
|
||||
void max3100_test_write( void ) {
|
||||
max3100_putchar('a');
|
||||
void max3100_debug(void) {
|
||||
/***/ DOWNLINK_SEND_DEBUG(16, max3100_rx_buf); /***/
|
||||
}
|
||||
|
||||
@@ -4,13 +4,15 @@
|
||||
#include <stdbool.h>
|
||||
#include "std.h"
|
||||
#include "spi_hw.h"
|
||||
#include "led.h"
|
||||
|
||||
/* Pin configuration for max3100 IRQ */
|
||||
#define MAX3100_IRQ_PIN 16
|
||||
#define MAX3100_IRQ_PINSEL PINSEL1
|
||||
#define MAX3100_IRQ_PINSEL_BIT 0
|
||||
#define MAX3100_IRQ_PINSEL_VAL 1
|
||||
#define MAX3100_IRQ_EINT 0
|
||||
#define MAX3100_IRQ_PIN 7
|
||||
#define MAX3100_IRQ_PINSEL PINSEL0
|
||||
#define MAX3100_IRQ_PINSEL_BIT 14
|
||||
#define MAX3100_IRQ_PINSEL_VAL 0x3
|
||||
#define MAX3100_IRQ_EINT 2
|
||||
|
||||
#define MAX3100_SS_PORT 0
|
||||
#define MAX3100_SS_PIN 20
|
||||
|
||||
@@ -26,18 +28,21 @@
|
||||
#define MAX3100_STATUS_WRITING 1
|
||||
#define MAX3100_STATUS_READING 2
|
||||
|
||||
extern uint8_t max3100_status;
|
||||
extern bool max3100_data_available;
|
||||
extern volatile uint8_t max3100_status;
|
||||
extern volatile bool max3100_data_available;
|
||||
|
||||
/** I/O Buffers */
|
||||
#define MAX3100_TX_BUF_LEN 256
|
||||
#define MAX3100_RX_BUF_LEN 256
|
||||
|
||||
extern uint8_t max3100_tx_insert_idx, max3100_tx_extract_idx;
|
||||
extern uint8_t max3100_rx_insert_idx, max3100_rx_extract_idx;
|
||||
extern volatile uint8_t max3100_tx_insert_idx, max3100_tx_extract_idx;
|
||||
extern volatile uint8_t max3100_rx_insert_idx, max3100_rx_extract_idx;
|
||||
|
||||
extern uint8_t max3100_tx_buf[MAX3100_TX_BUF_LEN];
|
||||
extern uint8_t max3100_rx_buf[MAX3100_RX_BUF_LEN];
|
||||
extern volatile uint8_t max3100_tx_buf[MAX3100_TX_BUF_LEN];
|
||||
extern volatile uint8_t max3100_rx_buf[MAX3100_RX_BUF_LEN];
|
||||
|
||||
extern volatile uint8_t read_byte1, read_byte2;
|
||||
extern bool read_bytes;
|
||||
|
||||
#define Max3100Select() { \
|
||||
SetBit(MAX3100_SS_IOCLR, MAX3100_SS_PIN); \
|
||||
@@ -52,18 +57,20 @@ extern uint8_t max3100_rx_buf[MAX3100_RX_BUF_LEN];
|
||||
#define MAX3100_WRITE_DATA ((1U<<15) | (0U<<14))
|
||||
#define MAX3100_READ_DATA ((0U<<15) | (0U<<14))
|
||||
|
||||
#define MAX3100_BAUD_RATE_19200 0x9
|
||||
#define MAX3100_BAUD_RATE_9600 0xA
|
||||
#define MAX3100_B57600 0x1
|
||||
#define MAX3100_B19200 0x9
|
||||
#define MAX3100_B9600 0xA
|
||||
|
||||
#define MAX3100_BIT_NOT_RM (1U<<10)
|
||||
#define MAX3100_BIT_NOT_TM (1U<<11)
|
||||
#define MAX3100_BIT_NOT_FEN (1U<<13)
|
||||
#define Max3100BitR(_conf_byte) ((_conf_byte)>>7)
|
||||
#define MAX3100_R_BIT 15
|
||||
|
||||
/** Like Uart macros */
|
||||
#define Uart3100Init() max3100_init()
|
||||
#define Uart3100CheckFreeSpace(_x) (((int16_t)max3100_tx_extract_idx - max3100_tx_insert_idx + MAX3100_TX_BUF_LEN) % MAX3100_TX_BUF_LEN >= 1)
|
||||
#define Uart3100Transmit(_x) max3100_putchar(_x)
|
||||
#define Uart3100Init() {} /* Already initialized as a module */
|
||||
#define Uart3100CheckFreeSpace(_len) (((int16_t)max3100_tx_extract_idx - max3100_tx_insert_idx + MAX3100_TX_BUF_LEN - 1) % MAX3100_TX_BUF_LEN >= _len)
|
||||
|
||||
#define Uart3100Transmit(_x) { max3100_putchar(_x); }
|
||||
#define Uart3100SendMessage() {}
|
||||
#define Uart3100Getch() ({\
|
||||
uint8_t ret = max3100_rx_buf[max3100_rx_extract_idx]; \
|
||||
@@ -74,11 +81,13 @@ extern uint8_t max3100_rx_buf[MAX3100_RX_BUF_LEN];
|
||||
#define Uart3100ChAvailable() (max3100_rx_extract_idx != max3100_rx_insert_idx)
|
||||
|
||||
static inline void max3100_transmit(uint16_t data) {
|
||||
SSPDR = data >> 8;
|
||||
SSPDR = data & 0xff;
|
||||
SpiClrCPHA(); /* Data captured on first clock edge transition */
|
||||
Max3100Select();
|
||||
SpiClearRti();
|
||||
SpiEnableRti(); /* enable rx fifo time out */
|
||||
SpiEnable();
|
||||
// SSPDR = data >> 8;
|
||||
// SSPDR = data & 0xff;
|
||||
SSPDR = data;
|
||||
}
|
||||
|
||||
#define Max3100TransmitConf(_conf) max3100_transmit((_conf) | MAX3100_WRITE_CONF)
|
||||
@@ -93,10 +102,10 @@ static inline void max3100_read_data(void) {
|
||||
|
||||
static inline void max3100_flush( void ) {
|
||||
if (max3100_status == MAX3100_STATUS_IDLE
|
||||
&& max3100_tx_extract_idx != max3100_tx_insert_idx) {
|
||||
&& max3100_tx_extract_idx != max3100_tx_insert_idx) {
|
||||
Max3100TransmitData(max3100_tx_buf[max3100_tx_extract_idx]);
|
||||
max3100_tx_extract_idx++; /* automatic overflow since len=256 */
|
||||
max3100_status == MAX3100_STATUS_WRITING;
|
||||
max3100_status = MAX3100_STATUS_WRITING;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -113,13 +122,18 @@ static inline void max3100_putchar(char c) {
|
||||
}
|
||||
|
||||
extern void max3100_init( void );
|
||||
extern void max3100_test_write( void );
|
||||
extern void max3100_debug( void );
|
||||
|
||||
static inline void max3100_event( void ) {
|
||||
if (read_bytes) {
|
||||
read_bytes = false;
|
||||
max3100_debug();
|
||||
}
|
||||
if (max3100_status == MAX3100_STATUS_IDLE) {
|
||||
if (max3100_data_available)
|
||||
if (max3100_data_available) {
|
||||
max3100_data_available = false;
|
||||
max3100_read_data();
|
||||
else
|
||||
} else
|
||||
max3100_flush();
|
||||
}
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user