Mirrors_Framework/paparazzi
1
0
Fork 0
mirror of https://github.com/paparazzi/paparazzi.git synced 2026-05-29 19:17:28 +08:00
Code Issues Actions 28 Packages Projects Releases Wiki Activity

[chibios] update linker script for F1 with luftboot and fix warning

Browse Source
This commit is contained in:
Gautier Hattenberger
2017-02-23 21:58:37 +01:00
parent 40160f1279
commit 7282b29560
2 changed files with 88 additions and 53 deletions
Download Patch File Download Diff File Expand all files Collapse all files
sw/airborne/arch/chibios/STM32F107xC_luftboot.ld
+85 -50
View File
@@ -1,50 +1,85 @@
/* /*
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License"); Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License. you may not use this file except in compliance with the License.
You may obtain a copy of the License at You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0 http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS, distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and See the License for the specific language governing permissions and
limitations under the License. limitations under the License.
*/ */
/* /*
* ST32F107xC memory setup. * ST32F107xC memory setup.
*/ * with LUFTBOOT offset
MEMORY */
{ MEMORY
flash : org = 0x08002000, len = 256k {
ram0 : org = 0x20000000, len = 64k flash0 : org = 0x08002000, len = 256k
ram1 : org = 0x00000000, len = 0 flash1 : org = 0x00000000, len = 0
ram2 : org = 0x00000000, len = 0 flash2 : org = 0x00000000, len = 0
ram3 : org = 0x00000000, len = 0 flash3 : org = 0x00000000, len = 0
ram4 : org = 0x00000000, len = 0 flash4 : org = 0x00000000, len = 0
ram5 : org = 0x00000000, len = 0 flash5 : org = 0x00000000, len = 0
ram6 : org = 0x00000000, len = 0 flash6 : org = 0x00000000, len = 0
ram7 : org = 0x00000000, len = 0 flash7 : org = 0x00000000, len = 0
} ram0 : org = 0x20000000, len = 64k
ram1 : org = 0x00000000, len = 0
/* RAM region to be used for Main stack. This stack accommodates the processing ram2 : org = 0x00000000, len = 0
of all exceptions and interrupts*/ ram3 : org = 0x00000000, len = 0
REGION_ALIAS("MAIN_STACK_RAM", ram0); ram4 : org = 0x00000000, len = 0
ram5 : org = 0x00000000, len = 0
/* RAM region to be used for the process stack. This is the stack used by ram6 : org = 0x00000000, len = 0
the main() function.*/ ram7 : org = 0x00000000, len = 0
REGION_ALIAS("PROCESS_STACK_RAM", ram0); }
/* RAM region to be used for data segment.*/ /* For each data/text section two region are defined, a virtual region
REGION_ALIAS("DATA_RAM", ram0); and a load region (_LMA suffix).*/
/* RAM region to be used for BSS segment.*/ /* Flash region to be used for exception vectors.*/
REGION_ALIAS("BSS_RAM", ram0); REGION_ALIAS("VECTORS_FLASH", flash0);
REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
/* RAM region to be used for the default heap.*/
REGION_ALIAS("HEAP_RAM", ram0); /* Flash region to be used for constructors and destructors.*/
REGION_ALIAS("XTORS_FLASH", flash0);
INCLUDE rules.ld REGION_ALIAS("XTORS_FLASH_LMA", flash0);
/* Flash region to be used for code text.*/
REGION_ALIAS("TEXT_FLASH", flash0);
REGION_ALIAS("TEXT_FLASH_LMA", flash0);
/* Flash region to be used for read only data.*/
REGION_ALIAS("RODATA_FLASH", flash0);
REGION_ALIAS("RODATA_FLASH_LMA", flash0);
/* Flash region to be used for various.*/
REGION_ALIAS("VARIOUS_FLASH", flash0);
REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);
/* Flash region to be used for RAM(n) initialization data.*/
REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);
/* RAM region to be used for Main stack. This stack accommodates the processing
of all exceptions and interrupts.*/
REGION_ALIAS("MAIN_STACK_RAM", ram0);
/* RAM region to be used for the process stack. This is the stack used by
the main() function.*/
REGION_ALIAS("PROCESS_STACK_RAM", ram0);
/* RAM region to be used for data segment.*/
REGION_ALIAS("DATA_RAM", ram0);
REGION_ALIAS("DATA_RAM_LMA", flash0);
/* RAM region to be used for BSS segment.*/
REGION_ALIAS("BSS_RAM", ram0);
/* RAM region to be used for the default heap.*/
REGION_ALIAS("HEAP_RAM", ram0);
INCLUDE rules.ld
sw/airborne/arch/chibios/mcu_periph/gpio_arch.c
+3 -3
View File
@@ -62,13 +62,13 @@ void gpio_setup_pin_af(ioportid_t port, uint16_t pin, uint8_t af, bool is_output
{ {
chSysLock(); chSysLock();
// architecture dependent settings // architecture dependent settings
#if defined(__STM32F10x_H) || defined(__STM32F105xC_H) || defined (__STM32F107xC_H) #if defined(STM32F1)
// STM32F1xx
// FIXME: STM32F1xx doesn't support several alternate modes, is it needed for drivers? // FIXME: STM32F1xx doesn't support several alternate modes, is it needed for drivers?
(void)port; (void)port;
(void)pin; (void)pin;
(void)af; (void)af;
#elif defined(__STM32F4xx_H) || defined(__STM32F7xx_H) (void)is_output;
#elif defined(STM32F4) || defined(STM32F7)
// STM32F4xx and STM32F7xx // STM32F4xx and STM32F7xx
if (af) { if (af) {
palSetPadMode(port, pin, PAL_MODE_ALTERNATE(af)); palSetPadMode(port, pin, PAL_MODE_ALTERNATE(af));