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[sbus] support end bytes for SBUS2
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@@ -32,7 +32,12 @@
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* SBUS protocol and state machine status
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*/
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#define SBUS_START_BYTE 0x0f
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#define SBUS_END_BYTE 0x00
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#define SBUS_END_BYTE_0 0x00 // only possible end byte for SBUS v1
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#define SBUS_END_BYTE_1 0x04 // with SBUS v2 and 14CH mode
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#define SBUS_END_BYTE_2 0x14 // end byte is cycling
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#define SBUS_END_BYTE_3 0x24 // through the following 4 types
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#define SBUS_END_BYTE_4 0x34 // in order
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#define SBUS_END_BYTE_5 0x08 // with SBUS v2 and 12CH mode
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#define SBUS_BIT_PER_CHANNEL 11
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#define SBUS_BIT_PER_BYTE 8
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#define SBUS_FLAGS_BYTE 22
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@@ -128,8 +133,13 @@ void sbus_common_decode_event(struct Sbus *sbus_p, struct uart_periph *dev)
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sbus_p->buffer[sbus_p->idx] = rbyte;
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sbus_p->idx++;
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if (sbus_p->idx == SBUS_BUF_LENGTH) {
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// Decode if last byte is the correct end byte
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if (rbyte == SBUS_END_BYTE) {
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// Decode if last byte is (one of) the correct end byte
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if (rbyte == SBUS_END_BYTE_0 ||
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rbyte == SBUS_END_BYTE_1 ||
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rbyte == SBUS_END_BYTE_2 ||
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rbyte == SBUS_END_BYTE_3 ||
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rbyte == SBUS_END_BYTE_4 ||
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rbyte == SBUS_END_BYTE_5) {
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decode_sbus_buffer(sbus_p->buffer, sbus_p->pulses, &sbus_p->frame_available, sbus_p->ppm);
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}
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sbus_p->status = SBUS_STATUS_UNINIT;
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