diff --git a/sw/airborne/arch/lpc21/subsystems/radio_control/ppm_arch.h b/sw/airborne/arch/lpc21/subsystems/radio_control/ppm_arch.h index d28ab06338..4374897e5e 100644 --- a/sw/airborne/arch/lpc21/subsystems/radio_control/ppm_arch.h +++ b/sw/airborne/arch/lpc21/subsystems/radio_control/ppm_arch.h @@ -35,7 +35,7 @@ * */ #define RC_PPM_TICKS_OF_USEC(_v) cpu_ticks_of_usec((_v)) -#define RC_PPM_SIGNED_TICKS_OF_USEC(_v) (int32_t)((_v) * sys_time.cpu_ticks_per_sec * 1e-6) +#define RC_PPM_SIGNED_TICKS_OF_USEC(_v) ((_v) * sys_time.cpu_ticks_per_sec * 1e-6) #define USEC_OF_RC_PPM_TICKS(_v) usec_of_cpu_ticks((_v)) #define PPM_NB_CHANNEL RADIO_CONTROL_NB_CHANNEL diff --git a/sw/airborne/arch/stm32/mcu_periph/sys_time_arch.c b/sw/airborne/arch/stm32/mcu_periph/sys_time_arch.c index baf3cde12b..b550da16e4 100644 --- a/sw/airborne/arch/stm32/mcu_periph/sys_time_arch.c +++ b/sw/airborne/arch/stm32/mcu_periph/sys_time_arch.c @@ -37,12 +37,11 @@ /** Initialize SysTick. * Generate SysTick interrupt every sys_time.resolution_cpu_ticks - * The timer interrupt is activated on the transition from 1 to 0, - * therefore it activates every n+1 clock ticks. */ void sys_time_arch_init( void ) { - /* 72MHz / 8 => 9000000 counts per second */ - sys_time.cpu_ticks_per_sec = AHB_CLK / 8; + /* run cortex systick timer with 72MHz */ + systick_set_clocksource(STK_CTRL_CLKSOURCE_AHB); + sys_time.cpu_ticks_per_sec = AHB_CLK; /* cpu ticks per desired sys_time timer step */ sys_time.resolution_cpu_ticks = (uint32_t)(sys_time.resolution_sec * sys_time.cpu_ticks_per_sec + 0.5); @@ -51,10 +50,9 @@ void sys_time_arch_init( void ) { sys_time.resolution_sec = (float)sys_time.resolution_cpu_ticks / sys_time.cpu_ticks_per_sec; sys_time.ticks_per_sec = (uint32_t)(sys_time.cpu_ticks_per_sec / sys_time.resolution_cpu_ticks + 0.5); - /* set clock for cortex systick to AHB_CLK / 8 */ - systick_set_clocksource(STK_CTRL_CLKSOURCE_AHB_DIV8); - - /* 8999 would be one interrupt every 1ms */ + /* The timer interrupt is activated on the transition from 1 to 0, + * therefore it activates every n+1 clock ticks. + */ systick_set_reload(sys_time.resolution_cpu_ticks-1); systick_interrupt_enable(); diff --git a/sw/airborne/arch/stm32/subsystems/radio_control/ppm_arch.c b/sw/airborne/arch/stm32/subsystems/radio_control/ppm_arch.c index ad69c577c2..566ae2c4f0 100644 --- a/sw/airborne/arch/stm32/subsystems/radio_control/ppm_arch.c +++ b/sw/airborne/arch/stm32/subsystems/radio_control/ppm_arch.c @@ -97,8 +97,8 @@ void ppm_arch_init ( void ) { timer_set_mode(PPM_TIMER, TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); timer_set_period(PPM_TIMER, 0xFFFF); - /* run ppm timer at cpu freq / 8 */ - timer_set_prescaler(PPM_TIMER, 7); + /* run ppm timer at cpu freq / 9 = 8MHz */ + timer_set_prescaler(PPM_TIMER, 8); /* TIM configuration: Input Capture mode --------------------- The Rising edge is used as active edge, diff --git a/sw/airborne/arch/stm32/subsystems/radio_control/ppm_arch.h b/sw/airborne/arch/stm32/subsystems/radio_control/ppm_arch.h index b73b18f1b8..66c7238e30 100644 --- a/sw/airborne/arch/stm32/subsystems/radio_control/ppm_arch.h +++ b/sw/airborne/arch/stm32/subsystems/radio_control/ppm_arch.h @@ -33,13 +33,11 @@ #include "mcu_periph/sys_time.h" /** - * While the ppm counter is currently running at the same speed as - * the systick counter, there is no reason for this to be true. - * Let's add a pair of macros to make it possible for them to be different. + * The ppm counter is running at cpu freq / 9 */ -#define RC_PPM_TICKS_OF_USEC(_v) cpu_ticks_of_usec((_v)) -#define RC_PPM_SIGNED_TICKS_OF_USEC(_v) (int32_t)((_v) * sys_time.cpu_ticks_per_sec * 1e-6) -#define USEC_OF_RC_PPM_TICKS(_v) usec_of_cpu_ticks((_v)) +#define RC_PPM_TICKS_OF_USEC(_v) ((_v) * (AHB_CLK / 9000000)) +#define RC_PPM_SIGNED_TICKS_OF_USEC(_v) ((_v) * (AHB_CLK / 9000000)) +#define USEC_OF_RC_PPM_TICKS(_v) ((_v) / (AHB_CLK / 9000000)) #define PPM_NB_CHANNEL RADIO_CONTROL_NB_CHANNEL