diff --git a/conf/boards/krooz_1.0.makefile b/conf/boards/krooz_1.0.makefile new file mode 100644 index 0000000000..1aed55795e --- /dev/null +++ b/conf/boards/krooz_1.0.makefile @@ -0,0 +1,67 @@ +# Hey Emacs, this is a -*- makefile -*- +# +# krooz_1.0.makefile +# +# +# + +BOARD=krooz +BOARD_VERSION=1.0 +BOARD_CFG=\"boards/$(BOARD)_$(BOARD_VERSION).h\" + +ARCH=stm32 +ARCH_L=f4 +ARCH_DIR=stm32 +SRC_ARCH=arch/$(ARCH_DIR) +$(TARGET).ARCHDIR = $(ARCH) +$(TARGET).LDSCRIPT=$(SRC_ARCH)/krooz.ld + +HARD_FLOAT=yes + +# ----------------------------------------------------------------------- + +# default flash mode is via usb dfu bootloader +FLASH_MODE ?= DFU + + +ifndef NO_LUFTBOOT +$(TARGET).LDFLAGS+=-Wl,-Ttext=0x8004000 +endif + +# +# +# some default values shared between different firmwares +# +# + + +# +# default LED configuration +# +RADIO_CONTROL_LED ?= none +BARO_LED ?= none +AHRS_ALIGNER_LED ?= 2 +GPS_LED ?= none +SYS_TIME_LED ?= 1 + +# +# default uart configuration +# +RADIO_CONTROL_SPEKTRUM_PRIMARY_PORT ?= UART1 +RADIO_CONTROL_SPEKTRUM_SECONDARY_PORT ?= UART2 + +MODEM_PORT ?= UART5 +MODEM_BAUD ?= B57600 + +GPS_PORT ?= UART3 +GPS_BAUD ?= B38400 + +# +# default actuator configuration +# +# you can use different actuators by adding a configure option to your firmware section +# e.g. +# +ACTUATORS ?= actuators_pwm diff --git a/sw/airborne/arch/stm32/krooz.ld b/sw/airborne/arch/stm32/krooz.ld new file mode 100644 index 0000000000..04d5a71a02 --- /dev/null +++ b/sw/airborne/arch/stm32/krooz.ld @@ -0,0 +1,35 @@ +/* + * Hey Emacs, this is a -*- makefile -*- + * + * Copyright (C) 2012 Sergey Krukowski + * + * This file is part of Paparazzi. + * + * Paparazzi is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * Paparazzi is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with Paparazzi; see the file COPYING. If not, write to + * the Free Software Foundation, 59 Temple Place - Suite 330, + * Boston, MA 02111-1307, USA. + */ + +/* Linker script for Krooz (STM32F405, 1024K flash, 192K RAM). */ + +/* Define memory regions. */ +MEMORY +{ + ram (rwx) : ORIGIN = 0x20000000, LENGTH = 128K + /* Leaving 2k of space at the end of rom for stored settings */ + rom (rx) : ORIGIN = 0x08004000, LENGTH = 1022K +} + +/* Include the common ld script. */ +INCLUDE libopencm3_stm32f4.ld diff --git a/sw/airborne/boards/krooz_1.0.h b/sw/airborne/boards/krooz_1.0.h new file mode 100644 index 0000000000..7f0d3f843a --- /dev/null +++ b/sw/airborne/boards/krooz_1.0.h @@ -0,0 +1,387 @@ +#ifndef CONFIG_KROOZ_1_0_H +#define CONFIG_KROOZ_1_0_H + +#define BOARD_KROOZ + +/* Krooz/M has a 12MHz external clock and 168MHz internal. */ +#define EXT_CLK 12000000 +#define AHB_CLK 168000000 + +/* + * Onboard LEDs + */ + +/* red, on PA8 */ +#ifndef USE_LED_1 +#define USE_LED_1 1 +#endif +#define LED_1_GPIO GPIOA +#define LED_1_GPIO_CLK RCC_AHB1ENR_IOPAEN +#define LED_1_GPIO_PIN GPIO13 +#define LED_1_GPIO_ON gpio_clear +#define LED_1_GPIO_OFF gpio_set +#define LED_1_AFIO_REMAP ((void)0) + +/* green, shared with JTAG_TRST */ +#ifndef USE_LED_2 +#define USE_LED_2 1 +#endif +#define LED_2_GPIO GPIOA +#define LED_2_GPIO_CLK RCC_AHB1ENR_IOPAEN +#define LED_2_GPIO_PIN GPIO14 +#define LED_2_GPIO_ON gpio_clear +#define LED_2_GPIO_OFF gpio_set +#define LED_2_AFIO_REMAP ((void)0) + +/* green, shared with ADC12 (ADC_6 on connector ANALOG2) */ +#ifndef USE_LED_3 +#define USE_LED_3 1 +#endif +#define LED_3_GPIO GPIOA +#define LED_3_GPIO_CLK RCC_AHB1ENR_IOPAEN +#define LED_3_GPIO_PIN GPIO15 +#define LED_3_GPIO_ON gpio_clear +#define LED_3_GPIO_OFF gpio_set +#define LED_3_AFIO_REMAP ((void)0) + +/* + * not actual LEDS, used as GPIOs + */ + +/* PB4, Camera power On/Off */ +#define CAM_SW_GPIO GPIOB +#define CAM_SW_GPIO_CLK RCC_AHB1ENR_IOPBEN +#define CAM_SW_GPIO_PIN GPIO4 +#define CAM_SW_AFIO_REMAP ((void)0) + +/* PC2, Camera shot */ +#define CAM_SH_GPIO GPIOC +#define CAM_SH_GPIO_CLK RCC_AHB1ENR_IOPCEN +#define CAM_SH_GPIO_PIN GPIO2 +#define CAM_SH_AFIO_REMAP ((void)0) + +/* PC15, Camera video */ +#define CAM_V_GPIO GPIOC +#define CAM_V_GPIO_CLK RCC_AHB1ENR_IOPCEN +#define CAM_V_GPIO_PIN GPIO15 +#define CAM_V_AFIO_REMAP ((void)0) + +#define BEEPER_GPIO GPIOC +#define BEEPER_GPIO_CLK RCC_AHB1ENR_IOPCEN +#define BEEPER_GPIO_PIN GPIO14 +#define BEEPER_AFIO_REMAP ((void)0) + + +/* Default actuators driver */ +#define DEFAULT_ACTUATORS "subsystems/actuators/actuators_pwm.h" +#define ActuatorDefaultSet(_x,_y) ActuatorPwmSet(_x,_y) +#define ActuatorsDefaultInit() ActuatorsPwmInit() +#define ActuatorsDefaultCommit() ActuatorsPwmCommit() + +//#define DefaultVoltageOfAdc(adc) (0.006185*adc) +#define DefaultVoltageOfAdc(adc) (0.008874*adc) + + + +/* Onboard ADCs */ +#define USE_AD_TIM4 1 +/* + ADC1 PC3/ADC13 + ADC2 PC0/ADC10 + ADC3 PC1/ADC11 + ADC4 PC5/ADC15 + ADC6 PC2/ADC12 + BATT PC4/ADC14 +*/ +#define BOARD_ADC_CHANNEL_1 12 +#define BOARD_ADC_CHANNEL_2 10 +#define BOARD_ADC_CHANNEL_3 11 +#define BOARD_ADC_CHANNEL_4 13 //15 +#define BOARD_ADC_CHANNEL_5 14 +// we can only use ADC1,2,3; the last channel is for bat monitoring +#define BOARD_ADC_CHANNEL_6 15 //13 + +/* provide defines that can be used to access the ADC_x in the code or airframe file + * these directly map to the index number of the 4 adc channels defined above + * 4th (index 3) is used for bat monitoring by default + */ +#define ADC_1 0 +#define ADC_2 1 +#define ADC_3 2 +#define ADC_4 3 +#define ADC_5 4 +#define ADC_6 5 + +/* allow to define ADC_CHANNEL_VSUPPLY in the airframe file*/ +#ifndef ADC_CHANNEL_VSUPPLY +#define ADC_CHANNEL_VSUPPLY ADC_4 +#endif + +#define ADC_CHANNEL_CAM1 ADC_1 + +#ifndef USE_AD1 +#define USE_AD1 1 +#endif +/* provide defines that can be used to access the ADC_x in the code or airframe file + * these directly map to the index number of the 4 adc channels defined above + * 4th (index 3) is used for bat monitoring by default + */ +#define ADC_1 ADC1_C1 +#ifdef USE_ADC_1 +#ifndef ADC_1_GPIO_CLOCK_PORT +#define ADC_1_GPIO_CLOCK_PORT RCC_AHB1ENR_IOPBEN +#define ADC_1_INIT() gpio_mode_setup(GPIOB, GPIO_MODE_ANALOG, GPIO_PUPD_NONE, GPIO0) +#endif +#define USE_AD1_1 1 +#else +#define ADC_1_GPIO_CLOCK_PORT 0 +#define ADC_1_INIT() {} +#endif + +#define ADC_2 ADC1_C2 +#ifdef USE_ADC_2 +#ifndef ADC_2_GPIO_CLOCK_PORT +#define ADC_2_GPIO_CLOCK_PORT RCC_AHB1ENR_IOPBEN +#define ADC_2_INIT() gpio_mode_setup(GPIOB, GPIO_MODE_ANALOG, GPIO_PUPD_NONE, GPIO1) +#endif +#define USE_AD1_2 1 +#else +#define ADC_2_GPIO_CLOCK_PORT 0 +#define ADC_2_INIT() {} +#endif + +#define ADC_3 ADC1_C3 +#ifdef USE_ADC_3 +#ifndef ADC_3_GPIO_CLOCK_PORT +#define ADC_3_GPIO_CLOCK_PORT RCC_AHB1ENR_IOPCEN +#define ADC_3_INIT() gpio_mode_setup(GPIOC, GPIO_MODE_ANALOG, GPIO_PUPD_NONE, GPIO4) +#endif +#define USE_AD1_3 1 +#else +#define ADC_3_GPIO_CLOCK_PORT 0 +#define ADC_3_INIT() {} +#endif + +#define ADC_4 ADC1_C4 +//#ifdef USE_ADC_4 +#ifndef ADC_4_GPIO_CLOCK_PORT +#define ADC_4_GPIO_CLOCK_PORT RCC_AHB1ENR_IOPAEN +#define ADC_4_INIT() gpio_mode_setup(GPIOA, GPIO_MODE_ANALOG, GPIO_PUPD_NONE, GPIO4) +#endif +#define USE_AD1_4 1 +//#else +//#define ADC_4_GPIO_CLOCK_PORT 0 +//#define ADC_4_INIT() {} +//#endif + +#ifdef USE_AD1 +#define ADC1_GPIO_INIT(gpio) { \ + ADC_1_INIT(); \ + ADC_2_INIT(); \ + ADC_3_INIT(); \ + ADC_4_INIT(); \ + } +#endif // USE_AD1 + +#define BOARD_HAS_BARO 1 + + +/* I2C mapping */ +#define GPIO_I2C1_SCL GPIO8 +#define GPIO_I2C1_SDA GPIO7 +#define GPIO_I2C2_SCL GPIO10 +#define GPIO_I2C2_SDA GPIO11 + + +/* PWM */ +#define PWM_USE_TIM2 1 +#define PWM_USE_TIM3 1 +#define PWM_USE_TIM4 1 +#define PWM_USE_TIM5 1 + +#define USE_PWM0 1 +#define USE_PWM1 1 +#define USE_PWM2 1 +#define USE_PWM3 1 +#define USE_PWM4 1 +#define USE_PWM5 1 +#define USE_PWM6 1 +#define USE_PWM7 1 +#define USE_PWM8 1 +#define USE_PWM9 1 +#define USE_PWM10 1 + +// PWM_SERVO_x is the index of the servo in the actuators_pwm_values array +#if USE_PWM0 +#define PWM_SERVO_0 0 +#define PWM_SERVO_0_TIMER TIM3 +#define PWM_SERVO_0_RCC_IOP RCC_AHB1ENR_IOPCEN +#define PWM_SERVO_0_GPIO GPIOC +#define PWM_SERVO_0_PIN GPIO6 +#define PWM_SERVO_0_AF GPIO_AF1 +#define PWM_SERVO_0_OC TIM_OC1 +#define PWM_SERVO_0_OC_BIT (1<<0) +#else +#define PWM_SERVO_0_OC_BIT 0 +#endif + +#if USE_PWM1 +#define PWM_SERVO_1 1 +#define PWM_SERVO_1_TIMER TIM3 +#define PWM_SERVO_1_RCC_IOP RCC_AHB1ENR_IOPCEN +#define PWM_SERVO_1_GPIO GPIOC +#define PWM_SERVO_1_PIN GPIO7 +#define PWM_SERVO_1_AF GPIO_AF1 +#define PWM_SERVO_1_OC TIM_OC2 +#define PWM_SERVO_1_OC_BIT (1<<1) +#else +#define PWM_SERVO_1_OC_BIT 0 +#endif + +#if USE_PWM2 +#define PWM_SERVO_2 2 +#define PWM_SERVO_2_TIMER TIM3 +#define PWM_SERVO_2_RCC_IOP RCC_AHB1ENR_IOPCEN +#define PWM_SERVO_2_GPIO GPIOC +#define PWM_SERVO_2_PIN GPIO8 +#define PWM_SERVO_2_AF GPIO_AF1 +#define PWM_SERVO_2_OC TIM_OC3 +#define PWM_SERVO_2_OC_BIT (1<<2) +#else +#define PWM_SERVO_2_OC_BIT 0 +#endif + +#if USE_PWM3 +#define PWM_SERVO_3_IDX 3 +#define PWM_SERVO_3_TIMER TIM3 +#define PWM_SERVO_3_RCC_IOP RCC_AHB1ENR_IOPCEN +#define PWM_SERVO_3_GPIO GPIOC +#define PWM_SERVO_3_PIN GPIO9 +#define PWM_SERVO_3_AF GPIO_AF1 +#define PWM_SERVO_3_OC TIM_OC4 +#define PWM_SERVO_3_OC_BIT (1<<3) +#else +#define PWM_SERVO_3_OC_BIT 0 +#endif + +#if USE_PWM4 +#define PWM_SERVO_4 4 +#define PWM_SERVO_4_TIMER TIM4 +#define PWM_SERVO_4_RCC_IOP RCC_AHB1ENR_IOPBEN +#define PWM_SERVO_4_GPIO GPIOB +#define PWM_SERVO_4_PIN GPIO6 +#define PWM_SERVO_4_AF GPIO_AF1 +#define PWM_SERVO_4_OC TIM_OC1 +#define PWM_SERVO_4_OC_BIT (1<<0) +#else +#define PWM_SERVO_4_OC_BIT 0 +#endif + +#if USE_PWM5 +#define PWM_SERVO_5 5 +#define PWM_SERVO_5_TIMER TIM4 +#define PWM_SERVO_5_RCC_IOP RCC_AHB1ENR_IOPBEN +#define PWM_SERVO_5_GPIO GPIOB +#define PWM_SERVO_5_PIN GPIO7 +#define PWM_SERVO_5_AF GPIO_AF1 +#define PWM_SERVO_5_OC TIM_OC2 +#define PWM_SERVO_5_OC_BIT (1<<1) +#else +#define PWM_SERVO_5_OC_BIT 0 +#endif + +#if USE_PWM6 +#define PWM_SERVO_6 6 +#define PWM_SERVO_6_TIMER TIM5 +#define PWM_SERVO_6_RCC_IOP RCC_AHB1ENR_IOPAEN +#define PWM_SERVO_6_GPIO GPIOA +#define PWM_SERVO_6_PIN GPIO0 +#define PWM_SERVO_6_AF GPIO_AF1 +#define PWM_SERVO_6_OC TIM_OC1 +#define PWM_SERVO_6_OC_BIT (1<<0) +#else +#define PWM_SERVO_6_OC_BIT 0 +#endif + +#if USE_PWM7 +#define PWM_SERVO_7 7 +#define PWM_SERVO_7_TIMER TIM5 +#define PWM_SERVO_7_RCC_IOP RCC_AHB1ENR_IOPAEN +#define PWM_SERVO_7_GPIO GPIOA +#define PWM_SERVO_7_PIN GPIO1 +#define PWM_SERVO_7_AF GPIO_AF1 +#define PWM_SERVO_7_OC TIM_OC2 +#define PWM_SERVO_7_OC_BIT (1<<1) +#else +#define PWM_SERVO_7_OC_BIT 0 +#endif + +#if USE_PWM8 +#define PWM_SERVO_8 8 +#define PWM_SERVO_8_TIMER TIM5 +#define PWM_SERVO_8_RCC_IOP RCC_AHB1ENR_IOPAEN +#define PWM_SERVO_8_GPIO GPIOA +#define PWM_SERVO_8_PIN GPIO2 +#define PWM_SERVO_8_AF GPIO_AF1 +#define PWM_SERVO_8_OC TIM_OC3 +#define PWM_SERVO_8_OC_BIT (1<<2) +#else +#define PWM_SERVO_8_OC_BIT 0 +#endif + +#if USE_PWM9 +#define PWM_SERVO_9 9 +#define PWM_SERVO_9_TIMER TIM5 +#define PWM_SERVO_9_RCC_IOP RCC_AHB1ENR_IOPAEN +#define PWM_SERVO_9_GPIO GPIOA +#define PWM_SERVO_9_PIN GPIO3 +#define PWM_SERVO_9_AF GPIO_AF1 +#define PWM_SERVO_9_OC TIM_OC4 +#define PWM_SERVO_9_OC_BIT (1<<3) +#else +#define PWM_SERVO_9_OC_BIT 0 +#endif + +#if USE_PWM10 +#define PWM_SERVO_10 10 +#define PWM_SERVO_10_TIMER TIM2 +#define PWM_SERVO_10_RCC_IOP RCC_AHB1ENR_IOPBEN +#define PWM_SERVO_10_GPIO GPIOB +#define PWM_SERVO_10_PIN GPIO3 +#define PWM_SERVO_10_AF GPIO_AF1 +#define PWM_SERVO_10_OC TIM_OC2 +#define PWM_SERVO_10_OC_BIT (1<<1) +#else +#define PWM_SERVO_10_OC_BIT 0 +#endif + +#define PWM_TIM2_CHAN_MASK (PWM_SERVO_10_OC_BIT) +#define PWM_TIM3_CHAN_MASK (PWM_SERVO_0_OC_BIT|PWM_SERVO_1_OC_BIT|PWM_SERVO_2_OC_BIT|PWM_SERVO_3_OC_BIT) +#define PWM_TIM4_CHAN_MASK (PWM_SERVO_4_OC_BIT|PWM_SERVO_5_OC_BIT) +#define PWM_TIM5_CHAN_MASK (PWM_SERVO_6_OC_BIT|PWM_SERVO_7_OC_BIT|PWM_SERVO_8_OC_BIT|PWM_SERVO_9_OC_BIT) + + +/* PPM */ + +#define USE_PPM_TIM1 1 + +#define PPM_CHANNEL TIM_IC1 +#define PPM_TIMER_INPUT TIM_IC_IN_TI1 +#define PPM_IRQ NVIC_TIM1_CC_IRQ +#define PPM_IRQ2 NVIC_TIM1_UP_TIM10_IRQ +#define PPM_IRQ_FLAGS TIM_DIER_CC1IE +#define PPM_IRQ_CCIF TIM_SR_CC1IF +#define PPM_GPIO_PERIPHERAL RCC_AHB1ENR_IOPAEN +#define PPM_GPIO_PORT GPIOA +#define PPM_GPIO_PIN GPIO8 +#define PPM_GPIO_AF GPIO_AF1 + +/* + * Spektrum + */ +/* The line that is pulled low at power up to initiate the bind process */ +#define SPEKTRUM_BIND_PIN GPIO8 +#define SPEKTRUM_BIND_PIN_PORT GPIOA +#define SPEKTRUM_BIND_PIN_RCC_IOP RCC_AHB1ENR_IOPAEN + +#endif /* CONFIG_KROOZ_1_0_H */