diff --git a/conf/boards/apogee_0.99.makefile b/conf/boards/apogee_0.99.makefile index 3f7d720543..f7c87e8ecc 100644 --- a/conf/boards/apogee_0.99.makefile +++ b/conf/boards/apogee_0.99.makefile @@ -2,7 +2,6 @@ # # apogee_0.99.makefile # -# # BOARD=apogee diff --git a/sw/airborne/arch/stm32/led_hw.h b/sw/airborne/arch/stm32/led_hw.h index fe1311cdc6..a98c4ae452 100644 --- a/sw/airborne/arch/stm32/led_hw.h +++ b/sw/airborne/arch/stm32/led_hw.h @@ -22,13 +22,8 @@ #ifndef LED_HW_H #define LED_HW_H -#if defined(STM32F1) -#include -#include -#elif defined(STM32F4) -#include -#include -#endif +#include +#include #include BOARD_CONFIG diff --git a/sw/airborne/arch/stm32/mcu_arch.c b/sw/airborne/arch/stm32/mcu_arch.c index 2159968d10..d5d8be1b28 100644 --- a/sw/airborne/arch/stm32/mcu_arch.c +++ b/sw/airborne/arch/stm32/mcu_arch.c @@ -31,13 +31,11 @@ #include BOARD_CONFIG #include +#include +#include #if defined(STM32F1) -#include -#include #include #elif defined(STM32F4) -#include -#include #include #endif #include diff --git a/sw/airborne/arch/stm32/mcu_periph/adc_arch.c b/sw/airborne/arch/stm32/mcu_periph/adc_arch.c index 578e4b2154..6829279dad 100644 --- a/sw/airborne/arch/stm32/mcu_periph/adc_arch.c +++ b/sw/airborne/arch/stm32/mcu_periph/adc_arch.c @@ -84,17 +84,15 @@ */ #include "mcu_periph/adc.h" + +#include +#include #if defined(STM32F1) -#include #include -#include -#include #elif defined(STM32F4) -#include #include -#include -#include #endif +#include #include #include #include "std.h" @@ -263,9 +261,9 @@ static inline void adc_init_rcc( void ) rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN | RCC_APB2ENR_IOPCEN); #elif defined(STM32F4) - rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPBEN | - RCC_AHB1ENR_IOPCEN); - adc_set_clk_prescale(ADC_CCR_ADCPRE_BY2); + rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPBEN | + RCC_AHB1ENR_IOPCEN); + adc_set_clk_prescale(ADC_CCR_ADCPRE_BY2); #endif /* Enable ADC peripheral clocks. */ @@ -284,7 +282,7 @@ static inline void adc_init_rcc( void ) timer_set_period(timer, 0xFF); timer_set_prescaler(timer, 0x8); #elif defined(STM32F4) - timer_set_period(timer, 0xFFFF); + timer_set_period(timer, 0xFFFF); timer_set_prescaler(timer, 0x53); #endif //timer_set_clock_division(timer, 0x0); @@ -302,7 +300,7 @@ static inline void adc_init_irq( void ) nvic_set_priority(NVIC_ADC1_2_IRQ, 0); nvic_enable_irq(NVIC_ADC1_2_IRQ); #elif defined(STM32F4) - nvic_set_priority(NVIC_ADC_IRQ, 0); + nvic_set_priority(NVIC_ADC_IRQ, 0); nvic_enable_irq(NVIC_ADC_IRQ); #endif } @@ -410,21 +408,21 @@ PRINT_CONFIG_MSG("Info: Using TIM4 for ADC") #if defined(STM32F1) adc_enable_external_trigger_injected(adc, ADC_CR2_JEXTSEL_TIM4_TRGO); #elif defined(STM32F4) - adc_enable_external_trigger_injected(adc, ADC_CR2_JEXTSEL_TIM4_TRGO, ADC_CR2_JEXTEN_BOTH_EDGES); + adc_enable_external_trigger_injected(adc, ADC_CR2_JEXTSEL_TIM4_TRGO, ADC_CR2_JEXTEN_BOTH_EDGES); #endif #elif USE_AD_TIM1 PRINT_CONFIG_MSG("Info: Using TIM1 for ADC") #if defined(STM32F1) adc_enable_external_trigger_injected(adc, ADC_CR2_JEXTSEL_TIM1_TRGO); #elif defined(STM32F4) - adc_enable_external_trigger_injected(adc, ADC_CR2_JEXTSEL_TIM1_TRGO, ADC_CR2_JEXTEN_BOTH_EDGES); + adc_enable_external_trigger_injected(adc, ADC_CR2_JEXTSEL_TIM1_TRGO, ADC_CR2_JEXTEN_BOTH_EDGES); #endif #else PRINT_CONFIG_MSG("Info: Using default TIM2 for ADC") #if defined(STM32F1) adc_enable_external_trigger_injected(adc, ADC_CR2_JEXTSEL_TIM2_TRGO); #elif defined(STM32F4) - adc_enable_external_trigger_injected(adc, ADC_CR2_JEXTSEL_TIM2_TRGO, ADC_CR2_JEXTEN_BOTH_EDGES); + adc_enable_external_trigger_injected(adc, ADC_CR2_JEXTSEL_TIM2_TRGO, ADC_CR2_JEXTEN_BOTH_EDGES); #endif #endif diff --git a/sw/airborne/arch/stm32/mcu_periph/i2c_arch.c b/sw/airborne/arch/stm32/mcu_periph/i2c_arch.c index 08ba95d9a1..858299dc17 100644 --- a/sw/airborne/arch/stm32/mcu_periph/i2c_arch.c +++ b/sw/airborne/arch/stm32/mcu_periph/i2c_arch.c @@ -28,15 +28,11 @@ #include "mcu_periph/i2c.h" -#if defined(STM32F1) -#include -#include -#include -#elif defined(STM32F4) -#include -#include -#include -#endif +#include BOARD_CONFIG + +#include +#include +#include #include @@ -880,13 +876,8 @@ void i2c1_hw_init(void) { i2c1.reg_addr = (void *)I2C1; i2c1.init_struct = NULL; -#if defined(STM32F1) i2c1.scl_pin = GPIO_I2C1_SCL; i2c1.sda_pin = GPIO_I2C1_SDA; -#elif defined(STM32F4) - i2c2.scl_pin = GPIO8; - i2c2.sda_pin = GPIO9; -#endif i2c1.errors = &i2c1_errors; i2c1_watchdog_counter = 0; @@ -922,10 +913,10 @@ void i2c1_hw_init(void) { GPIO_CNF_OUTPUT_ALTFN_OPENDRAIN, i2c1.scl_pin | i2c1.sda_pin); #elif defined(STM32F4) - rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPBEN); + rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPBEN); gpio_mode_setup(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, i2c1.scl_pin | i2c1.sda_pin); - gpio_set_output_options(GPIOB, GPIO_OTYPE_OD, GPIO_OSPEED_25MHZ, i2c1.scl_pin | i2c1.sda_pin); - gpio_set_af(GPIOB, GPIO_AF4, i2c1.scl_pin | i2c1.sda_pin); + gpio_set_output_options(GPIOB, GPIO_OTYPE_OD, GPIO_OSPEED_25MHZ, i2c1.scl_pin | i2c1.sda_pin); + gpio_set_af(GPIOB, GPIO_AF4, i2c1.scl_pin | i2c1.sda_pin); #endif i2c_reset(I2C1); @@ -980,13 +971,8 @@ void i2c2_hw_init(void) { i2c2.reg_addr = (void *)I2C2; i2c2.init_struct = NULL; -#if defined(STM32F1) i2c2.scl_pin = GPIO_I2C2_SCL; i2c2.sda_pin = GPIO_I2C2_SDA; -#elif defined(STM32F4) - i2c2.scl_pin = GPIO10; - i2c2.sda_pin = GPIO11; -#endif i2c2.errors = &i2c2_errors; i2c2_watchdog_counter = 0; @@ -1017,10 +1003,10 @@ void i2c2_hw_init(void) { GPIO_CNF_OUTPUT_ALTFN_OPENDRAIN, i2c2.scl_pin | i2c2.sda_pin); #elif defined(STM32F4) - rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPBEN); + rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPBEN); gpio_mode_setup(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, i2c2.scl_pin | i2c2.sda_pin); - gpio_set_output_options(GPIOB, GPIO_OTYPE_OD, GPIO_OSPEED_25MHZ, i2c2.scl_pin | i2c2.sda_pin); - gpio_set_af(GPIOB, GPIO_AF4, i2c2.scl_pin | i2c2.sda_pin); + gpio_set_output_options(GPIOB, GPIO_OTYPE_OD, GPIO_OSPEED_25MHZ, i2c2.scl_pin | i2c2.sda_pin); + gpio_set_af(GPIOB, GPIO_AF4, i2c2.scl_pin | i2c2.sda_pin); #endif i2c_reset(I2C2); diff --git a/sw/airborne/arch/stm32/mcu_periph/spi_arch.c b/sw/airborne/arch/stm32/mcu_periph/spi_arch.c index 315694aba4..2a11d67739 100644 --- a/sw/airborne/arch/stm32/mcu_periph/spi_arch.c +++ b/sw/airborne/arch/stm32/mcu_periph/spi_arch.c @@ -51,9 +51,9 @@ * - The after_cb callback happens BEFORE the slave is unselected as configured. */ -#include -#include -#include +#include +#include +#include #include #include #include diff --git a/sw/airborne/arch/stm32/mcu_periph/sys_time_arch.h b/sw/airborne/arch/stm32/mcu_periph/sys_time_arch.h index d5a8444028..de5408de65 100644 --- a/sw/airborne/arch/stm32/mcu_periph/sys_time_arch.h +++ b/sw/airborne/arch/stm32/mcu_periph/sys_time_arch.h @@ -34,13 +34,8 @@ #include "mcu_periph/sys_time.h" -#if defined(STM32F1) -#include -#include -#elif defined(STM32F4) -#include -#include -#endif +#include +#include #include #include "std.h" diff --git a/sw/airborne/arch/stm32/mcu_periph/uart_arch.c b/sw/airborne/arch/stm32/mcu_periph/uart_arch.c index aaea0e910d..76f07d9a9b 100644 --- a/sw/airborne/arch/stm32/mcu_periph/uart_arch.c +++ b/sw/airborne/arch/stm32/mcu_periph/uart_arch.c @@ -27,19 +27,12 @@ */ #include "mcu_periph/uart.h" -#if defined(STM32F1) -#include -#include -#include -#elif defined(STM32F4) -#include -#include -#include -#endif -#include -#include -#include +#include +#include +#include +#include + #include "std.h" void uart_periph_set_baudrate(struct uart_periph* p, uint32_t baud, bool_t hw_flow_control) { @@ -135,8 +128,8 @@ void uart1_init( void ) { /* init RCC */ #if defined(STM32F4) - rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPAEN); - rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USART1EN); + rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPAEN); + rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USART1EN); #elif defined(STM32F1) rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_USART1EN); rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); @@ -147,14 +140,14 @@ void uart1_init( void ) { /* Init GPIOS */ #if defined(STM32F4) - gpio_mode_setup(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, - GPIO13 | GPIO14 | GPIO15); - gpio_set_af(GPIOA, GPIO_AF7, GPIO2); + gpio_mode_setup(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, + GPIO13 | GPIO14 | GPIO15); + gpio_set_af(GPIOA, GPIO_AF7, GPIO2); #elif defined(STM32F1) gpio_set_mode(GPIO_BANK_USART1_TX, GPIO_MODE_OUTPUT_50_MHZ, - GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART1_TX); + GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART1_TX); gpio_set_mode(GPIO_BANK_USART1_RX, GPIO_MODE_INPUT, - GPIO_CNF_INPUT_FLOAT, GPIO_USART1_RX); + GPIO_CNF_INPUT_FLOAT, GPIO_USART1_RX); #endif #if UART1_HW_FLOW_CONTROL @@ -185,7 +178,7 @@ void uart2_init( void ) { /* init RCC */ #if defined(STM32F4) - #warning "UART2 is not yet working on STM32F4" +#warning "UART2 is not yet working on STM32F4" #elif defined(STM32F1) rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USART2EN); rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); @@ -196,7 +189,7 @@ void uart2_init( void ) { /* Init GPIOS */ #if defined(STM32F4) - #warning "UART2 is not yet working on STM32F4" +#warning "UART2 is not yet working on STM32F4" #elif defined(STM32F1) gpio_set_mode(GPIO_BANK_USART2_TX, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART2_TX); @@ -221,8 +214,8 @@ void uart3_init( void ) { /* init RCC */ #if defined(STM32F4) - rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPCEN); - rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USART3EN); + rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPCEN); + rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USART3EN); #elif defined(STM32F1) rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USART3EN); rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN); @@ -233,8 +226,8 @@ void uart3_init( void ) { /* Init GPIOS */ #if defined(STM32F4) - gpio_mode_setup(GPIOC, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO10 | GPIO11); - gpio_set_af(GPIOC, GPIO_AF7, GPIO10 | GPIO11); + gpio_mode_setup(GPIOC, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO10 | GPIO11); + gpio_set_af(GPIOC, GPIO_AF7, GPIO10 | GPIO11); #elif defined(STM32F1) AFIO_MAPR |= AFIO_MAPR_USART3_REMAP_PARTIAL_REMAP; gpio_set_mode(GPIO_BANK_USART3_PR_TX, GPIO_MODE_OUTPUT_50_MHZ, @@ -260,9 +253,9 @@ void uart5_init( void ) { /* init RCC */ #if defined(STM32F4) - rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPCEN); - rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPDEN); - rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_UART5EN); + rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPCEN); + rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPDEN); + rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_UART5EN); #elif defined(STM32F1) rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_UART5EN); rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN); @@ -273,15 +266,15 @@ void uart5_init( void ) { /* Init GPIOS */ #if defined(STM32F4) - gpio_mode_setup(GPIOC, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO12); - gpio_mode_setup(GPIOD, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO2); - gpio_set_af(GPIOC, GPIO_AF8, GPIO12); - gpio_set_af(GPIOD, GPIO_AF8, GPIO2); + gpio_mode_setup(GPIOC, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO12); + gpio_mode_setup(GPIOD, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO2); + gpio_set_af(GPIOC, GPIO_AF8, GPIO12); + gpio_set_af(GPIOD, GPIO_AF8, GPIO2); #elif defined(STM32F1) gpio_set_mode(GPIO_BANK_UART5_TX, GPIO_MODE_OUTPUT_50_MHZ, - GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_UART5_TX); + GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_UART5_TX); gpio_set_mode(GPIO_BANK_UART5_RX, GPIO_MODE_INPUT, - GPIO_CNF_INPUT_FLOAT, GPIO_UART5_RX); + GPIO_CNF_INPUT_FLOAT, GPIO_UART5_RX); #endif /* Configure USART */ diff --git a/sw/airborne/arch/stm32/peripherals/hmc5843_arch.h b/sw/airborne/arch/stm32/peripherals/hmc5843_arch.h index 11c364c4af..ba3f9611b1 100644 --- a/sw/airborne/arch/stm32/peripherals/hmc5843_arch.h +++ b/sw/airborne/arch/stm32/peripherals/hmc5843_arch.h @@ -22,11 +22,7 @@ #ifndef HMC5843_ARCH_H #define HMC5843_ARCH_H -#if defined(STM32F1) -#include -#elif defined(STM32F4) -#include -#endif +#include /* returns true if conversion done */ static inline int mag_eoc(void) diff --git a/sw/airborne/arch/stm32/subsystems/actuators/actuators_pwm_arch.c b/sw/airborne/arch/stm32/subsystems/actuators/actuators_pwm_arch.c index 9c0e2d6f4d..229ae0ad45 100644 --- a/sw/airborne/arch/stm32/subsystems/actuators/actuators_pwm_arch.c +++ b/sw/airborne/arch/stm32/subsystems/actuators/actuators_pwm_arch.c @@ -26,14 +26,8 @@ #include "subsystems/actuators/actuators_pwm_arch.h" #include "subsystems/actuators/actuators_pwm.h" -#if defined(STM32F1) -#include -#include -#elif defined(STM32F4) -#include -#include -#endif - +#include +#include #include #include BOARD_CONFIG @@ -93,19 +87,19 @@ void actuators_pwm_arch_init(void) { rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_TIM4EN); #endif #else // BOARD_KROOZ - rcc_peripheral_enable_clock(&RCC_APB1ENR, PWM_1_4_RCC_TIM); -# if USE_SERVOS_5AND6 - rcc_peripheral_enable_clock(&RCC_APB1ENR, PWM_5AND6_RCC_TIM); + rcc_peripheral_enable_clock(&RCC_APB1ENR, PWM_1_4_RCC_TIM); +#if USE_SERVOS_5AND6 + rcc_peripheral_enable_clock(&RCC_APB1ENR, PWM_5AND6_RCC_TIM); +#endif +#if USE_SERVOS_7AND8 + rcc_peripheral_enable_clock(&RCC_APB1ENR, PWM_7AND8_RCC_TIM); +#endif +#if USE_SERVOS_9AND10 + rcc_peripheral_enable_clock(&RCC_APB1ENR, PWM_9AND10_RCC_TIM); +#endif +#if USE_SERVO_11 + rcc_peripheral_enable_clock(&RCC_APB1ENR, PWM_11_RCC_TIM); #endif -# if USE_SERVOS_7AND8 - rcc_peripheral_enable_clock(&RCC_APB1ENR, PWM_7AND8_RCC_TIM); -# endif -# if USE_SERVOS_9AND10 - rcc_peripheral_enable_clock(&RCC_APB1ENR, PWM_9AND10_RCC_TIM); -# endif -# if USE_SERVO_11 - rcc_peripheral_enable_clock(&RCC_APB1ENR, PWM_11_RCC_TIM); -# endif #endif // BOARD_KROOZ /*---------------- @@ -114,24 +108,24 @@ void actuators_pwm_arch_init(void) { #if defined(STM32F1) /* GPIO A,B and C clock enable */ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN | - RCC_APB2ENR_IOPBEN | - RCC_APB2ENR_IOPCEN | - RCC_APB2ENR_AFIOEN); + RCC_APB2ENR_IOPBEN | + RCC_APB2ENR_IOPCEN | + RCC_APB2ENR_AFIOEN); /* TIM3 GPIO for PWM1..4 */ AFIO_MAPR |= AFIO_MAPR_TIM3_REMAP_FULL_REMAP; gpio_set_mode(GPIO_BANK_TIM3_FR, - GPIO_MODE_OUTPUT_50_MHZ, - GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, - GPIO_TIM3_FR_CH1 | - GPIO_TIM3_FR_CH2 | - GPIO_TIM3_FR_CH3 | - GPIO_TIM3_FR_CH4); + GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, + GPIO_TIM3_FR_CH1 | + GPIO_TIM3_FR_CH2 | + GPIO_TIM3_FR_CH3 | + GPIO_TIM3_FR_CH4); #elif defined(STM32F4) #ifdef BOARD_KROOZ - rcc_peripheral_enable_clock(&RCC_AHB1ENR, PWM_1_4_RCC_IOP); - gpio_mode_setup(PWM_1_4_GPIO, GPIO_MODE_AF, GPIO_PUPD_NONE, PWM_1_4_Pins); - gpio_set_af(PWM_1_4_GPIO, GPIO_AF2, PWM_1_4_Pins); + rcc_peripheral_enable_clock(&RCC_AHB1ENR, PWM_1_4_RCC_IOP); + gpio_mode_setup(PWM_1_4_GPIO, GPIO_MODE_AF, GPIO_PUPD_NONE, PWM_1_4_Pins); + gpio_set_af(PWM_1_4_GPIO, GPIO_AF2, PWM_1_4_Pins); #endif #endif @@ -139,15 +133,15 @@ void actuators_pwm_arch_init(void) { #if USE_SERVOS_7AND8 #if defined(STM32F1) gpio_set_mode(GPIO_BANK_TIM4, - GPIO_MODE_OUTPUT_50_MHZ, - GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, - GPIO_TIM4_CH1 | - GPIO_TIM4_CH2); + GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, + GPIO_TIM4_CH1 | + GPIO_TIM4_CH2); #elif defined(STM32F4) #ifdef BOARD_KROOZ - rcc_peripheral_enable_clock(&RCC_AHB1ENR, PWM_7AND8_RCC_IOP); - gpio_mode_setup(PWM_7AND8_GPIO, GPIO_MODE_AF, GPIO_PUPD_NONE, PWM_7AND8_Pins); - gpio_set_af(PWM_7AND8_GPIO, GPIO_AF2, PWM_7AND8_Pins); + rcc_peripheral_enable_clock(&RCC_AHB1ENR, PWM_7AND8_RCC_IOP); + gpio_mode_setup(PWM_7AND8_GPIO, GPIO_MODE_AF, GPIO_PUPD_NONE, PWM_7AND8_Pins); + gpio_set_af(PWM_7AND8_GPIO, GPIO_AF2, PWM_7AND8_Pins); #endif #endif #endif @@ -156,23 +150,23 @@ void actuators_pwm_arch_init(void) { #if defined(STM32F1) #if REMAP_SERVOS_5AND6 gpio_set_mode(GPIO_BANK_TIM5, - GPIO_MODE_OUTPUT_50_MHZ, - GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, - GPIO_TIM5_CH1 | - GPIO_TIM5_CH2); + GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, + GPIO_TIM5_CH1 | + GPIO_TIM5_CH2); #else gpio_set_mode(GPIO_BANK_TIM4, - GPIO_MODE_OUTPUT_50_MHZ, - GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, - GPIO_TIM4_CH3 | - GPIO_TIM4_CH4); + GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, + GPIO_TIM4_CH3 | + GPIO_TIM4_CH4); #endif #elif defined(STM32F4) #if USE_SERVOS_5AND6 #ifdef BOARD_KROOZ - rcc_peripheral_enable_clock(&RCC_AHB1ENR, PWM_5AND6_RCC_IOP); - gpio_mode_setup(PWM_5AND6_GPIO, GPIO_MODE_AF, GPIO_PUPD_NONE, PWM_5AND6_Pins); - gpio_set_af(PWM_5AND6_GPIO, GPIO_AF2, PWM_5AND6_Pins); + rcc_peripheral_enable_clock(&RCC_AHB1ENR, PWM_5AND6_RCC_IOP); + gpio_mode_setup(PWM_5AND6_GPIO, GPIO_MODE_AF, GPIO_PUPD_NONE, PWM_5AND6_Pins); + gpio_set_af(PWM_5AND6_GPIO, GPIO_AF2, PWM_5AND6_Pins); #endif #endif #endif @@ -183,9 +177,9 @@ void actuators_pwm_arch_init(void) { #warning "No servo 9 and 10 outputs on this hardware" #elif defined(STM32F4) #ifdef BOARD_KROOZ - rcc_peripheral_enable_clock(&RCC_AHB1ENR, PWM_9AND10_RCC_IOP); - gpio_mode_setup(PWM_9AND10_GPIO, GPIO_MODE_AF, GPIO_PUPD_NONE, PWM_9AND10_Pins); - gpio_set_af(PWM_9AND10_GPIO, GPIO_AF2, PWM_9AND10_Pins); + rcc_peripheral_enable_clock(&RCC_AHB1ENR, PWM_9AND10_RCC_IOP); + gpio_mode_setup(PWM_9AND10_GPIO, GPIO_MODE_AF, GPIO_PUPD_NONE, PWM_9AND10_Pins); + gpio_set_af(PWM_9AND10_GPIO, GPIO_AF2, PWM_9AND10_Pins); #endif #endif #endif @@ -196,9 +190,9 @@ void actuators_pwm_arch_init(void) { #warning "No servo 11 output on this hardware" #elif defined(STM32F4) #ifdef BOARD_KROOZ - rcc_peripheral_enable_clock(&RCC_AHB1ENR, PWM_11_RCC_IOP); - gpio_mode_setup(PWM_11_GPIO, GPIO_MODE_AF, GPIO_PUPD_NONE, PWM_11_Pin); - gpio_set_af(PWM_11_GPIO, GPIO_AF2, PWM_11_Pin); + rcc_peripheral_enable_clock(&RCC_AHB1ENR, PWM_11_RCC_IOP); + gpio_mode_setup(PWM_11_GPIO, GPIO_MODE_AF, GPIO_PUPD_NONE, PWM_11_Pin); + gpio_set_af(PWM_11_GPIO, GPIO_AF2, PWM_11_Pin); #endif #endif #endif @@ -214,7 +208,7 @@ void actuators_pwm_arch_init(void) { * - Direction up. */ timer_set_mode(TIM3, TIM_CR1_CKD_CK_INT, - TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); + TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); timer_set_prescaler(TIM3, (PCLK / ONE_MHZ_CLK) - 1); // 1uS @@ -276,7 +270,7 @@ PRINT_CONFIG_MSG("Enabling sevros 7 and 8 on PB6, PB7 -> TIM4") * - Direction up. */ timer_set_mode(TIM4, TIM_CR1_CKD_CK_INT, - TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); + TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); timer_set_prescaler(TIM4, (PCLK / ONE_MHZ_CLK) - 1); // 1uS @@ -287,7 +281,7 @@ PRINT_CONFIG_MSG("Enabling sevros 7 and 8 on PB6, PB7 -> TIM4") #ifdef SERVO_HZ_SECONDARY timer_set_period(TIM4, (ONE_MHZ_CLK / SERVO_HZ_SECONDARY) - 1); #elif defined SERVO_HZ_CAM - timer_set_period(TIM4, (ONE_MHZ_CLK / SERVO_HZ_CAM) - 1); + timer_set_period(TIM4, (ONE_MHZ_CLK / SERVO_HZ_CAM) - 1); #else timer_set_period(TIM4, (ONE_MHZ_CLK / SERVO_HZ) - 1); #endif @@ -362,7 +356,7 @@ PRINT_CONFIG_MSG("Using servo outputs 5 and 6 to PA0,PA1 -> TIM5") * - Direction up. */ timer_set_mode(TIM5, TIM_CR1_CKD_CK_INT, - TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); + TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); timer_set_prescaler(TIM5, (PCLK / ONE_MHZ_CLK) - 1); // 1uS @@ -380,7 +374,7 @@ PRINT_CONFIG_MSG("Using servo outputs 5 and 6 to PA0,PA1 -> TIM5") timer_disable_oc_output(TIM5, TIM_OC1); timer_disable_oc_output(TIM5, TIM_OC2); #ifdef BOARD_KROOZ - timer_disable_oc_output(TIM5, TIM_OC3); + timer_disable_oc_output(TIM5, TIM_OC3); timer_disable_oc_output(TIM5, TIM_OC4); #endif @@ -388,7 +382,7 @@ PRINT_CONFIG_MSG("Using servo outputs 5 and 6 to PA0,PA1 -> TIM5") actuators_pwm_arch_channel_init(TIM5, TIM_OC1); actuators_pwm_arch_channel_init(TIM5, TIM_OC2); #ifdef BOARD_KROOZ - actuators_pwm_arch_channel_init(TIM5, TIM_OC3); + actuators_pwm_arch_channel_init(TIM5, TIM_OC3); actuators_pwm_arch_channel_init(TIM5, TIM_OC4); #endif @@ -422,7 +416,7 @@ PRINT_CONFIG_MSG("Using servo outputs 5 and 6 to PA0,PA1 -> TIM5") * - Direction up. */ timer_set_mode(PWM_11_TIMER, TIM_CR1_CKD_CK_INT, - TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); + TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); timer_set_prescaler(PWM_11_TIMER, (PCLK / ONE_MHZ_CLK) - 1); // 1uS timer_disable_preload(PWM_11_TIMER); timer_continuous_mode(PWM_11_TIMER); diff --git a/sw/airborne/arch/stm32/subsystems/radio_control/ppm_arch.c b/sw/airborne/arch/stm32/subsystems/radio_control/ppm_arch.c index be075eadd7..e48c98080c 100644 --- a/sw/airborne/arch/stm32/subsystems/radio_control/ppm_arch.c +++ b/sw/airborne/arch/stm32/subsystems/radio_control/ppm_arch.c @@ -34,16 +34,11 @@ #include "subsystems/radio_control.h" #include "subsystems/radio_control/ppm.h" -#if defined(STM32F1) -#include -#include -#include -#elif defined(STM32F4) -#include -#include -#include -#endif +#include +#include #include +#include + #include "mcu_periph/sys_time.h" @@ -95,13 +90,13 @@ void ppm_arch_init ( void ) { rcc_peripheral_enable_clock(&RCC_APB2ENR, PPM_GPIO_PERIPHERAL); /* timer gpio configuration */ gpio_set_mode(PPM_GPIO_PORT, GPIO_MODE_INPUT, - GPIO_CNF_INPUT_FLOAT, PPM_GPIO_PIN); + GPIO_CNF_INPUT_FLOAT, PPM_GPIO_PIN); #elif defined(STM32F4) - /* GPIOB clock enable */ - rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPBEN); - /* TIM2 channel 2 pin (PB.03) configuration */ - gpio_mode_setup(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO3); - gpio_set_af(GPIOB, GPIO_AF1, GPIO3); + /* GPIOB clock enable */ + rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPBEN); + /* TIM2 channel 2 pin (PB.03) configuration */ + gpio_mode_setup(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO3); + gpio_set_af(GPIOB, GPIO_AF1, GPIO3); #endif /* Time Base configuration */ @@ -109,13 +104,13 @@ void ppm_arch_init ( void ) { timer_reset(PPM_TIMER); #endif timer_set_mode(PPM_TIMER, TIM_CR1_CKD_CK_INT, - TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); + TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); timer_set_period(PPM_TIMER, 0xFFFF); #if defined(STM32F1) /* run ppm timer at cpu freq / 9 = 8MHz */ - timer_set_prescaler(PPM_TIMER, 0x8); + timer_set_prescaler(PPM_TIMER, 0x8); #elif defined(STM32F4) - timer_set_prescaler(PPM_TIMER, 0x53); + timer_set_prescaler(PPM_TIMER, 0x53); #endif /* TIM configuration: Input Capture mode --------------------- diff --git a/sw/airborne/arch/stm32/subsystems/settings_arch.c b/sw/airborne/arch/stm32/subsystems/settings_arch.c index 5dad7b9f0c..411e97552d 100644 --- a/sw/airborne/arch/stm32/subsystems/settings_arch.c +++ b/sw/airborne/arch/stm32/subsystems/settings_arch.c @@ -200,9 +200,8 @@ static int32_t pflash_program_bytes(struct FlashInfo* flash, uint32_t src, uint32_t size, uint32_t chksum) { -#if defined(STM32F1) - uint32_t i; - +#if defined(STM32F1) + uint32_t i; /* erase */ flash_unlock(); diff --git a/sw/airborne/boards/apogee_0.99.h b/sw/airborne/boards/apogee_0.99.h index 7f3850deb1..a035945141 100644 --- a/sw/airborne/boards/apogee_0.99.h +++ b/sw/airborne/boards/apogee_0.99.h @@ -73,6 +73,13 @@ #define ADC_CHANNEL_VSUPPLY ADC_4 #endif +/* I2C mapping (really at this place ?) */ +#define GPIO_I2C1_SCL GPIO8 +#define GPIO_I2C1_SDA GPIO7 +#define GPIO_I2C2_SCL GPIO10 +#define GPIO_I2C2_SDA GPIO11 + + #define BOARD_HAS_BARO 1 #define PWM_1_4_TIMER TIM3