diff --git a/sw/airborne/arm7/ADS8344.c b/sw/airborne/arm7/ADS8344.c
index 5d1a618ad2..a2f66d8711 100644
--- a/sw/airborne/arm7/ADS8344.c
+++ b/sw/airborne/arm7/ADS8344.c
@@ -43,6 +43,27 @@ uint16_t ADS8344_values[NB_CHANNELS];
 #define POWER_MODE (1 << 1 | 1)
 #define SGL_DIF 1 // Single ended
 
+
+/* set SSP input clock, PCLK / CPSDVSR = 750kHz      */
+/* SSP clock, 750kHz / (SCR+1) = 750kHz / 15 = 50kHz */
+
+#if (PCLK == 15000000)
+#define CPSDVSR    20
+#else
+
+#if (PCLK == 30000000)
+#define CPSDVSR    40
+#else
+
+#if (PCLK == 60000000)
+#define CPSDVSR    80
+#else
+
+#error unknown PCLK frequency
+#endif
+#endif
+#endif
+
 /* SSPCR0 settings */
 #define SSP_DSS  0x07 << 0  /* data size            : 8 bits   */
 #define SSP_FRF  0x00 << 4  /* frame format         : SPI      */
@@ -70,7 +91,7 @@ void ADS8344_init( void ) {
   /* setup SSP */
   SSPCR0 = SSP_DSS | SSP_FRF | SSP_CPOL | SSP_CPHA | SSP_SCR;
   SSPCR1 = SSP_LBM | SSP_MS | SSP_SOD;
-  SSPCPSR = 20; /* -> 50kHz */
+  SSPCPSR = CPSDVSR; /* -> 50kHz */
   
   /* initialize interrupt vector */
   VICIntSelect &= ~VIC_BIT(VIC_SPI1);   // SPI1 selected as IRQ
diff --git a/sw/airborne/arm7/adc_hw.c b/sw/airborne/arm7/adc_hw.c
index 64355ca7bc..0386a660f3 100644
--- a/sw/airborne/arm7/adc_hw.c
+++ b/sw/airborne/arm7/adc_hw.c
@@ -193,7 +193,10 @@ void adc_init( void ) {
   PINSEL1 |= ADC_PINSEL1_ONES;
 
 #ifdef USE_AD0
-  /* setup hw scan - PCLK/7 ( 4.3MHz)  - BURST ON */
+  /* FIXME: this needs to be investigated, we should run just below 4.5MHz,
+            but we are a lot slower (e.g. 58.6kHz with PCLK = 15MHz), see 
+            lpc_vor_convertions.c for right timing code */  
+  /* setup hw scan - PCLK/256 ( 58.6kHz/117.2kHz/234.4kHz ) - BURST ON */
   AD0CR = ADC_AD0CR_SEL_HW_SCAN | 0xFF << 8 | 1 << 16 | 0x01 << 21 ;
   /* AD0 selected as IRQ */
   VICIntSelect &= ~VIC_BIT(VIC_AD0);
@@ -205,7 +208,10 @@ void adc_init( void ) {
 #endif
 
 #ifdef USE_AD1
-  /* setup hw scan - PCLK/7 ( 4.3MHz)  - BURST ON */
+  /* FIXME: this needs to be investigated, we should run just below 4.5MHz,
+            but we are a lot slower (e.g. 58.6kHz with PCLK = 15MHz), see 
+            lpc_vor_convertions.c for right timing code */  
+  /* setup hw scan - PCLK/256 ( 58.6kHz/117.2kHz/234.4kHz ) - BURST ON */
   AD1CR = ADC_AD1CR_SEL_HW_SCAN | 0xFF << 8 | 1 << 16 | 0x01 << 21 ;
   /* AD1 selected as IRQ */
   VICIntSelect &= ~VIC_BIT(VIC_AD1);
diff --git a/sw/airborne/arm7/baro_MS5534A.c b/sw/airborne/arm7/baro_MS5534A.c
index bd18bf0357..01de034d28 100644
--- a/sw/airborne/arm7/baro_MS5534A.c
+++ b/sw/airborne/arm7/baro_MS5534A.c
@@ -86,8 +86,26 @@ static uint8_t buf_output[3];
 
 #define Uint16(buf_input) (buf_input[0] << 8 | buf_input[1])
 
+/* PWM prescaler, set PWM input clock to 15MHz, PWM_CLK = PCLK / PWM_PRESCALER */
+
+#if (PCLK == 15000000)
+#define PWM_PRESCALER   1
+#else
+
+#if (PCLK == 30000000)
+#define PWM_PRESCALER   2
+#else
+
+#if (PCLK == 60000000)
+#define PWM_PRESCALER   4
+#else
+
+#error unknown PCLK frequency
+#endif
+#endif
+#endif
+
 #define MS5534A_MCLK 32768
-#define PWM_PRESCALER 1
 #define PWM_PERIOD ((PCLK / PWM_PRESCALER) / MS5534A_MCLK)
 #define PWM_DUTY (PWM_PERIOD / 2)
 
diff --git a/sw/airborne/arm7/booz_test_scp.c b/sw/airborne/arm7/booz_test_scp.c
index c6acde4c80..e48558ee9f 100644
--- a/sw/airborne/arm7/booz_test_scp.c
+++ b/sw/airborne/arm7/booz_test_scp.c
@@ -75,6 +75,25 @@ static inline void main_event(void) {
 }
 
 
+/* set SSP input clock, PCLK / CPSDVSR = 7.5MHz */
+
+#if (PCLK == 15000000)
+#define CPSDVSR    2
+#else
+
+#if (PCLK == 30000000)
+#define CPSDVSR    4
+#else
+
+#if (PCLK == 60000000)
+#define CPSDVSR    8
+#else
+
+#error unknown PCLK frequency
+#endif
+#endif
+#endif
+
 /* SSPCR0 settings */
 #define SSP_DDS  0x07 << 0  /* data size         : 8 bits        */
 #define SSP_FRF  0x00 << 4  /* frame format      : SPI           */
@@ -97,7 +116,7 @@ static void my_spi_init(void) {
   /* setup SSP */
   SSPCR0 = SSP_DDS | SSP_FRF | SSP_CPOL | SSP_CPHA | SSP_SCR;
   SSPCR1 = SSP_LBM | SSP_MS | SSP_SOD;
-  SSPCPSR = 0x2;
+  SSPCPSR = CPSDVSR;
   
   /* initialize interrupt vector */
   VICIntSelect &= ~VIC_BIT(VIC_SPI1);   // SPI1 selected as IRQ
diff --git a/sw/airborne/arm7/i2c_hw.c b/sw/airborne/arm7/i2c_hw.c
index a0601f750a..ce526646aa 100644
--- a/sw/airborne/arm7/i2c_hw.c
+++ b/sw/airborne/arm7/i2c_hw.c
@@ -31,7 +31,8 @@
 
 #include "interrupt_hw.h"
 
-/* default clock speed 37.5KHz with our 15MHz PCLK */
+/* default clock speed 37.5KHz with our 15MHz PCLK 
+   I2C0_CLOCK = PCLK / (I2C0_SCLL + I2C0_SCLH)     */
 #ifndef I2C0_SCLL
 #define I2C0_SCLL 200
 #endif
@@ -40,6 +41,44 @@
 #define I2C0_SCLH 200
 #endif
 
+/* default clock speed 37.5KHz with our 15MHz PCLK 
+   I2C1_CLOCK = PCLK / (I2C1_SCLL + I2C1_SCLH)     */
+#ifndef I2C1_SCLL
+#define I2C1_SCLL 200
+#endif
+
+#ifndef I2C1_SCLH
+#define I2C1_SCLH 200
+#endif
+
+/* adjust for other PCLKs */
+
+#if (PCLK == 15000000)
+#define I2C0_SCLL_D I2C0_SCLL
+#define I2C0_SCLH_D I2C0_SCLH
+#define I2C1_SCLL_D I2C1_SCLL
+#define I2C1_SCLH_D I2C1_SCLH
+#else
+
+#if (PCLK == 30000000)
+#define I2C0_SCLL_D (2*I2C0_SCLL)
+#define I2C0_SCLH_D (2*I2C0_SCLH)
+#define I2C1_SCLL_D (2*I2C1_SCLL)
+#define I2C1_SCLH_D (2*I2C1_SCLH)
+#else
+
+#if (PCLK == 60000000)
+#define I2C0_SCLL_D (4*I2C0_SCLL)
+#define I2C0_SCLH_D (4*I2C0_SCLH)
+#define I2C1_SCLL_D (4*I2C1_SCLL)
+#define I2C1_SCLH_D (4*I2C1_SCLH)
+#else
+
+#error unknown PCLK frequency
+#endif
+#endif
+#endif
+
 #ifndef I2C0_VIC_SLOT
 #define I2C0_VIC_SLOT 9
 #endif
@@ -58,8 +97,8 @@ void i2c0_hw_init ( void ) {
   /* enable I2C */
   I2C0CONSET = _BV(I2EN);
   /* set bitrate */
-  I2C0SCLL = I2C0_SCLL;  
-  I2C0SCLH = I2C0_SCLH;  
+  I2C0SCLL = I2C0_SCLL_D;  
+  I2C0SCLH = I2C0_SCLH_D;  
   
   // initialize the interrupt vector
   VICIntSelect &= ~VIC_BIT(VIC_I2C0);              // I2C0 selected as IRQ
@@ -101,8 +140,8 @@ void i2c1_hw_init ( void ) {
   /* enable I2C */
   I2C1CONSET = _BV(I2EN);
   /* set bitrate */
-  I2C1SCLL = I2C1_SCLL;  
-  I2C1SCLH = I2C1_SCLH;  
+  I2C1SCLL = I2C1_SCLL_D;  
+  I2C1SCLH = I2C1_SCLH_D;  
   
   // initialize the interrupt vector
   VICIntSelect &= ~VIC_BIT(VIC_I2C1);              // I2C0 selected as IRQ
diff --git a/sw/airborne/arm7/modem_hw.h b/sw/airborne/arm7/modem_hw.h
index ff31769557..103204871b 100644
--- a/sw/airborne/arm7/modem_hw.h
+++ b/sw/airborne/arm7/modem_hw.h
@@ -6,9 +6,24 @@
 
 void TIMER1_ISR ( void ) __attribute__((naked));
 
+/* T1 prescaler, set T1_CLK to 5MHz, T1_CLK = PCLK / T1PCLK_DIV */
 
-#define T1_PCLK_DIV 3
-//new: #define T1_PCLK_DIV (PCLK/5000000)
+#if (PCLK == 15000000)
+#define T1_PCLK_DIV     3
+#else
+
+#if (PCLK == 30000000)
+#define T1_PCLK_DIV     6
+#else
+
+#if (PCLK == 60000000)
+#define T1_PCLK_DIV     12
+#else
+
+#error unknown PCLK frequency
+#endif
+#endif
+#endif
 
 #define SAMPLES_PER_PERIOD 4
 #define SAMPLE_PERIOD (PCLK/4762/SAMPLES_PER_PERIOD/T1_PCLK_DIV)
diff --git a/sw/airborne/arm7/servos_4015_hw.h b/sw/airborne/arm7/servos_4015_hw.h
index 120beedb97..e029b8648a 100644
--- a/sw/airborne/arm7/servos_4015_hw.h
+++ b/sw/airborne/arm7/servos_4015_hw.h
@@ -9,7 +9,24 @@
 
 #include CONFIG
 
-#define PWM_PRESCALER 1
+/* PWM prescaler, set PWM input clock to 15MHz, PWM_CLK = PCLK / PWM_PRESCALER */
+
+#if (PCLK == 15000000)
+#define PWM_PRESCALER   1
+#else
+
+#if (PCLK == 30000000)
+#define PWM_PRESCALER   2
+#else
+
+#if (PCLK == 60000000)
+#define PWM_PRESCALER   4
+#else
+
+#error unknown PCLK frequency
+#endif
+#endif
+#endif
 
 #define PWM_TICS_OF_USEC(us)   (uint32_t)((us) *1e-6 * PCLK / PWM_PRESCALER + 0.5)
 
diff --git a/sw/airborne/arm7/spi_hw.c b/sw/airborne/arm7/spi_hw.c
index 8bb207bb76..545e64f3e2 100644
--- a/sw/airborne/arm7/spi_hw.c
+++ b/sw/airborne/arm7/spi_hw.c
@@ -48,12 +48,31 @@ volatile uint8_t spi_rx_idx;
 #ifdef SPI_SLAVE
 void SPI1_ISR(void) __attribute__((naked));
 
+/* set SSP input clock, PCLK / CPSDVSR = 468.75kHz */
+
+#if (PCLK == 15000000)
+#define CPSDVSR    32
+#else
+
+#if (PCLK == 30000000)
+#define CPSDVSR    64
+#else
+
+#if (PCLK == 60000000)
+#define CPSDVSR    128
+#else
+
+#error unknown PCLK frequency
+#endif
+#endif
+#endif
+
 /* SSPCR0 settings */
 #define SSP_DSS  0x07 << 0  /* data size            : 8 bits   */
 #define SSP_FRF  0x00 << 4  /* frame format         : SPI      */
 #define SSP_CPOL 0x00 << 6  /* clock polarity       : idle low */  
 #define SSP_CPHA 0x01 << 7  /* clock phase          : 1        */
-#define SSP_SCR  0x0F << 8  /* serial clock rate    :          */
+#define SSP_SCR  0x0F << 8  /* serial clock rate    : 29.3kHz, SSP input clock / 16 */
 
 /* SSPCR1 settings */
 #define SSP_LBM  0x00 << 0  /* loopback mode        : disabled */
@@ -68,7 +87,7 @@ void spi_init( void ) {
   /* setup SSP  */
   SSPCR0 = SSP_DSS | SSP_FRF | SSP_CPOL | SSP_CPHA | SSP_SCR;
   SSPCR1 = SSP_LBM | SSP_MS | SSP_SOD;
-  SSPCPSR = 0x20; /* Prescaler, UM10120_1.pdf page 167 */
+  SSPCPSR = CPSDVSR; /* Prescaler, UM10120_1.pdf page 167 */
 
   /* initialize interrupt vector */
   VICIntSelect &= ~VIC_BIT(VIC_SPI1);   // SPI1 selected as IRQ
diff --git a/sw/airborne/arm7/sys_time_hw.h b/sw/airborne/arm7/sys_time_hw.h
index 3f9552aa0d..924b00f198 100644
--- a/sw/airborne/arm7/sys_time_hw.h
+++ b/sw/airborne/arm7/sys_time_hw.h
@@ -40,10 +40,24 @@ extern uint32_t last_periodic_event;
 
 void TIMER0_ISR ( void ) __attribute__((naked));
 
-/* T0 prescaler */
-//#define T0_PCLK_DIV     3
+/* T0 prescaler, set T0_CLK to 15MHz, T0_CLK = PCLK / T0PCLK_DIV */
+
+#if (PCLK == 15000000)
 #define T0_PCLK_DIV     1
-//new: #define T0_PCLK_DIV     (PCLK/15000000)
+#else
+
+#if (PCLK == 30000000)
+#define T0_PCLK_DIV     2
+#else
+
+#if (PCLK == 60000000)
+#define T0_PCLK_DIV     4
+#else
+
+#error unknown PCLK frequency
+#endif
+#endif
+#endif
 
 static inline void sys_time_init( void ) {
   /* setup Timer 0 to count forever  */
diff --git a/sw/airborne/arm7/usb_ser_hw.c b/sw/airborne/arm7/usb_ser_hw.c
index f0f129b16e..bd9dc6eb60 100644
--- a/sw/airborne/arm7/usb_ser_hw.c
+++ b/sw/airborne/arm7/usb_ser_hw.c
@@ -51,9 +51,15 @@
 #include "LPC21xx.h"
 #include "armVIC.h"
 #include "usb_serial.h"
+#include CONFIG
 
 #include "lpcusb/usbapi.h"
 
+#ifdef USE_USB_SERIAL
+#if PCLK < 18000000
+#error PCLK needs to be higher than 18MHz for USB to work properly
+#endif
+#endif
 
 #define INT_IN_EP               0x81
 #define BULK_OUT_EP             0x05
diff --git a/sw/airborne/baro_scp.c b/sw/airborne/baro_scp.c
index b6bf4f4f3e..0c05c60d96 100755
--- a/sw/airborne/baro_scp.c
+++ b/sw/airborne/baro_scp.c
@@ -33,8 +33,8 @@ void baro_scp_periodic(void) {
   }
 }
 
-/* ssp input clock 500kHz, clock is ssp divided by SCR+1 */
-#define SSP_CLOCK 500000
+/* ssp input clock 468.75kHz, clock that divided by SCR+1 */
+#define SSP_CLOCK 468750
 
 /* SSPCR0 settings */
 #define SSP_DDS  0x07 << 0  /* data size         : 8 bits        */
diff --git a/sw/airborne/coaxial/tl_baro.c b/sw/airborne/coaxial/tl_baro.c
index 9a28d9dab7..09f06c4900 100644
--- a/sw/airborne/coaxial/tl_baro.c
+++ b/sw/airborne/coaxial/tl_baro.c
@@ -15,8 +15,26 @@ uint8_t tl_baro_cur_data;
 
 static uint16_t c1, c2, c3, c4, ut1, c6;
 
+/* PWM prescaler, set PWM input clock to 15MHz, PWM_CLK = PCLK / PWM_PRESCALER */
+
+#if (PCLK == 15000000)
+#define PWM_PRESCALER   1
+#else
+
+#if (PCLK == 30000000)
+#define PWM_PRESCALER   2
+#else
+
+#if (PCLK == 60000000)
+#define PWM_PRESCALER   4
+#else
+
+#error unknown PCLK frequency
+#endif
+#endif
+#endif
+
 #define MS5534A_MCLK 32768
-#define PWM_PRESCALER 1
 #define PWM_PERIOD ((PCLK / PWM_PRESCALER) / MS5534A_MCLK)
 #define PWM_DUTY (PWM_PERIOD / 2)
 
diff --git a/sw/airborne/coaxial/tl_imu.c b/sw/airborne/coaxial/tl_imu.c
index d1cdd61df5..0d0951e905 100644
--- a/sw/airborne/coaxial/tl_imu.c
+++ b/sw/airborne/coaxial/tl_imu.c
@@ -23,6 +23,24 @@ float tl_imu_pressure;
 
 static void SPI1_ISR(void) __attribute__((naked));
 
+/* set SSP input clock, PCLK / CPSDVSR = 468.75kHz */
+
+#if (PCLK == 15000000)
+#define CPSDVSR    32
+#else
+
+#if (PCLK == 30000000)
+#define CPSDVSR    64
+#else
+
+#if (PCLK == 60000000)
+#define CPSDVSR    128
+#else
+
+#error unknown PCLK frequency
+#endif
+#endif
+#endif
 
 /* SSPCR0 settings */
 #define SSP_DDS  0x07 << 0  /* data size         : 8 bits        */
@@ -51,7 +69,7 @@ void tl_imu_init(void) {
   /* setup SSP */
   SSPCR0 = SSP_DDS | SSP_FRF | SSP_CPOL | SSP_CPHA | SSP_SCR;
   SSPCR1 = SSP_LBM | SSP_MS | SSP_SOD;
-  SSPCPSR = 0x20;
+  SSPCPSR = CPSDVSR;
   
   /* initialize interrupt vector */
   VICIntSelect &= ~VIC_BIT(VIC_SPI1);   // SPI1 selected as IRQ
diff --git a/sw/airborne/coaxial/tl_test_mm_main.c b/sw/airborne/coaxial/tl_test_mm_main.c
index d31899c85d..a365add545 100644
--- a/sw/airborne/coaxial/tl_test_mm_main.c
+++ b/sw/airborne/coaxial/tl_test_mm_main.c
@@ -10,6 +10,25 @@
 
 #include "micromag.h"
 
+/* set SSP input clock, PCLK / CPSDVSR = 468.75kHz */
+
+#if (PCLK == 15000000)
+#define CPSDVSR    32
+#else
+
+#if (PCLK == 30000000)
+#define CPSDVSR    64
+#else
+
+#if (PCLK == 60000000)
+#define CPSDVSR    128
+#else
+
+#error unknown PCLK frequency
+#endif
+#endif
+#endif
+
 static inline void tl_main_init( void );
 static inline void tl_main_periodic_task( void );
 static inline void tl_main_event_task( void );
@@ -78,7 +97,7 @@ static void test_spi_init(void) {
   /* setup SSP */
   SSPCR0 = SSP_DDS | SSP_FRF | SSP_CPOL | SSP_CPHA | SSP_SCR;
   SSPCR1 = SSP_LBM | SSP_MS | SSP_SOD;
-  SSPCPSR = 0x20;
+  SSPCPSR = CPSDVSR;
   
   /* initialize interrupt vector */
   VICIntSelect &= ~VIC_BIT(VIC_SPI1);   // SPI1 selected as IRQ
diff --git a/sw/airborne/main_ap.c b/sw/airborne/main_ap.c
index ff6e70db36..6ad1be2db5 100644
--- a/sw/airborne/main_ap.c
+++ b/sw/airborne/main_ap.c
@@ -119,9 +119,6 @@
 #endif
 
 #ifdef USE_USB_SERIAL
-#if PCLK < 18000000
-#error PCLK needs to be higher than 18MHz for USB to work properly
-#endif
 #include "usb_serial.h"
 #endif
 
diff --git a/sw/airborne/pt_ant_sensors.c b/sw/airborne/pt_ant_sensors.c
index 3bc090343f..096b6ebceb 100644
--- a/sw/airborne/pt_ant_sensors.c
+++ b/sw/airborne/pt_ant_sensors.c
@@ -9,6 +9,26 @@ void SPI0_ISR(void) __attribute__((naked));
 #define PtAntSensorsSelect() { SetBit(IO0SET, PT_ANT_SENSOR_SS_PIN);}
 #define PtAntSensorsUnselect() { SetBit(IO0CLR, PT_ANT_SENSOR_SS_PIN);}
 
+/* set SPI0 clock, PCLK / SPCCR0 = 468.75kHz */
+
+#if (PCLK == 15000000)
+#define SPCCR0    32
+#else
+
+#if (PCLK == 30000000)
+#define SPCCR0    64
+#else
+
+#if (PCLK == 60000000)
+#define SPCCR0    128
+#else
+
+#error unknown PCLK frequency
+#endif
+#endif
+#endif
+
+
 volatile uint8_t pt_ant_sensors_data_available;
 struct PtAntSensorData pt_ant_sensors_data;
 
@@ -40,8 +60,8 @@ void pt_ant_sensors_init_spi(void) {
   PtAntSensorsUnselect();
   /* configure SPI : 8 bits CPOL=0 CPHA=0 MSB_first master */
   S0SPCR = 1<<5;
-  /* setup SPI clock rate : PCLK / 32 */
-  S0SPCCR = 0x20;
+  /* setup SPI clock rate : PCLK / SPCCR0 = 468.75kHz */
+  S0SPCCR = SPCCR0;
 
   /* initialize interrupt vector */
   VICIntSelect &= ~VIC_BIT(VIC_SPI0);   // SPI0 selected as IRQ
diff --git a/sw/airborne/vor/lpc_vor_convertions.c b/sw/airborne/vor/lpc_vor_convertions.c
index fb2d4b2b18..3b704325e1 100644
--- a/sw/airborne/vor/lpc_vor_convertions.c
+++ b/sw/airborne/vor/lpc_vor_convertions.c
@@ -7,6 +7,28 @@
 
 #include "led.h"
 
+/* ADC clock, set just below 4.5MHz */
+
+#if (PCLK == 15000000)
+/* 15MHz / 4 = 3.75MHz */
+#define AD_CLK_DIV      4
+#else
+
+#if (PCLK == 30000000)
+/* 30MHz / 7 = 4.29MHz */
+#define AD_CLK_DIV      7
+#else
+
+#if (PCLK == 60000000)
+/* 60MHz / 14 = 4.29MHz */
+#define AD_CLK_DIV      14
+#else
+
+#error unknown PCLK frequency
+#endif
+#endif
+#endif
+
 volatile uint16_t vor_adc_sample;
 volatile bool_t vor_adc_sample_available;
 volatile uint32_t vor_adc_overrun;
@@ -18,8 +40,8 @@ void adcISR0 ( void ) __attribute__((naked));
 void vor_adc_init( void ) {
   /* select P0.4 as ADC */
   PINSEL0 |=  3 << 8;
-  /* sample AD0.6 - PCLK/4 ( 3.75MHz) - ON */
-  AD0CR = 1 << 6 | 0x03 << 8 | 1 << 21;// | 1<<16;
+  /* sample AD0.6 - clock see above - ON */
+  AD0CR = 1 << 6 | (AD_CLK_DIV-1) << 8 | 1 << 21;// | 1<<16;
   /* AD0 selected as IRQ */
   VICIntSelect &= ~VIC_BIT(VIC_AD0);
   /* AD0 interrupt enabled */