diff --git a/sw/airborne/arch/lpc21/mcu_periph/uart_arch.c b/sw/airborne/arch/lpc21/mcu_periph/uart_arch.c
index 125dac1c6f..bab01322a7 100644
--- a/sw/airborne/arch/lpc21/mcu_periph/uart_arch.c
+++ b/sw/airborne/arch/lpc21/mcu_periph/uart_arch.c
@@ -68,6 +68,10 @@ void uart_periph_set_baudrate(struct uart_periph* p, uint32_t baud) {
   uart_enable_interrupts(p);
 }
 
+void uart_periph_set_bits_stop_parity(struct uart_periph* p, uint8_t __attribute__((unused)) bits, uint8_t __attribute__((unused)) stop, uint8_t __attribute__((unused)) parity) {
+  // TBD
+}
+
 void uart_transmit(struct uart_periph* p, uint8_t data ) {
   uint16_t temp;
   unsigned cpsr;
diff --git a/sw/airborne/arch/stm32/mcu_periph/uart_arch.c b/sw/airborne/arch/stm32/mcu_periph/uart_arch.c
index fb73f70983..a49bbf32dd 100644
--- a/sw/airborne/arch/stm32/mcu_periph/uart_arch.c
+++ b/sw/airborne/arch/stm32/mcu_periph/uart_arch.c
@@ -43,9 +43,9 @@ void uart_periph_set_baudrate(struct uart_periph* p, uint32_t baud) {
 
   /* Configure USART */
   usart_set_baudrate((uint32_t)p->reg_addr, baud);
-  usart_set_databits((uint32_t)p->reg_addr, 8);
-  usart_set_stopbits((uint32_t)p->reg_addr, USART_STOPBITS_1);
-  usart_set_parity((uint32_t)p->reg_addr, USART_PARITY_NONE);
+  //usart_set_databits((uint32_t)p->reg_addr, 8);
+  //usart_set_stopbits((uint32_t)p->reg_addr, USART_STOPBITS_1);
+  //usart_set_parity((uint32_t)p->reg_addr, USART_PARITY_NONE);
 
   /* Disable Idle Line interrupt */
   USART_CR1((uint32_t)p->reg_addr) &= ~USART_CR1_IDLEIE;
@@ -61,6 +61,31 @@ void uart_periph_set_baudrate(struct uart_periph* p, uint32_t baud) {
 
 }
 
+void uart_periph_set_bits_stop_parity(struct uart_periph* p, uint8_t bits, uint8_t stop, uint8_t parity) {
+  if (parity == UPARITY_EVEN) {
+    usart_set_parity((uint32_t)p->reg_addr, USART_PARITY_EVEN);
+    if (bits == UBITS_7)
+      usart_set_databits((uint32_t)p->reg_addr, 8);
+    else // 8 data bits by default
+      usart_set_databits((uint32_t)p->reg_addr, 9);
+  }
+  else if (parity == USART_PARITY_ODD) {
+    usart_set_parity((uint32_t)p->reg_addr, USART_PARITY_ODD);
+    if (bits == UBITS_7)
+      usart_set_databits((uint32_t)p->reg_addr, 8);
+    else // 8 data bits by default
+      usart_set_databits((uint32_t)p->reg_addr, 9);
+  }
+  else { // 8 data bist, NO_PARITY by default
+    usart_set_parity((uint32_t)p->reg_addr, USART_PARITY_NONE);
+    usart_set_databits((uint32_t)p->reg_addr, 8); // is 7bits without parity possible ?
+  }
+  if (stop == USTOP_2)
+    usart_set_stopbits((uint32_t)p->reg_addr, USART_STOPBITS_2);
+  else // 1 stop bit by default
+    usart_set_stopbits((uint32_t)p->reg_addr, USART_STOPBITS_1);
+}
+
 void uart_periph_set_mode(struct uart_periph* p, bool_t tx_enabled, bool_t rx_enabled, bool_t hw_flow_control) {
   uint32_t mode = 0;
   if (tx_enabled)
@@ -173,6 +198,18 @@ static inline void usart_enable_irq(uint8_t IRQn) {
 #define UART1_HW_FLOW_CONTROL FALSE
 #endif
 
+#ifndef UART1_BITS
+#define UART1_BITS UBITS_8
+#endif
+
+#ifndef UART1_STOP
+#define UART1_STOP USTOP_1
+#endif
+
+#ifndef UART1_PARITY
+#define UART1_PARITY UPARITY_NO
+#endif
+
 void uart1_init( void ) {
 
   uart_periph_init(&uart1);
@@ -201,7 +238,8 @@ void uart1_init( void ) {
   /* Configure USART1, enable hardware flow control*/
   uart_periph_set_mode(&uart1, USE_UART1_TX, USE_UART1_RX, UART1_HW_FLOW_CONTROL);
 
-  /* Set USART1 baudrate and enable interrupt */
+  /* Set USART1 parameters and enable interrupt */
+  uart_periph_set_bits_stop_parity(&uart1, UART1_BITS, UART1_STOP, UART1_PARITY);
   uart_periph_set_baudrate(&uart1, UART1_BAUD);
 }
 
@@ -224,6 +262,18 @@ void usart1_isr(void) { usart_isr(&uart1); }
 #define UART2_HW_FLOW_CONTROL FALSE
 #endif
 
+#ifndef UART2_BITS
+#define UART2_BITS UBITS_8
+#endif
+
+#ifndef UART2_STOP
+#define UART2_STOP USTOP_1
+#endif
+
+#ifndef UART2_PARITY
+#define UART2_PARITY UPARITY_NO
+#endif
+
 void uart2_init( void ) {
 
   uart_periph_init(&uart2);
@@ -253,6 +303,7 @@ void uart2_init( void ) {
   uart_periph_set_mode(&uart2, USE_UART2_TX, USE_UART2_RX, UART2_HW_FLOW_CONTROL);
 
   /* Configure USART */
+  uart_periph_set_bits_stop_parity(&uart2, UART2_BITS, UART2_STOP, UART2_PARITY);
   uart_periph_set_baudrate(&uart2, UART2_BAUD);
 }
 
@@ -275,6 +326,18 @@ void usart2_isr(void) { usart_isr(&uart2); }
 #define UART3_HW_FLOW_CONTROL FALSE
 #endif
 
+#ifndef UART3_BITS
+#define UART3_BITS UBITS_8
+#endif
+
+#ifndef UART3_STOP
+#define UART3_STOP USTOP_1
+#endif
+
+#ifndef UART3_PARITY
+#define UART3_PARITY UPARITY_NO
+#endif
+
 void uart3_init( void ) {
 
   uart_periph_init(&uart3);
@@ -304,6 +367,7 @@ void uart3_init( void ) {
   uart_periph_set_mode(&uart3, USE_UART3_TX, USE_UART3_RX, UART3_HW_FLOW_CONTROL);
 
   /* Configure USART */
+  uart_periph_set_bits_stop_parity(&uart3, UART3_BITS, UART3_STOP, UART3_PARITY);
   uart_periph_set_baudrate(&uart3, UART3_BAUD);
 }
 
@@ -322,6 +386,18 @@ void usart3_isr(void) { usart_isr(&uart3); }
 #define USE_UART4_RX TRUE
 #endif
 
+#ifndef UART4_BITS
+#define UART4_BITS UBITS_8
+#endif
+
+#ifndef UART4_STOP
+#define UART4_STOP USTOP_1
+#endif
+
+#ifndef UART4_PARITY
+#define UART4_PARITY UPARITY_NO
+#endif
+
 void uart4_init( void ) {
 
   uart_periph_init(&uart4);
@@ -342,6 +418,7 @@ void uart4_init( void ) {
 
   /* Configure USART */
   uart_periph_set_mode(&uart4, USE_UART4_TX, USE_UART4_RX, FALSE);
+  uart_periph_set_bits_stop_parity(&uart4, UART4_BITS, UART4_STOP, UART4_PARITY);
   uart_periph_set_baudrate(&uart4, UART4_BAUD);
 }
 
@@ -360,6 +437,18 @@ void uart4_isr(void) { usart_isr(&uart4); }
 #define USE_UART5_RX TRUE
 #endif
 
+#ifndef UART5_BITS
+#define UART5_BITS UBITS_8
+#endif
+
+#ifndef UART5_STOP
+#define UART5_STOP USTOP_1
+#endif
+
+#ifndef UART5_PARITY
+#define UART5_PARITY UPARITY_NO
+#endif
+
 void uart5_init( void ) {
 
   uart_periph_init(&uart5);
@@ -380,6 +469,7 @@ void uart5_init( void ) {
 
   /* Configure USART */
   uart_periph_set_mode(&uart5, USE_UART5_TX, USE_UART5_RX, FALSE);
+  uart_periph_set_bits_stop_parity(&uart5, UART5_BITS, UART5_STOP, UART5_PARITY);
   uart_periph_set_baudrate(&uart5, UART5_BAUD);
 }
 
@@ -402,6 +492,18 @@ void uart5_isr(void) { usart_isr(&uart5); }
 #define UART6_HW_FLOW_CONTROL FALSE
 #endif
 
+#ifndef UART6_BITS
+#define UART6_BITS UBITS_8
+#endif
+
+#ifndef UART6_STOP
+#define UART6_STOP USTOP_1
+#endif
+
+#ifndef UART6_PARITY
+#define UART6_PARITY UPARITY_NO
+#endif
+
 void uart6_init( void ) {
 
   uart_periph_init(&uart6);
@@ -430,7 +532,7 @@ void uart6_init( void ) {
 
   /* Configure USART Tx,Rx and hardware flow control*/
   uart_periph_set_mode(&uart6, USE_UART6_TX, USE_UART6_RX, UART6_HW_FLOW_CONTROL);
-
+  uart_periph_set_bits_stop_parity(&uart6, UART6_BITS, UART6_STOP, UART6_PARITY);
   uart_periph_set_baudrate(&uart6, UART6_BAUD);
 }
 
diff --git a/sw/airborne/mcu_periph/uart.h b/sw/airborne/mcu_periph/uart.h
index 1776ae2ca5..e98cafb1f1 100644
--- a/sw/airborne/mcu_periph/uart.h
+++ b/sw/airborne/mcu_periph/uart.h
@@ -46,10 +46,21 @@
 #define B19200   19200
 #define B38400   38400
 #define B57600   57600
+#define B100000  100000
 #define B115200  115200
 #define B230400  230400
 #define B921600  921600
 
+#define UBITS_7 0
+#define UBITS_8 1
+
+#define USTOP_1 0
+#define USTOP_2 1
+
+#define UPARITY_NO    0
+#define UPARITY_EVEN  1
+#define UPARITY_ODD   2
+
 /**
  * UART peripheral
  */
@@ -75,6 +86,7 @@ struct uart_periph {
 
 extern void uart_periph_init(struct uart_periph* p);
 extern void uart_periph_set_baudrate(struct uart_periph* p, uint32_t baud);
+extern void uart_periph_set_bits_stop_parity(struct uart_periph* p, uint8_t bits, uint8_t stop, uint8_t parity);
 extern void uart_periph_set_mode(struct uart_periph* p, bool_t tx_enabled, bool_t rx_enabled, bool_t hw_flow_control);
 extern void uart_transmit(struct uart_periph* p, uint8_t data);
 extern bool_t uart_check_free_space(struct uart_periph* p, uint8_t len);
@@ -97,6 +109,7 @@ extern void uart0_init(void);
 #define UART0Getch() uart_getch(&uart0)
 #define UART0TxRunning uart0.tx_running
 #define UART0SetBaudrate(_b) uart_periph_set_baudrate(&uart0, _b)
+#define UART0SetBitsStopParity(_b, _s, _p) uart_periph_set_bits_stop_parity(&uart0, _b, _s, _p)
 
 #endif // USE_UART0
 
@@ -112,6 +125,7 @@ extern void uart1_init(void);
 #define UART1Getch() uart_getch(&uart1)
 #define UART1TxRunning uart1.tx_running
 #define UART1SetBaudrate(_b) uart_periph_set_baudrate(&uart1, _b)
+#define UART1SetBitsStopParity(_b, _s, _p) uart_periph_set_bits_stop_parity(&uart1, _b, _s, _p)
 
 #endif // USE_UART1
 
@@ -127,6 +141,7 @@ extern void uart2_init(void);
 #define UART2Getch() uart_getch(&uart2)
 #define UART2TxRunning uart2.tx_running
 #define UART2SetBaudrate(_b) uart_periph_set_baudrate(&uart2, _b)
+#define UART2SetBitsStopParity(_b, _s, _p) uart_periph_set_bits_stop_parity(&uart2, _b, _s, _p)
 
 #endif // USE_UART2
 
@@ -142,6 +157,7 @@ extern void uart3_init(void);
 #define UART3Getch() uart_getch(&uart3)
 #define UART3TxRunning uart3.tx_running
 #define UART3SetBaudrate(_b) uart_periph_set_baudrate(&uart3, _b)
+#define UART3SetBitsStopParity(_b, _s, _p) uart_periph_set_bits_stop_parity(&uart3, _b, _s, _p)
 
 #endif // USE_UART3
 
@@ -157,6 +173,7 @@ extern void uart4_init(void);
 #define UART4Getch() uart_getch(&uart4)
 #define UART4TxRunning uart4.tx_running
 #define UART4SetBaudrate(_b) uart_periph_set_baudrate(&uart4, _b)
+#define UART4SetBitsStopParity(_b, _s, _p) uart_periph_set_bits_stop_parity(&uart4, _b, _s, _p)
 
 #endif // USE_UART4
 
@@ -172,6 +189,7 @@ extern void uart5_init(void);
 #define UART5Getch() uart_getch(&uart5)
 #define UART5TxRunning uart5.tx_running
 #define UART5SetBaudrate(_b) uart_periph_set_baudrate(&uart5, _b)
+#define UART5SetBitsStopParity(_b, _s, _p) uart_periph_set_bits_stop_parity(&uart5, _b, _s, _p)
 
 #endif // USE_UART5
 
@@ -187,6 +205,7 @@ extern void uart6_init(void);
 #define UART6Getch() uart_getch(&uart6)
 #define UART6TxRunning uart6.tx_running
 #define UART6SetBaudrate(_b) uart_periph_set_baudrate(&uart6, _b)
+#define UART6SetBitsStopParity(_b, _s, _p) uart_periph_set_bits_stop_parity(&uart6, _b, _s, _p)
 
 #endif // USE_UART6