diff --git a/sw/airborne/arch/chibios/mcu_periph/hal_stm32_dma.c b/sw/airborne/arch/chibios/mcu_periph/hal_stm32_dma.c index 592a1fe033..1dff53d0eb 100644 --- a/sw/airborne/arch/chibios/mcu_periph/hal_stm32_dma.c +++ b/sw/airborne/arch/chibios/mcu_periph/hal_stm32_dma.c @@ -690,14 +690,14 @@ forbiddenCombination: */ bool dma_lld_start_transfert(DMADriver *dmap, volatile void *periphp, void *mem0p, const size_t size) { -#ifdef STM32F7XX +#if __DCACHE_PRESENT if (dmap->config->dcache_memory_in_use && (dmap->config->direction != DMA_DIR_P2M)) { cacheBufferFlush(mem0p, size * dmap->config->msize); } #endif dmap->mem0p = mem0p; -#ifdef STM32F7XX +#if __DCACHE_PRESENT dmap->periphp = periphp; #endif dmap->size = size; @@ -777,7 +777,7 @@ static void dma_lld_serve_interrupt(DMADriver *dmap, uint32_t flags) /* It is possible that the transaction has already be reset by the DMA error handler, in this case this interrupt is spurious.*/ if (dmap->state == DMA_ACTIVE) { -#ifdef STM32F7XX +#if __DCACHE_PRESENT if (dmap->config->dcache_memory_in_use) switch (dmap->config->direction) { case DMA_DIR_M2P : break; diff --git a/sw/airborne/arch/chibios/mcu_periph/hal_stm32_dma.h b/sw/airborne/arch/chibios/mcu_periph/hal_stm32_dma.h index aa0edc8989..630407e232 100644 --- a/sw/airborne/arch/chibios/mcu_periph/hal_stm32_dma.h +++ b/sw/airborne/arch/chibios/mcu_periph/hal_stm32_dma.h @@ -31,6 +31,9 @@ #include #include +#ifdef __cplusplus +extern "C" { +#endif /** * @brief Enables synchronous APIs. @@ -226,9 +229,6 @@ static inline void _dma_isr_error_code(DMADriver *dmap, dmaerrormask_t err); -#ifdef __cplusplus -extern "C" { -#endif /** * @brief DMA stream configuration structure. @@ -319,7 +319,7 @@ typedef struct { * @brief DMA memory data granurality in bytes (1,2,4) */ uint8_t msize; // 1,2,4 -#ifdef STM32F7XX +#if __DCACHE_PRESENT /** * @brief DMA memory is in a cached section and beed to be flushed */ @@ -408,7 +408,7 @@ struct DMADriver { */ uint32_t dmamode; -#ifdef STM32F7XX +#if __DCACHE_PRESENT /** * @brief periph address (or destination memory in case of M2M) */ diff --git a/sw/airborne/arch/chibios/modules/actuators/esc_dshot.c b/sw/airborne/arch/chibios/modules/actuators/esc_dshot.c index 3a81d44127..56fbee40fa 100644 --- a/sw/airborne/arch/chibios/modules/actuators/esc_dshot.c +++ b/sw/airborne/arch/chibios/modules/actuators/esc_dshot.c @@ -141,7 +141,9 @@ void dshotStart(DSHOTDriver *driver, const DSHOTConfig *config) .direction = DMA_DIR_M2P, .psize = timerWidthInBytes, .msize = timerWidthInBytes, +#if __DCACHE_PRESENT .dcache_memory_in_use = config->dcache_memory_in_use, +#endif .inc_peripheral_addr = false, .inc_memory_addr = true, .circular = false, diff --git a/sw/airborne/arch/chibios/modules/actuators/esc_dshot.h b/sw/airborne/arch/chibios/modules/actuators/esc_dshot.h index 7bdbb9757d..15c96044a4 100644 --- a/sw/airborne/arch/chibios/modules/actuators/esc_dshot.h +++ b/sw/airborne/arch/chibios/modules/actuators/esc_dshot.h @@ -178,10 +178,12 @@ typedef struct { */ DshotDmaBuffer *dma_buf; +#if __DCACHE_PRESENT /** * @brief DMA memory is in a cached section and beed to be flushed */ bool dcache_memory_in_use; +#endif } DSHOTConfig; void dshotStart(DSHOTDriver *driver, const DSHOTConfig *config); diff --git a/sw/airborne/boards/apogee/chibios/v1.0/board.h b/sw/airborne/boards/apogee/chibios/v1.0/board.h index c8641584a2..4896736da9 100644 --- a/sw/airborne/boards/apogee/chibios/v1.0/board.h +++ b/sw/airborne/boards/apogee/chibios/v1.0/board.h @@ -391,7 +391,6 @@ .pwmp = &PWMD2, \ .tlm_sd = DSHOT_TELEMETRY_DEV, \ .dma_buf = &dshot2DmaBuffer, \ - .dcache_memory_in_use = false \ } #endif @@ -436,7 +435,6 @@ .pwmp = &PWMD3, \ .tlm_sd = DSHOT_TELEMETRY_DEV, \ .dma_buf = &dshot3DmaBuffer, \ - .dcache_memory_in_use = false \ } #endif