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anjiahao
603c87977f
kasan does not instrument the assembly function, so it is checked in advance before calling. If Kasan is not turned on, the speed and space will be almost unchanged under compiler optimization. Signed-off-by: anjiahao <anjiahao@xiaomi.com>
186 lines
4.2 KiB
ArmAsm
186 lines
4.2 KiB
ArmAsm
/****************************************************************************
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* libs/libc/machine/xtensa/arch_memset.S
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include "xtensa_asm.h"
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#include <arch/chip/core-isa.h>
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#include <arch/xtensa/xtensa_abi.h>
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#include "libc.h"
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#ifdef LIBC_BUILD_MEMSET
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/* void *memset (void *dst, int c, size_t length)
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The algorithm is as follows:
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Create a word with c in all byte positions.
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If the destination is aligned, set 16B chunks with a loop, and then
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finish up with 8B, 4B, 2B, and 1B stores conditional on the length.
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If the destination is unaligned, align it by conditionally
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setting 1B and/or 2B and then go to aligned case.
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This code tries to use fall-through branches for the common
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case of an aligned destination (except for the branches to
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the alignment labels). */
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/* Byte-by-byte set. */
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.section .text
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.begin schedule
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.literal_position
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.local .Lbyteset
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.local .Ldst1mod2
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.local .Ldst2mod4
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.align 4
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.global ARCH_LIBCFUN(memset)
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.type ARCH_LIBCFUN(memset), @function
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ARCH_LIBCFUN(memset):
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ENTRY(16)
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/* a2 = dst, a3 = c, a4 = length */
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/* Duplicate character into all bytes of word. */
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extui a3, a3, 0, 8
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slli a7, a3, 8
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or a3, a3, a7
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slli a7, a3, 16
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or a3, a3, a7
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mov a5, a2 // copy dst so that a2 is return value
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/* Check if dst is unaligned. */
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bbsi.l a2, 0, .Ldst1mod2
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bbsi.l a2, 1, .Ldst2mod4
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j .Ldstaligned
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.Ldst1mod2: // dst is only byte aligned
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/* Do short sizes byte-by-byte. */
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bltui a4, 8, .Lbyteset
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/* Set 1 byte. */
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s8i a3, a5, 0
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addi a5, a5, 1
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addi a4, a4, -1
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/* Now retest if dst is aligned. */
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bbci.l a5, 1, .Ldstaligned
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.Ldst2mod4: // dst has 16-bit alignment
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/* Do short sizes byte-by-byte. */
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bltui a4, 8, .Lbyteset
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/* Set 2 bytes. */
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s16i a3, a5, 0
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addi a5, a5, 2
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addi a4, a4, -2
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/* dst is now aligned; fall through to main algorithm */
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.Ldstaligned:
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/* Get number of loop iterations with 16B per iteration. */
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srli a7, a4, 4
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/* Destination is word-aligned. */
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#if XCHAL_HAVE_LOOPS
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loopnez a7, 2f
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#else
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beqz a7, 2f
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slli a6, a7, 4
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add a6, a6, a5 // a6 = end of last 16B chunk
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#endif
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/* Set 16 bytes per iteration. */
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1: s32i a3, a5, 0
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s32i a3, a5, 4
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s32i a3, a5, 8
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s32i a3, a5, 12
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addi a5, a5, 16
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#if !XCHAL_HAVE_LOOPS
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bltu a5, a6, 1b
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#endif
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/* Set any leftover pieces smaller than 16B. */
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2: bbci.l a4, 3, 3f
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/* Set 8 bytes. */
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s32i a3, a5, 0
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s32i a3, a5, 4
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addi a5, a5, 8
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3: bbci.l a4, 2, 4f
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/* Set 4 bytes. */
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s32i a3, a5, 0
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addi a5, a5, 4
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4: bbci.l a4, 1, 5f
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/* Set 2 bytes. */
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s16i a3, a5, 0
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addi a5, a5, 2
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5: bbci.l a4, 0, 6f
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/* Set 1 byte. */
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s8i a3, a5, 0
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6: RET(16)
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// .align XCHAL_INST_FETCH_WIDTH
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__memset_aux:
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/* Skip bytes to get proper alignment for three-byte loop */
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// .skip XCHAL_INST_FETCH_WIDTH - 3
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.Lbyteset:
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#if XCHAL_HAVE_LOOPS
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loopnez a4, 2f
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#else
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beqz a4, 2f
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add a6, a5, a4 // a6 = ending address
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#endif
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1: s8i a3, a5, 0
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addi a5, a5, 1
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#if !XCHAL_HAVE_LOOPS
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bltu a5, a6, 1b
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#endif
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2: RET(16)
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.end schedule
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.size ARCH_LIBCFUN(memset), . - ARCH_LIBCFUN(memset)
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#endif
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