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ac019bbfa2
Realization of cfi-flash driver. Add the interfaces of intel and amd command sets. Signed-off-by: zhengyu9 <zhengyu9@xiaomi.com> Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
132 lines
6.6 KiB
C
132 lines
6.6 KiB
C
/****************************************************************************
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* drivers/mtd/cfi.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __DRIVERS_MTD_CFI_H
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#define __DRIVERS_MTD_CFI_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/mtd/mtd.h>
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#include <nuttx/compiler.h>
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/****************************************************************************
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* Pre-processor definitions
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****************************************************************************/
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/****************************************************************************
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* Public Types
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****************************************************************************/
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begin_packed_struct struct cfi_info_s
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{
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uint8_t qry[3]; /* query-unique ASCII string 'QRY' */
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uint16_t p_id; /* primary vendor command set and control
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* interface id */
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uint16_t p_addr; /* primary algorithm extended query table
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* address */
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uint16_t a_id; /* alternative vendor command set and
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* control interface id */
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uint16_t a_addr; /* alternative algorithm extended query
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* table address */
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uint8_t vccmin; /* Vcc logic supply minimum program/erase
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* or write voltage */
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uint8_t vccmax; /* Vcc logic supply maximum program/erase
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* or write voltage */
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uint8_t vppmin; /* Vpp logic supply minimum program/erase
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* or write voltage */
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uint8_t vppmax; /* Vpp logic supply maximum program/erase
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* or write voltage */
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uint8_t single_write_timeout_typ; /* typical timeout per single byte/word/
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* D-word program, 2^N us */
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uint8_t buffer_write_timeout_typ; /* typical timeout for maximum-size
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* multi-byte program, 2^N us */
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uint8_t block_erase_timeout_typ; /* typical timeout per individual block
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* erase, 2^N ms */
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uint8_t chip_erase_timeout_typ; /* typical timeout for full chip erase,
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* 2^N ms */
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uint8_t single_write_timeout_max; /* maximum timeout per single byte/word/
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* D-word program, 2^N times typical */
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uint8_t buffer_write_timeout_max; /* maximum timeout for multi-byte program,
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* 2^N times typical */
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uint8_t block_erase_timeout_max; /* maximum timeout per individual block
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* erase, 2^N times typical */
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uint8_t chip_erase_timeout_max; /* typical timeout for full chip erase,
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* 2^N times typical */
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uint8_t device_size; /* device size = 2^N in number of bytes */
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uint16_t interface_desc; /* flash device interface code
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* description */
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uint16_t max_write_bytes_num; /* maximum number of bytes in multi-byte
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* program = 2^N */
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uint8_t erase_region_num; /* number of erase block regions */
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uint32_t erase_region_info[4]; /* erase block region information
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* bits 31-16 = z, where the erase blocks
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* within this region are z times 256
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* bytes.
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* bits 15-0 = y, where y + 1 = number of
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* erase blocks within the erase block
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* region. */
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}end_packed_struct;
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/* This type represents the state of the MTD device. The struct mtd_dev_s
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* must appear at the beginning of the definition so that you can freely
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* cast between pointers to struct mtd_dev_s and struct skel_dev_s.
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*/
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struct cfi_dev_s
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{
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/* Publicly visible representation of the interface */
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struct mtd_dev_s mtd;
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/* Other implementation specific data may follow here */
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uintptr_t base_addr; /* base address of cfi flash */
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uintptr_t end_addr; /* end address of cfi flash */
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size_t page_size; /* page size for read and write */
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uint8_t bankwidth; /* port width of the whole device */
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uint8_t dev_width; /* port width of single chip */
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uint8_t dev_num; /* equals to bankwith divided by dev_width */
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uint8_t cfi_offset; /* cfi offset address, 0x55 or 0x555 */
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uint32_t unlock_addr1; /* unlock addr1 for amd */
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uint32_t unlock_addr2; /* unlock addr2 for amd */
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struct cfi_info_s info; /* struct of cfi information */
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};
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/****************************************************************************
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* Public function prototypes
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****************************************************************************/
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size_t cfi_get_blocksize(FAR struct cfi_dev_s *cfi, uint8_t region);
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blkcnt_t cfi_get_blocknum(FAR struct cfi_dev_s *cfi, uint8_t region);
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blkcnt_t cfi_find_block(FAR struct cfi_dev_s *cfi, off_t offset);
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blkcnt_t cfi_get_total_blocknum(FAR struct cfi_dev_s *cfi);
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int cfi_check(FAR struct cfi_dev_s *cfi);
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void cfi_reset(FAR struct cfi_dev_s *cfi);
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int cfi_erase(FAR struct cfi_dev_s *cfi, blkcnt_t startblock,
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blkcnt_t blockcnt);
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int cfi_read(FAR struct cfi_dev_s *cfi, off_t offset, size_t nbytes,
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FAR uint8_t *buffer);
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int cfi_write(FAR struct cfi_dev_s *cfi, off_t offset, size_t nbytes,
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FAR const uint8_t *buffer);
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#endif /* __DRIVERS_MTD_CFI_H */
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