nuttx

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Gao Feng 3194ef0e7c arch/xtensa: set PS.EXCM initial value to 1 while new thread created

To avoid level-1 interrupt break retrieve PC/A0/SP/A2 register,
PS.EXCM set to 1 by CPU HW while handling exception/interrupt.

But if context switching happens and new thread created,
the thread initial value of PS.EXCM is used.

Same behevior as ESP-IDF code:
https://github.com/espressif/esp-idf/blob/master/
components/freertos/FreeRTOS-Kernel/portable/xtensa/port.c#L366

Signed-off-by: Gao Feng <Feng.Gao@sony.com>

2025-03-15 11:39:23 +08:00

arm

arch/arm/STM32H5: Initial ICACHE Support

2025-03-10 13:24:02 +08:00

arm64

arm64: Initialize sctrl_el1 when running fork

2025-03-08 23:43:09 +08:00

avr

Revert "Use small lock to protect usbdev and endpoint in AVR."

2025-02-13 14:15:43 +08:00

ceva

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