ouyangxiangzhen 7185f41356 arch/intel64: Support MSR_IA32_TSC_ADJUST. ...

On newer x86 CPUs, the MSR_IA32_TSC_ADJUST register is utilized to fine-tune the offset of the Time Stamp Counter (TSC). This commit introduces support for MSR_IA32_TSC_ADJUST and enhances the TSC tickless
driver, optimizing its performance.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>

2025-11-17 10:25:37 +08:00

..

arm

arm/lc823450: Use clock_systime_ticks() to access system ticks

2025-11-13 18:40:16 -03:00

arm64

arch/arm64: add timer initialization for the secondary CPUs.

2025-11-17 10:25:37 +08:00

avr

arch/init: call up_color_intstack before up_irq_enable

2025-10-14 17:42:01 +08:00

ceva

arch/init: call up_color_intstack before up_irq_enable

2025-10-14 17:42:01 +08:00

dummy

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hc

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mips

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misoc

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or1k

arch/init: call up_color_intstack before up_irq_enable

2025-10-14 17:42:01 +08:00

renesas

renesas/rx65n: Replace spinlock/sched_lock with spin_lock_irqsave_nopreempt

2025-11-04 22:46:15 +08:00

risc-v

arch/risc-v: simplify mtimer driver.

2025-11-17 10:25:37 +08:00

sim

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sparc

arch/init: call up_color_intstack before up_irq_enable

2025-10-14 17:42:01 +08:00

tricore

arch/tricore: Fix specific definitions in the generic UART module

2025-11-14 01:48:17 +08:00

x86

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x86_64

arch/intel64: Support MSR_IA32_TSC_ADJUST.

2025-11-17 10:25:37 +08:00

xtensa

xtensa/esp32s2: Replace spinlock/sched_lock with spin_lock_irqsave_nopreempt

2025-11-04 22:46:15 +08:00

z16

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z80

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CMakeLists.txt

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Kconfig

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