Abdelatif Guettouche 329db99e51 arch/xtensa: Use rsync around manipulating interrupt registers and ...

replace `isync` by `rsync` in other places.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>

2022-03-11 02:23:09 +02:00

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esp32

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esp32s2

xtensa/esp32s2: Sync IRQ management API with ESP32 and ESP32-S3

2022-03-08 11:36:32 -03:00

esp32s3

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lx6

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lx7

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xtensa

xtensa: spit up_irq_disable and up_irq_save INTLEVEL MARCO

2022-02-25 20:43:03 +08:00

.gitignore

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arch.h

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elf.h

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inttypes.h

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irq.h

arch/xtensa: Use rsync around manipulating interrupt registers and

2022-03-11 02:23:09 +02:00

limits.h

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loadstore.h

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setjmp.h

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simcall.h

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spinlock.h

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stdarg.h

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syscall.h

arch/xtensa: Use rsync around manipulating interrupt registers and

2022-03-11 02:23:09 +02:00

types.h

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