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dechao_gong
30cbb23e6b
Wire the shared Ameba I2C master lower-half (arch/arm/src/common/ ameba/ameba_i2c.c) into the RTL8721F (amebagreen2) build through a per-chip header (ameba_i2c_chip.h), and register the RTL8721F EVB buses at /dev/i2cN. Per-chip differences from the other Ameba SoCs (non-secure register bases, crossbar pinmux codes, APB clock masks and the fwlib I2C_InitTypeDef layout) are isolated in ameba_i2c_chip.h; no change to the shared driver is needed. Verified end-to-end on hardware against a second Ameba board acting as an I2C slave: address ACK, register write and read-back over repeated-START, and bus scan all pass on I2C0 (PA22/PA23). Assisted-by: Claude <noreply@anthropic.com> Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>