Files
nuttx/arch
liang.huang 1653db7ddc riscv: Fix page table traversal for SV39
With CONFIG_PAGING enabled and the RISC-V SV39 MMU active, the page fault
handler incorrectly tracked page table levels: `ptprev` pointed to the L1
page table while `ptlevel` indicated L2. This inconsistency caused faulty
virtual address resolution.

This commit fixes the traversal logic to ensure consistent level tracking
across all three page table levels (L1–L3), enabling reliable page fault
handling and on-demand paging.

Additional changes:
- Set PGT_L3_SIZE to 2048 to enable mapping up to 8MB of address space.
- Update knsh_paging config to avoid crashes caused by excessive memory
  alignment requirements.
- Add knsh64_paging config to verify this commit works as expected.

Signed-off-by: liang.huang <liang.huang@houmo.ai>
2026-02-04 11:52:04 -03:00
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