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xHCI requires aligned accesses of each register's own size, and a controller may ignore narrower ones; QEMU's does. volatile does not pin the access width: GCC 16.1.0 at -Os narrows a 32-bit load feeding a single bit test into a byte load, so polling USBSTS for HCH never observes the halted state. Launder each register value through a register with an empty asm, on loads and stores both, so the access is the width the source specifies. Assisted-by: Claude:claude-opus-5 Signed-off-by: Justin Hammond <justin@dynam.ac>