The MMC CMD6 bus width switch was gated on priv->buswidth which is
derived from the SD SCR register. For MMC cards this field is never
set (unless SDIO_CAPS_4BIT_ONLY), so the CMD6 was skipped while the
host PROCTL DTW was still changed - causing a bus width mismatch and
data transfer timeouts.
Fix by checking priv->caps instead of priv->buswidth for MMC cards.
Also select EXT_CSD_BUS_WIDTH_8 when host reports SDIO_CAPS_8BIT.
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
buxiasen
9feaa4d841