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078e7099b7
Add WDT driver for K210 with support for both WDT0 and WDT1 peripherals. This includes: - Add k210_wdt.c and k210_wdt.h driver files with interrupt-based watchdog timer functionality - Add hardware register definitions in k210_wdt.h - Add K210_WDT, K210_WDT0, K210_WDT1 Kconfig options - Add memory map definitions for WDT0 (0x50400000) and WDT1 (0x50410000) - Reorder WDT IRQ definitions (IRQ 21, 22) before UART0 (IRQ 33) in irq.h - Add WDT initialization in board bringup for maix-bit Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
47 lines
1.2 KiB
ReStructuredText
47 lines
1.2 KiB
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=============
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Kendryte K210
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=============
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System Controller (sysctl)
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==========================
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The K210 System Controller (sysctl) driver provides essential clock and reset
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control functionality for the K210 SoC. It is built unconditionally for all
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K210 boards.
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Clock Frequency Configuration
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-----------------------------
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The driver supports querying clock frequencies for:
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* PLL frequencies (PLL0, PLL1, PLL2)
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* CPU clock frequency
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* APB bus frequencies (APB0, APB1, APB2)
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* Individual peripheral clock frequencies
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CPU frequency can be configured at build time using the ``K210_CPU_FREQ``
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Kconfig option (default: 400 MHz, range: 40-600 MHz).
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Watchdog Timers
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===============
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The K210 has two independent watchdog timers (WDT0 and WDT1) for system
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reliability. Both are accessible as character drivers via the standard
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NuttX watchdog interface.
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* **WDT0**: Base address ``0x50400000``, IRQ 21
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* **WDT1**: Base address ``0x50410000``, IRQ 22
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* **Timeout range**: Programmable based on 16-bit counter
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Enable via Kconfig: ``CONFIG_K210_WDT`` (automatically selects
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``CONFIG_WATCHDOG``). Devices are ``/dev/watchdog0`` and ``/dev/watchdog1``.
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Supported Boards
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================
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.. toctree::
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:glob:
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:maxdepth: 1
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boards/*/*
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