/**************************************************************************** * drivers/audio/aw88266a.h * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. The * ASF licenses this file to you under the Apache License, Version 2.0 (the * "License"); you may not use this file except in compliance with the * License. You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the * License for the specific language governing permissions and limitations * under the License. * ****************************************************************************/ #ifndef __DRIVERS_AUDIO_AW88266AH__ #define __DRIVERS_AUDIO_AW88266AH__ /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ /* registers list */ #define AW88266A_ID_REG (0x00) #define AW88266A_SYSST_REG (0x01) #define AW88266A_SYSINT_REG (0x02) #define AW88266A_SYSINTM_REG (0x03) #define AW88266A_SYSCTRL_REG (0x04) #define AW88266A_SYSCTRL2_REG (0x05) #define AW88266A_I2SCTRL1_REG (0x06) #define AW88266A_I2SCTRL2_REG (0x07) #define AW88266A_DACCFG1_REG (0x08) #define AW88266A_DACCFG2_REG (0x09) #define AW88266A_DACCFG3_REG (0x0A) #define AW88266A_DACCFG4_REG (0x0B) #define AW88266A_DACCFG5_REG (0x0C) #define AW88266A_DACCFG6_REG (0x0D) #define AW88266A_DACCFG7_REG (0x0E) #define AW88266A_PWMCTRL_REG (0x10) #define AW88266A_I2SCFG1_REG (0x11) #define AW88266A_DBGCTRL_REG (0x12) #define AW88266A_DACST_REG (0x20) #define AW88266A_VBAT_REG (0x21) #define AW88266A_TEMP_REG (0x22) #define AW88266A_PVDD_REG (0x23) #define AW88266A_ISNDAT_REG (0x24) #define AW88266A_VSNDAT_REG (0x25) #define AW88266A_I2SINT_REG (0x26) #define AW88266A_I2SCAPCNT_REG (0x27) #define AW88266A_ANASTA1_REG (0x28) #define AW88266A_ANASTA2_REG (0x29) #define AW88266A_ANASTA3_REG (0x2A) #define AW88266A_TESTDET_REG (0x2B) #define AW88266A_TESTIN_REG (0x38) #define AW88266A_TESTOUT_REG (0x39) #define AW88266A_VSNTM1_REG (0x50) #define AW88266A_VSNTM2_REG (0x51) #define AW88266A_ISNCTRL1_REG (0x52) #define AW88266A_PLLCTRL1_REG (0x53) #define AW88266A_PLLCTRL2_REG (0x54) #define AW88266A_PLLCTRL3_REG (0x55) #define AW88266A_CDACTRL1_REG (0x56) #define AW88266A_CDACTRL2_REG (0x57) #define AW88266A_SADCCTRL1_REG (0x58) #define AW88266A_BSTCTRL1_REG (0x60) #define AW88266A_BSTCTRL2_REG (0x61) #define AW88266A_BSTCTRL3_REG (0x62) #define AW88266A_BSTCTRL4_REG (0x63) #define AW88266A_BSTCTRL5_REG (0x64) #define AW88266A_BSTCTRL6_REG (0x65) #define AW88266A_DSMCFG1_REG (0x66) #define AW88266A_DSMCFG2_REG (0x67) #define AW88266A_DSMCFG3_REG (0x68) #define AW88266A_DSMCFG4_REG (0x69) #define AW88266A_DSMCFG5_REG (0x6A) #define AW88266A_DSMCFG6_REG (0x6B) #define AW88266A_DSMCFG7_REG (0x6C) #define AW88266A_DSMCFG8_REG (0x6D) #define AW88266A_TESTCTRL1_REG (0x70) #define AW88266A_TESTCTRL2_REG (0x71) #define AW88266A_EFCTRL1_REG (0x72) #define AW88266A_EFCTRL2_REG (0x73) #define AW88266A_EFWH_REG (0x74) #define AW88266A_EFWM2_REG (0x75) #define AW88266A_EFWM1_REG (0x76) #define AW88266A_EFWL_REG (0x77) #define AW88266A_EFRH_REG (0x78) #define AW88266A_EFRM2_REG (0x79) #define AW88266A_EFRM1_REG (0x7A) #define AW88266A_EFRL_REG (0x7B) #define AW88266A_TM_REG (0x7C) #define AW88266A_REG_MAX (0x7D) #define AW88266A_REG_NONE_ACCESS (0) #define AW88266A_REG_RD_ACCESS (1 << 0) #define AW88266A_REG_WR_ACCESS (1 << 1) #define AW88266A_GAIN_MAX (767) /* detail information of registers begin * ID (0x00) detail * IDCODE bit 15:0 (ID 0x00) */ #define AW88266A_IDCODE_START_BIT (0) #define AW88266A_IDCODE_BITS_LEN (16) #define AW88266A_IDCODE_MASK \ (~(((1 << AW88266A_IDCODE_BITS_LEN) - 1 ) << AW88266A_IDCODE_START_BIT)) #define AW88266A_IDCODE_DEFAULT_VALUE (0x2013) #define AW88266A_IDCODE_DEFAULT \ (AW88266A_IDCODE_DEFAULT_VALUE << AW88266A_IDCODE_START_BIT) /* default value of ID (0x00) * #define AW88266A_ID_DEFAULT (0x2013) */ /* SYSST (0x01) detail * OVP2S bit 15 (SYSST 0x01) */ #define AW88266A_OVP2S_START_BIT (15) #define AW88266A_OVP2S_BITS_LEN (1) #define AW88266A_OVP2S_MASK \ (~(((1 << AW88266A_OVP2S_BITS_LEN) - 1) << AW88266A_OVP2S_START_BIT)) #define AW88266A_OVP2S_NORMAL (0) #define AW88266A_OVP2S_NORMAL_VALUE \ (AW88266A_OVP2S_NORMAL << AW88266A_OVP2S_START_BIT) #define AW88266A_OVP2S_OVP (1) #define AW88266A_OVP2S_OVP_VALUE \ (AW88266A_OVP2S_OVP << AW88266A_OVP2S_START_BIT) #define AW88266A_OVP2S_DEFAULT_VALUE (0) #define AW88266A_OVP2S_DEFAULT \ (AW88266A_OVP2S_DEFAULT_VALUE << AW88266A_OVP2S_START_BIT) /* UVLS bit 14 (SYSST 0x01) */ #define AW88266A_UVLS_START_BIT (14) #define AW88266A_UVLS_BITS_LEN (1) #define AW88266A_UVLS_MASK \ (~(((1 << AW88266A_UVLS_BITS_LEN) - 1) << AW88266A_UVLS_START_BIT)) #define AW88266A_UVLS_NORMAL (0) #define AW88266A_UVLS_NORMAL_VALUE \ (AW88266A_UVLS_NORMAL << AW88266A_UVLS_START_BIT) #define AW88266A_UVLS_UVLO (1) #define AW88266A_UVLS_UVLO_VALUE \ (AW88266A_UVLS_UVLO << AW88266A_UVLS_START_BIT) #define AW88266A_UVLS_DEFAULT_VALUE (0) #define AW88266A_UVLS_DEFAULT \ (AW88266A_UVLS_DEFAULT_VALUE << AW88266A_UVLS_START_BIT) /* ADPS bit 13 (SYSST 0x01) */ #define AW88266A_ADPS_START_BIT (13) #define AW88266A_ADPS_BITS_LEN (1) #define AW88266A_ADPS_MASK \ (~(((1 << AW88266A_ADPS_BITS_LEN) - 1) << AW88266A_ADPS_START_BIT)) #define AW88266A_ADPS_TRANSPARENT (0) #define AW88266A_ADPS_TRANSPARENT_VALUE \ (AW88266A_ADPS_TRANSPARENT << AW88266A_ADPS_START_BIT) #define AW88266A_ADPS_BOOST (1) #define AW88266A_ADPS_BOOST_VALUE \ (AW88266A_ADPS_BOOST << AW88266A_ADPS_START_BIT) #define AW88266A_ADPS_DEFAULT_VALUE (0) #define AW88266A_ADPS_DEFAULT \ (AW88266A_ADPS_DEFAULT_VALUE << AW88266A_ADPS_START_BIT) /* BSTOCS bit 11 (SYSST 0x01) */ #define AW88266A_BSTOCS_START_BIT (11) #define AW88266A_BSTOCS_BITS_LEN (1) #define AW88266A_BSTOCS_MASK \ (~(((1 << AW88266A_BSTOCS_BITS_LEN) - 1) << AW88266A_BSTOCS_START_BIT)) #define AW88266A_BSTOCS_NORMAL (0) #define AW88266A_BSTOCS_NORMAL_VALUE \ (AW88266A_BSTOCS_NORMAL << AW88266A_BSTOCS_START_BIT) #define AW88266A_BSTOCS_OVER_CURRENT (1) #define AW88266A_BSTOCS_OVER_CURRENT_VALUE \ (AW88266A_BSTOCS_OVER_CURRENT << AW88266A_BSTOCS_START_BIT) #define AW88266A_BSTOCS_DEFAULT_VALUE (0) #define AW88266A_BSTOCS_DEFAULT \ (AW88266A_BSTOCS_DEFAULT_VALUE << AW88266A_BSTOCS_START_BIT) /* OVPS bit 10 (SYSST 0x01) */ #define AW88266A_OVPS_START_BIT (10) #define AW88266A_OVPS_BITS_LEN (1) #define AW88266A_OVPS_MASK \ (~(((1 << AW88266A_OVPS_BITS_LEN) - 1) << AW88266A_OVPS_START_BIT)) #define AW88266A_OVPS_NORMAL (0) #define AW88266A_OVPS_NORMAL_VALUE \ (AW88266A_OVPS_NORMAL << AW88266A_OVPS_START_BIT) #define AW88266A_OVPS_OVP (1) #define AW88266A_OVPS_OVP_VALUE \ (AW88266A_OVPS_OVP << AW88266A_OVPS_START_BIT) #define AW88266A_OVPS_DEFAULT_VALUE (0) #define AW88266A_OVPS_DEFAULT \ (AW88266A_OVPS_DEFAULT_VALUE << AW88266A_OVPS_START_BIT) /* BSTS bit 9 (SYSST 0x01) */ #define AW88266A_BSTS_START_BIT (9) #define AW88266A_BSTS_BITS_LEN (1) #define AW88266A_BSTS_MASK \ (~(((1 << AW88266A_BSTS_BITS_LEN) - 1) << AW88266A_BSTS_START_BIT)) #define AW88266A_BSTS_NOT_FINISHED (0) #define AW88266A_BSTS_NOT_FINISHED_VALUE \ (AW88266A_BSTS_NOT_FINISHED << AW88266A_BSTS_START_BIT) #define AW88266A_BSTS_FINISHED (1) #define AW88266A_BSTS_FINISHED_VALUE \ (AW88266A_BSTS_FINISHED << AW88266A_BSTS_START_BIT) #define AW88266A_BSTS_DEFAULT_VALUE (0) #define AW88266A_BSTS_DEFAULT \ (AW88266A_BSTS_DEFAULT_VALUE << AW88266A_BSTS_START_BIT) /* SWS bit 8 (SYSST 0x01) */ #define AW88266A_SWS_START_BIT (8) #define AW88266A_SWS_BITS_LEN (1) #define AW88266A_SWS_MASK \ (~(((1 << AW88266A_SWS_BITS_LEN) - 1) << AW88266A_SWS_START_BIT)) #define AW88266A_SWS_NOT_SWITCHING (0) #define AW88266A_SWS_NOT_SWITCHING_VALUE \ (AW88266A_SWS_NOT_SWITCHING << AW88266A_SWS_START_BIT) #define AW88266A_SWS_SWITCHING (1) #define AW88266A_SWS_SWITCHING_VALUE \ (AW88266A_SWS_SWITCHING << AW88266A_SWS_START_BIT) #define AW88266A_SWS_DEFAULT_VALUE (0) #define AW88266A_SWS_DEFAULT \ (AW88266A_SWS_DEFAULT_VALUE << AW88266A_SWS_START_BIT) /* NOCLKS bit 5 (SYSST 0x01) */ #define AW88266A_NOCLKS_START_BIT (5) #define AW88266A_NOCLKS_BITS_LEN (1) #define AW88266A_NOCLKS_MASK \ (~(((1 << AW88266A_NOCLKS_BITS_LEN) - 1) << AW88266A_NOCLKS_START_BIT)) #define AW88266A_NOCLKS_CLOCK_OK (0) #define AW88266A_NOCLKS_CLOCK_OK_VALUE \ (AW88266A_NOCLKS_CLOCK_OK << AW88266A_NOCLKS_START_BIT) #define AW88266A_NOCLKS_NO_CLOCK (1) #define AW88266A_NOCLKS_NO_CLOCK_VALUE \ (AW88266A_NOCLKS_NO_CLOCK << AW88266A_NOCLKS_START_BIT) #define AW88266A_NOCLKS_DEFAULT_VALUE (0) #define AW88266A_NOCLKS_DEFAULT \ (AW88266A_NOCLKS_DEFAULT_VALUE << AW88266A_NOCLKS_START_BIT) /* CLKS bit 4 (SYSST 0x01) */ #define AW88266A_CLKS_START_BIT (4) #define AW88266A_CLKS_BITS_LEN (1) #define AW88266A_CLKS_MASK \ (~(((1 << AW88266A_CLKS_BITS_LEN) - 1) << AW88266A_CLKS_START_BIT)) #define AW88266A_CLKS_NOT_STABLE (0) #define AW88266A_CLKS_NOT_STABLE_VALUE \ (AW88266A_CLKS_NOT_STABLE << AW88266A_CLKS_START_BIT) #define AW88266A_CLKS_STABLE (1) #define AW88266A_CLKS_STABLE_VALUE \ (AW88266A_CLKS_STABLE << AW88266A_CLKS_START_BIT) #define AW88266A_CLKS_DEFAULT_VALUE (0) #define AW88266A_CLKS_DEFAULT \ (AW88266A_CLKS_DEFAULT_VALUE << AW88266A_CLKS_START_BIT) /* OCDS bit 3 (SYSST 0x01) */ #define AW88266A_OCDS_START_BIT (3) #define AW88266A_OCDS_BITS_LEN (1) #define AW88266A_OCDS_MASK \ (~(((1 << AW88266A_OCDS_BITS_LEN) - 1) << AW88266A_OCDS_START_BIT)) #define AW88266A_OCDS_NORAML (0) #define AW88266A_OCDS_NORAML_VALUE \ (AW88266A_OCDS_NORAML << AW88266A_OCDS_START_BIT) #define AW88266A_OCDS_OC (1) #define AW88266A_OCDS_OC_VALUE \ (AW88266A_OCDS_OC << AW88266A_OCDS_START_BIT) #define AW88266A_OCDS_DEFAULT_VALUE (0) #define AW88266A_OCDS_DEFAULT \ (AW88266A_OCDS_DEFAULT_VALUE << AW88266A_OCDS_START_BIT) /* UVL_DVDDS bit 2 (SYSST 0x01) */ #define AW88266A_UVL_DVDDS_START_BIT (2) #define AW88266A_UVL_DVDDS_BITS_LEN (1) #define AW88266A_UVL_DVDDS_MASK \ (~(((1 << AW88266A_UVL_DVDDS_BITS_LEN) - 1) << \ AW88266A_UVL_DVDDS_START_BIT)) #define AW88266A_UVL_DVDDS_NORMAL (0) #define AW88266A_UVL_DVDDS_NORMAL_VALUE \ (AW88266A_UVL_DVDDS_NORMAL << AW88266A_UVL_DVDDS_START_BIT) #define AW88266A_UVL_DVDDS_UVLO (1) #define AW88266A_UVL_DVDDS_UVLO_VALUE \ (AW88266A_UVL_DVDDS_UVLO << AW88266A_UVL_DVDDS_START_BIT) #define AW88266A_UVL_DVDDS_DEFAULT_VALUE (0) #define AW88266A_UVL_DVDDS_DEFAULT \ (AW88266A_UVL_DVDDS_DEFAULT_VALUE << AW88266A_UVL_DVDDS_START_BIT) /* OTHS bit 1 (SYSST 0x01) */ #define AW88266A_OTHS_START_BIT (1) #define AW88266A_OTHS_BITS_LEN (1) #define AW88266A_OTHS_MASK \ (~(((1 << AW88266A_OTHS_BITS_LEN) - 1) << AW88266A_OTHS_START_BIT)) #define AW88266A_OTHS_NORMAL (0) #define AW88266A_OTHS_NORMAL_VALUE \ (AW88266A_OTHS_NORMAL << AW88266A_OTHS_START_BIT) #define AW88266A_OTHS_OT (1) #define AW88266A_OTHS_OT_VALUE \ (AW88266A_OTHS_OT << AW88266A_OTHS_START_BIT) #define AW88266A_OTHS_DEFAULT_VALUE (0) #define AW88266A_OTHS_DEFAULT \ (AW88266A_OTHS_DEFAULT_VALUE<