4357af2493
Tiva Timer: Add support to select alternate clock source and 32-bit register concatenation mode.
2015-01-08 11:08:54 -06:00
6715926fab
Tiva Timer: Add register level debug support
2015-01-08 10:14:38 -06:00
737108e066
Tiva Timer: Add basic framework to configure timers. Incomplete on initial commit
2015-01-08 09:47:38 -06:00
4224fd0edc
Tiva Timer: SYNC regiser is only available on GPTM0
2015-01-08 08:07:31 -06:00
ff02574863
Tiva Timer: Update timer register bit definitions for the LM4F
2015-01-08 08:03:47 -06:00
54bf159bdb
Tiva Timer: Extend timer register definitions to handle other chips
2015-01-08 07:56:00 -06:00
1842525cc2
MMCSD SDIO: Add support for a new SDWAIT_WRCOMPLETE condition. The previous logic used a busy-wait loop to pool the card R1 start to determine when the card was ready for the next transfer. That busy-wait can be quite long -- hundreds of milliseconds. And alternative is to look the the SD D0 pin which will change state when the card is no longer busy.
...
This logic implements a change the avoids the busy-wait poll by reconfiguring the SD D0 pin as a GPIO interrupt, then waiting for the card to becom ready without taking up CPU cycles.
This change is conditioned on CONFIG_MMCSD_SDIOWATI_WRCOMPLETE and is currenlty only implemented for the STM32 SDIO driver.
From David Sidrane
2015-01-08 06:23:42 -06:00
1f10c56dd0
Tiva Timer: Missed one register bit field definition
2015-01-07 12:03:08 -06:00
6a4935f12b
TM4C129X Timer: Completes timer register definition header file
2015-01-07 11:43:56 -06:00
a1065a919a
TM4C129X Timer: Add some missing addresses and some of the register bit definitions. Still incomplete
2015-01-07 10:07:47 -06:00
7be7ace918
TM4C129X Timer: Update addresses in the timer register definitions file. Still missing bit field definitions
2015-01-07 08:57:48 -06:00
7277d66529
Tiva IRQs: Fix IRQ control logic; was limited to only 64 IRQs. That is a problem for higher numbered IRQs on many platforms
2015-01-06 10:49:47 -06:00
6f8125bf61
Tiva I2C: For TM4C, high speed mode is now configurable (but disabled as EXPERIMENTAL)
2015-01-06 10:48:08 -06:00
207835bd0d
Tiva PHY Interrupts: Need to read the PHY interrupt status register in order to clear the pending PHY interrupt
2015-01-05 15:12:45 -06:00
317b7efc7f
Tiva: Fixes to support building Tiva TM4C129X I2C driver
2015-01-05 13:15:40 -06:00
b6fbf41925
Tiva: Update I2C register definitions to include support for the TM4C129X
2015-01-05 13:08:07 -06:00
5752f301de
Tiva Ethernet: Add support for PHY interrupts
2015-01-03 13:16:26 -06:00
bb76c88f19
Tiva Ethernet: Configure external PHY interrupt pin
2015-01-03 10:59:12 -06:00
84c809afe4
Tiva Ethernet: Removed logic that holds the PHY and re-ordered some reset logic. Can not ping the DK
2015-01-03 09:28:54 -06:00
1f013b220d
Tive Ethernet: Wait for EMAC to come out of reset before accessing any registers
2015-01-03 06:52:19 -06:00
24f8fd53ab
Tiva serial: Add volatile to fix a wait loop that was not waiting; CR really should preced LF in CR-LF expansion
2015-01-02 14:05:42 -06:00
52aeabb4b2
Cosmetic changes
2015-01-02 13:59:47 -06:00
44cefe90a9
Tiva: Fix typos in conditional compilation
2015-01-02 13:59:30 -06:00
5009feb414
Tiva Ethernet: Add lots of debug output for testing
2015-01-02 13:10:25 -06:00
213eb321db
Tiva: If peripheral ready register not available, then lets say the peripheral is ready
2015-01-02 12:58:20 -06:00
51544be0e2
Tiva: Wait for the console UART to be ready before configuring it
2015-01-02 12:57:41 -06:00
6358e7c23c
Tiva Ethernet: Fix compile problem when debug enabled
2015-01-02 12:04:22 -06:00
c6e72df007
Tiva GPIO: Fix a compiler error when debug is enabled with TM4C129X
2015-01-02 11:53:02 -06:00
c989f68a6d
Tiva Ethernet: MMC interrupts need to be disable initially
2015-01-02 11:40:48 -06:00
9461b88edc
Tiva Ethernet: Update DMA BUSMODE settings based on TI example code
2015-01-02 11:10:41 -06:00
339f71a315
Tiva Ethernet: Update PHY initialization
2015-01-02 10:11:57 -06:00
00f414d11b
STM32 RTC: Add Kconfig options needed with the preceding commit
2015-01-02 06:45:45 -06:00
5e0571f5a8
stm32-rtc: Add support for the internal low speed clock (LSI)
...
Some boards do not have the external 32khz oscillator installed, for those boards we must fallback to the crummy to the crummy internal RC clock. Turn on by defining CONFIG_RTC_LSICLOCK.
From Kevin Hester <kevinh@geeksville.com > via Lorenz Meier.
2015-01-02 06:32:40 -06:00
a40c9e1d8f
Cosmetic update to some comments
2015-01-02 06:07:56 -06:00
84519f8077
Cosmetic change to file formatting
2015-01-01 15:55:33 -06:00
78d0d911b3
TM4C129X Ethernet: Add logic to get pre-programmed MAC address from user FLASH registers
2015-01-01 12:28:46 -06:00
4d7ed265ce
Tiva FLASH: Add FLASH register definitions for the TM4C129 family
2015-01-01 11:44:35 -06:00
f67363e1ff
Tiva PHY: Hard code some properties of the internal PHY
2015-01-01 08:11:17 -06:00
aef65efd38
Tiva Ethernet: Update Ethernet intializaiton logic. Still things to be done
2015-01-01 07:55:15 -06:00
9b04fb5318
Tiva: Add peripheral ready header file; fix typos in clock/pwr enable header files
2015-01-01 07:54:31 -06:00
51b220c6d5
Ethernet skeleton: Add some more example logic
2014-12-31 13:45:19 -06:00
4782acb012
Tiva Ethernet: Integrate use of workqueue so the network processing is not done at the interrupt level
2014-12-31 13:03:00 -06:00
f9775de8ca
Tiva Ethernet: Add basic clock/power controls for Ethernet and internal PHY
2014-12-31 11:40:01 -06:00
448ab48f8d
Tiva Ethernet: First cut at TM4C129X Ethernet driver. Initial commit is basically just the STM32 Ethernet driver with modifications for a clean compilation in the Tiva environment
2014-12-31 11:34:24 -06:00
24ab902dff
Tiva Ethernet: Minor naming update for compatibility
2014-12-31 09:39:00 -06:00
84485b2601
Tiva Ethernet: Add DMA descriptor definitions
2014-12-31 07:32:11 -06:00
54142ae9a6
Mostly cosmetic
2014-12-30 17:00:15 -06:00
bec4cc0483
Tiva Ethernet: Completes TM4C129X Ethernet register definition header file
2014-12-30 13:42:19 -06:00
dd31c12ed5
Don't error out if no ethernet definitions available
2014-12-30 13:26:18 -06:00
094eb69ca0
Tiva Ethernet: More progress with register bit definitions
2014-12-30 11:08:18 -06:00
Gregory Nutt