Mirrors_Framework/nuttx
1
0
Fork 0
mirror of https://github.com/apache/nuttx.git synced 2026-06-06 08:36:24 +08:00
Code Issues Actions Packages Projects Releases Wiki Activity
43,070 Commits 26 Branches 199 Tags
725f98bb069b79261d3e3208b20dc1d948a6dd44
Commit Graph

18105 Commits

Author SHA1 Message Date
Xiang Xiao b8e99cf12f arch/arm: Remove -march and -mtune 
since -mcpu is enough https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58869

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-10-09 15:57:53 +08:00
chao.an 43fa44cd2a arch/sim/bluetooth: remove depends if native host stack 
Change-Id: Icc4f5e88ac43e0ea14bd0b4ea4b86cb50f773b61
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-10-09 15:26:26 +08:00
liuhuan 4987e17e9a power: Open CONFIG_PM compilation failed 
CHAMPION-144

include debug.h

Change-Id: I12b0c5a2d5e41178a4f158ce0de8393bae0ee26d
Signed-off-by: liuhuan <liuhuan16@xiaomi.com>
 2021-09-30 16:16:51 +08:00
Xiang Xiao 8c2a40f864 power/battery: Move the enumurate to the common place 
so the userspace program can handle the different battery driver equally

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ib00bb6bd6c543c01cb0ed03bc631ec8337720528
 2021-09-29 17:33:23 +08:00
yinshengkai c40a7eb930 tool: add code coverage tool 
N/A

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
Change-Id: I9388a08565508383e53b418696c14ae286b172ce
 2021-09-29 16:34:00 +08:00
chao.an c03abd35bf arch/sim/naming: add getsockname/getpeername into naming list 
Change-Id: I2e9c9dd2295f9f09e3e400729f5c5d06fbeeeb48
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-09-23 19:49:21 +08:00
chao.an c4fcd68c9b arch/sim/usrsock: correct the address length 
Change-Id: I1ed880b0d531b86d2f91fd0b6153a5f641ec6313
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-09-23 19:47:47 +08:00
chao.an 4f90e3877e arch/sim: add native socket support 
Change-Id: If0239d97b6fcc2c10315504448d4f6b705e4d7df
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-09-23 11:31:34 +08:00
Xiang Xiao d980c0ffa2 arch/riscv: Rename riscv_puts to up_puts 
since it's a common API defined in include/nuttx/arch.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-09-18 12:25:28 +08:00
Xiang Xiao 6d888dc8a7 arch/z16: Implement up_puts function 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-09-18 12:25:22 +08:00
Xiang Xiao ae58c07fa7 arch/sim: Implement up_puts function 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-09-18 11:21:09 +08:00
zhuyanlin 1464315884 xtensa:backtrace: flush to stack when in interrupt 
The registers may be in window when in interrupt.
Flush window stack to stack first.
And fix warning in build.

Change-Id: I45f3a8e6aa4f8baa1d54871a02bd6defc8915144
 2021-09-17 10:12:40 +08:00
zhuyanlin 57bafa48b8 arch:xtensa:dumpstate: use sched_dumpstack 
Use sched_dumpstack instead. The backtrace infomation like

xtensa_user_panic: User Exception: EXCCAUSE=0009 task: hello
xtensa_registerdump:    PC: 202b32b8    PS: 00060030
xtensa_registerdump:    A0: a02acb87    A1: 20998d10    A2: ffffaaaa    A3: 12345678
xtensa_registerdump:    A4: a02ba26c    A5: 209949c0    A6: 20990994    A7: 00000258
xtensa_registerdump:    A8: a02b32af    A9: 20998cb0   A10: 0000000f   A11: 209949a0
xtensa_registerdump:   A12: a02be95c   A13: 20994980   A14: 00000003   A15: 209949d0
xtensa_registerdump:   SAR: 00000000 CAUSE: 00000009 VADDR: ffffaaaa
xtensa_registerdump:  LBEG: 00000000  LEND: 00000000  LCNT: 00000000
xtensa_registerdump:  TMP0: 202b1512  TMP1: 20998af0
sched_dumpstack: [BackTrace| 3|0]:  0x202acbae 0x202b232e 0x202b1912 0x202b19f5 0x202b24f1 0x202b152f    0x40023 0x202b32b0
sched_dumpstack: [BackTrace| 3|1]:  0x202acb87 0x202a86a4

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-09-16 20:17:37 +08:00
zhuyanlin 40840204f3 arch:xtensa: add up_backtrace support 
Up_backtrace can be backtrace from task or interrupt.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-09-16 20:17:34 +08:00
zhuyanlin 0bad15d41e xtensa:arch: force up_getsp to inline 
Up_getsp may be not inline in gcc, thus get the sp
is up_getsp function's sp, not the caller function.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-09-16 20:17:31 +08:00
zhuyanlin b1e6bd158a arch:xtensa: remove WSBITS/WBBITS to core.h 
Remove WSBITS/WBBITS macro to core.h as may be used by
arch common code.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2021-09-16 20:17:26 +08:00
zhuyanlin 0b1f2fcb45 xtensa:dcache_clean: use DCACHE_LINZESIZE instead of DCACHE_SIZE 
Clean_dcache use DCACHE_LINZESIZE instead of DCACHE_SIZE in addr loop

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
Change-Id: I7c37ff91b06fff2f29c142a43127acac7fc92941
 2021-09-14 19:56:50 +08:00
Xiang Xiao dcebb60441 arch/arm: Add ARCH_CORTEXM55 Kconfig for cortex-m55 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-09-13 11:28:41 +08:00
zhuyanlin 269266638b xtensa:cache: fix typo error 
use addr instead of add
 2021-09-08 17:49:47 +08:00
zhuyanlin 3f9fbfdc41 arch:xtensa: add xtensa_cache code support 
Add xtensa_cache code support
 2021-09-08 11:40:17 +08:00
zhuyanlin db3fb1ba58 arch:xtensa: add XTENSA_CACHE config support 
Add support for XTENSA_HAVE_ICACHE & XTENSA_HAVE_DACHE
 2021-09-08 11:40:13 +08:00
chao.an be683ba2c9 arm/backtrace: workaround for bes platform 
Change-Id: I2998a23a07b2e72c8eed6a3ab11ca459e74b4ce6
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-09-07 16:49:22 +08:00
chao.an 2c10b3874d arch/arm: correct the function name of up_getsp() 
Change-Id: I1454a6187c4eb744cff802a06a96b19a9dadc080
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-09-07 16:49:18 +08:00
zhuyanlin 46e75346f9 arch:xtensa: add xtensa mpu support 
Add support for Xtensa Memory Protect Unit.

Change-Id: I27e2f05daae24429ef7513d843b4f217daeefa0d
 2021-09-06 16:40:13 +08:00
Xiang Xiao 0d8d90f5aa arch: Replace ar and nm with gcc-ar and gcc-nm 
to make enable LTO easily

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-09-03 10:22:51 +08:00
Xiang Xiao ab5d2adbca libxx: Change CXX_LIBSUPCXX to LIBSUPCXX 
align with other Kconfig(e.g. LIBCXXABI, LIBCXX, UCLIBCXX)

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-29 21:32:01 +08:00
zhuyanlin 8ac82559a7 arch:riscv: remove arch atomic, use libc atomic 
It is more common for implement in libc/machine

Change-Id: I3da6c3db64adb78c05ddb26d3956817ac6ada93e
 2021-08-29 16:10:03 +08:00
zhuyanlin 6d51f0c76a arch:xtensa: rename XCHAL_INT_NLEVELS 
The name used in Tensilica support file core-isa.h for all vendors is
`XCHAL_NUM_INTLEVELS`.
Use a new name may be confused by newer porting xtensa arch.

Change-Id: Ie108d3fdfcc02c81f0eacfca852a1cfc9eea17de
 2021-08-29 16:09:51 +08:00
chao.an 7af4143682 arch/arm/cortex-m: add up_backtrace support 
add up_backtrace support based on push/branch instruction

Change-Id: I9bffecf55b4ad6127e421aa52a5a5bfb01aee0f6
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-08-29 10:23:57 +08:00
chao.an 782a373b53 arch/arm/assert: enhance the assert dump 
show the all tasks info including backtrace and registers

Change-Id: I394f9b2c7ccdd44009a912f6ae5638f6e2f835d1
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-08-29 10:21:37 +08:00
Xiang Xiao 2659ab121f fs: Remove magic field from partition_info_s 
since it is wrong and impossible to return file
system magic number from the block or mtd layer.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-28 09:26:22 +08:00
Xiang Xiao a210e182dd arch/armv8-m: Add SAU support 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-28 09:26:10 +08:00
Alan C. Assis 4294354c9a Fix xtensa_btdump() to look at the exception frame 
Remove xtensa_backtrace_start() since it is not used anymore
 2021-08-26 12:19:50 +08:00
chao.an 7c4521c8f2 arch/armv7: add up_backtrace support based on frame pointer 
This feature depends on frame pointer, "-fno-omit-frame-pointer" is mandatory

This feature can not be used in THUMB2 mode if you are using GCC toolchain,
More details please refer:

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92172

Change-Id: Ic34a6a378b6f01937abf993f2709d5c3279953ea
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-08-25 21:01:09 +08:00
chao.an e48a4edff4 arch/riscv/assert: enhance the assert dump 
enhance the assert dump to show the all tasks info including backtrace and registers

[    7.617000] [ EMERG] up_assert: Assertion failed at file:rv32im/riscv_exception.c line: 94 task: init
[    7.617000] [ EMERG] riscv_dumpstate: Call Trace:
[    7.617000] [  INFO] [BackTrace| 3|0]:  0x4202001e 0x42007cb4 0x42005782 0x42000fe2 0x403801e2 0x403800e2 0x4200bdd0 0x42009894
[    7.617000] [  INFO] [BackTrace| 3|1]:  0x4200a62e 0x42008e8a 0x4200841e 0x42008320 0x42005ad0 0x42001a56
[    7.617000] [ EMERG] riscv_registerdump: EPC:4200bdd0
[    7.617000] [ EMERG] riscv_registerdump: A0:ffffffff A1:00000010 A2:3fc9a95c A3:00000031 A4:00000009 A5:00000002 A6:00000001 A7:00000074
...
...
[    7.617000] [ EMERG] riscv_showtasks: Tasks status:
[    7.617000] [ EMERG] riscv_taskdump: Idle Task: PID=0
[    7.617000] [ EMERG] riscv_taskdump: Stack Used=596 of 976
[    7.617000] [  INFO] [BackTrace| 0|0]:  0x4200787e 0x3fc94ff0
[    7.617000] [ EMERG] riscv_registerdump: EPC:4200787e
[    7.617000] [ EMERG] riscv_registerdump: A0:00000032 A1:3c1008fa A2:3fc94fa8 A3:00000000 A4:00000101 A5:00000032 A6:00000001 A7:00000074
...
[    7.617000] [ EMERG] riscv_taskdump:
[    7.617000] [ EMERG] riscv_taskdump: hpwork: PID=1
[    7.617000] [ EMERG] riscv_taskdump: Stack Used=292 of 2016
[    7.617000] [  INFO] [BackTrace| 1|0]:  0x420082a6 0x4200328c 0x42001ab4 0x42001a42
[    7.617000] [ EMERG] riscv_registerdump: EPC:420082a6
[    7.617000] [ EMERG] riscv_registerdump: A0:00000002 A1:3fc98718 A2:3fc8307c A3:00000002 A4:00000000 A5:00000000 A6:00000000 A7:00000000
...

Change-Id: I284d9621fffd12e774d31133ba0277ba8abf8778
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-08-23 12:08:43 +08:00
chao.an 2e15ea9d9f riscv/backtrace: add up_backtrace support 
Change-Id: Id3e9014b3b9e07fbed20887f08032f87adb356a6
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-08-23 12:08:43 +08:00
xiaoxiang 0371a4df22 Revert "sim: add popen and pclose to nuttx-name.in" 
This reverts commit 6eb29f9715.

Reason for revert: don't need

Change-Id: If600953ae9b2de006e1ce319c68343f1c21facf9
 2021-08-20 22:06:37 +08:00
Jiuzhu Dong 6eb29f9715 sim: add popen and pclose to nuttx-name.in 
Change-Id: Id439ce5e308ce3ae0b618b4752e57965aa98f669
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2021-08-19 22:53:13 +08:00
chao.an 59e2e5fdc8 arch/arm: correct the frame pointer register declare 
In AArch32, the frame pointer is stored in register R11 for ARM code or register R7 for Thumb code.
In AArch64, the frame pointer is stored in register X29.

Change-Id: I0c60cf37bea9bb94b9c2043b4c97e06001214a54
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-08-18 19:37:01 +08:00
chao.an 0eba5015dd riscv/common: add CURRENT_REGS declare in RV32 
Change-Id: I92322a707b29bf1389ba81da118fb8be61877531
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-08-18 19:36:09 +08:00
jordi cd2fbf0b3c Kconfig: add quotes in source to clean warnings from setconfig 
To avoid the setconfig warning "style: quotes recommended around xxx in
source xxx"

Change-Id: Iaec3ae59ba2ec15337652c9962b25081ff03e1d7
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-08-18 19:35:59 +08:00
Xiang Xiao e91c95b197 mtd: Implement BIOC_PARTINFO for all drivers 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-16 22:07:02 +08:00
Xiang Xiao 93b478a71f arch/arm: Add NVIC_FPCCR_XXX macro to avoid the hard code value 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-15 10:18:19 -07:00
Xiang Xiao 642443b8b3 arch/arm: Add NVIC_CPACR_CP_XXX(n) macro to avoid the hard code value 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-15 10:18:06 -07:00
Xiang Xiao 8c38d134f8 arch/arm: Add NVIC_AIRCR_VECTKEY macro to avoid the hard code value 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-15 10:17:54 -07:00
zhuyanlin 9d92277bb8 arch:xtensa: replace include file from src/chip_xxx to chip.h 
Use chip.h as a standard include file, replace chip_xxx in src dir
 2021-08-13 13:56:39 +08:00
zhuyanlin 7b1d3d5c75 arch:esp: create chip.h header for chip src code. 
Create chip.h header for esp src code.
 2021-08-13 13:56:35 +08:00
zhuyanlin 43b72c180a arch:xtensa: add __ASSEMBLY__ for espxxx_soc.h 
Those header contain syntax not be recognize by gnu assembler.
 2021-08-13 13:56:31 +08:00
Xiang Xiao 4bee1e5690 mtd: Replace MTDIOC_XIPBASE with BIOC_XIPBASE 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-12 20:29:18 +08:00
Xiang Xiao 9b58b77b88 mtd: Remove the empty MTDIOC_XIPBASE implmentation 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-11 23:39:24 +08:00