Bug description:
CONFIG_SMP=y
Suppose we have 2 cores in SMP, here is the ps return:
PID GROUP CPU PRI POLICY TYPE NPX STATE STACK USED FILLED COMMAND
0 0 0 0 FIFO Kthread N-- Assigned 004076 000748 18.3% CPU0 IDLE
1 0 1 0 FIFO Kthread N-- Running 004096 000540 13.1% CPU1 IDLE
nsh> kill -4 0
or:
nsh> kill -4 1
system blocked.
Reason:
In func xx_sigdeliver() restore stage, when saved_irqcount == 0, that means
rtcb NOT in critical_section before switch to xx_sigdeliver(), then we need
reset the critical_section state before swith back.
Fix:
Add condition to cover saved_irqcount == 0.
Change-Id: I4af7f95e47f6d78a4094c3757d39b01ac9d533b3
Signed-off-by: ligd <liguiding1@xiaomi.com>
It is unnecessary to protect pollnotify since the wakeup
source comes from idle thread
Change-Id: I99c06508029dc18aa8ded1cb672b14f77e9509a0
Signed-off-by: chao.an <anchao@xiaomi.com>
Reuse the reserved fields of hci buffer to avoid redundant packet type splitting
Change-Id: I79d70ae939111bb909a6e0981c50e401734590f2
Signed-off-by: chao.an <anchao@xiaomi.com>
N/A
nuttx.rel: In function `rpmsg_serialinit':
nuttx/arch/sim/src/sim/up_rptun.c:257: undefined reference to `uart_rpmsg_init'
collect2: error: ld returned 1 exit status
Makefile:310: recipe for target 'nuttx' failed
Change-Id: I93a20941bc07f749165dc8f012da46ddb7b02b00
Signed-off-by: dongjiuzhu <dongjiuzhu1@xiaomi.com>
In the current implementation, the first transmission of the new
connection handshake is depends entirely by tcp_timer(), which will
caused 0.5s - 1s delay each time in connect().
This patch is mainly to improve the performance of TCP handshake and wavehand.
Change-Id: Ic965a9fa26895f0d8e70368558f5bfbafdea7f58
Signed-off-by: chao.an <anchao@xiaomi.com>
arch/arm/src/stm32/stm32_oneshot.c:
arch/arm/src/stm32/stm32_oneshot.h:
arch/arm/src/stm32/stm32_oneshot_lowerhalf.c:
arch/arm/src/stm32/stm32_dbgmcu.h:
* Fix nxstyle errors.
arch/arm/src/stm32/stm32_lsi.c:
* Fix nxstyle errors.
* Also a minor grammar fix in a comment: add "in" to "setting the
LSION bit in the RCC CSR register."
stm32f7, stm32h7, stm32l4 and stm32f0l0g0 do it this way and there is no
reason for classic stm32 to differ. Also manipulation of priv->ie was not
atomic with respect to interrupts.
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
ligd
chao.an
Jiuzhu Dong
Xiang Xiao
Brennan Ashton
danguanghua
Nathan Hartman
Masayuki Ishikawa
Juha Niskanen
YAMAMOTO Takashi