diff --git a/arch/arm/src/sama5/Make.defs b/arch/arm/src/sama5/Make.defs index 22161b22d80..0d35b2e69ec 100644 --- a/arch/arm/src/sama5/Make.defs +++ b/arch/arm/src/sama5/Make.defs @@ -94,8 +94,8 @@ CHIP_ASRCS = # SAMA5-specific C source files CHIP_CSRCS = sam_allocateheap.c sam_boot.c sam_clockconfig.c sam_irq.c -CHIP_CSRCS += sam_lowputc.c sam_memories.c sam_pck.c sam_pio.c sam_serial.c -CHIP_CSRCS += sam_timerisr.c +CHIP_CSRCS += sam_lowputc.c sam_memories.c sam_pck.c sam_pio.c sam_pmc.c +CHIP_CSRCS += sam_serial.c sam_timerisr.c # Configuration dependent C and assembly language files diff --git a/arch/arm/src/sama5/sam_can.c b/arch/arm/src/sama5/sam_can.c index 24e1b9ddcf3..a79c5a62955 100644 --- a/arch/arm/src/sama5/sam_can.c +++ b/arch/arm/src/sama5/sam_can.c @@ -1,4 +1,4 @@ -/************************************************************************************ +/**************************************************************************** * arch/arm/src/sama5/sam_can.c * * Copyright (C) 2011 Gregory Nutt. All rights reserved. @@ -41,7 +41,7 @@ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * - ************************************************************************************/ + ****************************************************************************/ /**************************************************************************** * Included Files diff --git a/arch/arm/src/sama5/sam_pmc.c b/arch/arm/src/sama5/sam_pmc.c new file mode 100755 index 00000000000..a887126bd43 --- /dev/null +++ b/arch/arm/src/sama5/sam_pmc.c @@ -0,0 +1,238 @@ +/**************************************************************************** + * arch/arm/src/sama5/sam_pmc.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * References: + * + * SAMA5D3 Series Data Sheet + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may + * be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include "up_arch.h" + +#include "chip.h" +#include "chip/sam_pmc.h" +#include "sam_pmc.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_pllack_frequency + * + * Description: + * Given the Main Clock frequency that provides the input to PLLA, return + * the frequency of the PPA output clock, PLLACK + * + * Assumptions: + * PLLA is enabled. If the PLL is is disabled, either at the input divider + * or the output multiplier, the value zero is returned. + * + ****************************************************************************/ + +uint32_t sam_pllack_frequency(uint32_t mainclk) +{ + uint32_t regval; + uint32_t diva; + uint32_t mula; + uint32_t pllack; + + /* Get the PLLA divider (DIVA) and multiplier (MULA) */ + + regval = getreg32(SAM_PMC_CKGR_PLLAR); + + /* DIVA = 0: Divider output is 0 + * DIVA = 1: Divider is bypassed + * DIVA = 2-255: Divider output is the selected clock divided by DIVA + */ + + diva = (regval & PMC_CKGR_PLLAR_DIV_MASK) >> PMC_CKGR_PLLAR_DIV_SHIFT; + + pllack = mainclk; + if (diva > 1) + { + pllack /= diva; + } + else if (diva < 1) + { + return 0; + } + + /* MULA = 0: PLLA is deactivated + * MULA > 0: The PLLA Clock frequency is the PLLA input frequency + * multiplied by MULA + 1. + */ + + mula = (regval & PMC_CKGR_PLLAR_MUL_MASK) >> PMC_CKGR_PLLAR_MUL_SHIFT; + if (mula > 1) + { + pllack *= (mula + 1); + } + else if (diva < 1) + { + return 0; + } + + return pllack; +} + +/**************************************************************************** + * Name: sam_pck_frequency + * + * Description: + * Given the Main Clock frequency that provides the input to PLLA, return + * the frequency of the processor clock (PCK). + * + * Assumptions: + * PLLA is enabled and the either the main clock or the PLLA output clock + * (PLLACK) provides the input to the MCK prescaler. + * + ****************************************************************************/ + +uint32_t sam_pck_frequency(uint32_t mainclk) +{ + uint32_t regval; + uint32_t pres; + uint32_t pck; + + /* Get the input source selection to the master/processor clock divider */ + + regval = getreg32(SAM_PMC_MCKR); + switch (regval & PMC_MCKR_CSS_MASK) + { + case PMC_MCKR_CSS_MAIN: /* Main Clock */ + /* Use the Main Clock frequency */ + + pck = mainclk; + break; + + case PMC_MCKR_CSS_PLLA: /* PLLA Clock */ + /* Use the PLLA output clock */ + + pck = sam_pllack_frequency(mainclk); + if (pck == 0) + { + return 0; + } + + /* Check if the PLLACK output is divided by 2 */ + + if ((regval & PMC_MCKR_PLLADIV2) != 0) + { + pck >>= 1; + } + break; + + case PMC_MCKR_CSS_SLOW: /* Slow Clock */ + case PMC_MCKR_CSS_UPLL: /* UPLL Clock */ + default: + return 0; + } + + /* Get the PCK frequency which is given by the selected input clock + * divided by a power-of-two prescaler. + * + * PRES = 0: Selected clock + * PRES = n > 0: Selected clock divided by 2**n + */ + + pres = (regval & PMC_MCKR_PRES_MASK) >> PMC_MCKR_PRES_SHIFT; + return pck >> pres; +} + +/**************************************************************************** + * Name: sam_mck_frequency + * + * Description: + * Given the Main Clock frequency that provides the input to PLLA, return + * the frequency of the PPA output clock, PLLACK + * + * Assumptions: + * PLLA is enabled and the either the main clock or the PLLA output clock + * (PLLACK) provides the input to the MCK prescaler. + * + ****************************************************************************/ + +uint32_t sam_mck_frequency(uint32_t mainclk) +{ + uint32_t regval; + uint32_t mdiv; + uint32_t mck; + + /* The MCK frequency is equivalent to the PCK clock frequency with an + * additional divider. + */ + + mck = sam_pck_frequency(mainclk); + if (mck == 0) + { + return 0; + } + + /* MDIV = n: Master Clock is Prescaler Output Clock divided by (n + 1) */ + + regval = getreg32(SAM_PMC_MCKR); + mdiv = (regval & PMC_MCKR_MDIV_MASK) >> PMC_MCKR_MDIV_SHIFT; + if (mdiv > 0) + { + mck /= (mdiv + 1); + } + + return mck; +} diff --git a/arch/arm/src/sama5/sam_pmc.h b/arch/arm/src/sama5/sam_pmc.h new file mode 100644 index 00000000000..904f70fb146 --- /dev/null +++ b/arch/arm/src/sama5/sam_pmc.h @@ -0,0 +1,115 @@ +/**************************************************************************** + * arch/arm/src/sama5/sam_pmc.h + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_SAMA5_SAM_PMC_H +#define __ARCH_ARM_SRC_SAMA5_SAM_PMC_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_pllack_frequency + * + * Description: + * Given the Main Clock frequency that provides the input to PLLA, return + * the frequency of the PPA output clock, PLLACK + * + * Assumptions: + * PLLA is enabled. If the PLL is is disabled, either at the input divider + * or the output multiplier, the value zero is returned. + * + ****************************************************************************/ + +uint32_t sam_pllack_frequency(uint32_t mainclk); + +/**************************************************************************** + * Name: sam_pck_frequency + * + * Description: + * Given the Main Clock frequency that provides the input to PLLA, return + * the frequency of the processor clock (PCK). + * + * Assumptions: + * PLLA is enabled and the either the main clock or the PLLA output clock + * (PLLACK) provides the input to the MCK prescaler. + * + ****************************************************************************/ + +uint32_t sam_pck_frequency(uint32_t mainclk); + +/**************************************************************************** + * Name: sam_mck_frequency + * + * Description: + * Given the Main Clock frequency that provides the input to PLLA, return + * the frequency of the PPA output clock, PLLACK + * + * Assumptions: + * PLLA is enabled and the either the main clock or the PLLA output clock + * (PLLACK) provides the input to the MCK prescaler. + * + ****************************************************************************/ + +uint32_t sam_mck_frequency(uint32_t mainclk); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_ARM_SRC_SAMA5_SAM_PMC_H */