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xtensa: Fix allocation of FPU registers in exception context

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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
This commit is contained in:
Gustavo Henrique Nihei
2022-08-25 15:36:53 -03:00
committed by Xiang Xiao
parent 5ed2ee85c9
commit fe2d37aa33
4 changed files with 12 additions and 8 deletions
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arch/xtensa/include/irq.h
+8 -4
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@@ -144,13 +144,17 @@
#if XCHAL_CP_NUM > 0 #if XCHAL_CP_NUM > 0
/* FPU first address must align to CP align size. */ /* FPU first address must align to CP align size. */
# define XCPTCONTEXT_REGS ALIGN_UP(_REG_CP_START, XCHAL_TOTAL_SA_ALIGN / 4) # define COMMON_CTX_REGS ALIGN_UP(_REG_CP_START, XCHAL_TOTAL_SA_ALIGN / 4)
# define XCPTCONTEXT_SIZE ((4 * XCPTCONTEXT_REGS) + XTENSA_CP_SA_SIZE + 0x20) # define COPROC_CTX_REGS (XTENSA_CP_SA_SIZE / 4)
# define RESERVE_REGS 8
# define XCPTCONTEXT_REGS (COMMON_CTX_REGS + COPROC_CTX_REGS + RESERVE_REGS)
#else #else
# define XCPTCONTEXT_REGS _REG_CP_START # define RESERVE_REGS 8
# define XCPTCONTEXT_SIZE ((4 * XCPTCONTEXT_REGS) + 0x20) # define XCPTCONTEXT_REGS (_REG_CP_START + RESERVE_REGS)
#endif #endif
#define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS)
/**************************************************************************** /****************************************************************************
* Public Types * Public Types
****************************************************************************/ ****************************************************************************/
arch/xtensa/src/common/xtensa_coproc.S
+2 -2
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@@ -105,7 +105,7 @@ _xtensa_coproc_saoffsets:
* ---------------------------------------------------| <- SP * ---------------------------------------------------| <- SP
*/ */
addi a3, sp, (4 * XCPTCONTEXT_REGS) addi a3, sp, (4 * COMMON_CTX_REGS)
/* CPENABLE should show which CPs are enabled. */ /* CPENABLE should show which CPs are enabled. */
@@ -216,7 +216,7 @@ Ldone1:
* ---------------------------------------------------| <- SP * ---------------------------------------------------| <- SP
*/ */
addi a3, a2, (4 * XCPTCONTEXT_REGS) addi a3, a2, (4 * COMMON_CTX_REGS)
rsr a8, CPENABLE /* a8 = which CPs are enabled */ rsr a8, CPENABLE /* a8 = which CPs are enabled */
beqz a8, Ldone2 /* Quick exit if none */ beqz a8, Ldone2 /* Quick exit if none */
arch/xtensa/src/common/xtensa_fpucmp.c
+1 -1
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@@ -60,7 +60,7 @@ bool up_fpucmp(const void *saveregs1, const void *saveregs2)
const uint32_t *regs1 = saveregs1; const uint32_t *regs1 = saveregs1;
const uint32_t *regs2 = saveregs2; const uint32_t *regs2 = saveregs2;
return memcmp(&regs1[XCPTCONTEXT_REGS], &regs2[XCPTCONTEXT_REGS], return memcmp(&regs1[COMMON_CTX_REGS], &regs2[COMMON_CTX_REGS],
XTENSA_CP_SA_SIZE) == 0; XTENSA_CP_SA_SIZE) == 0;
} }
#endif /* CONFIG_ARCH_FPU */ #endif /* CONFIG_ARCH_FPU */
arch/xtensa/src/common/xtensa_tcbinfo.c
+1 -1
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@@ -64,7 +64,7 @@ const struct tcbinfo_s g_tcbinfo =
.pri_off = TCB_PRI_OFF, .pri_off = TCB_PRI_OFF,
.name_off = TCB_NAME_OFF, .name_off = TCB_NAME_OFF,
.regs_off = TCB_REGS_OFF, .regs_off = TCB_REGS_OFF,
.basic_num = XCPTCONTEXT_REGS, .basic_num = COMMON_CTX_REGS,
.total_num = XCPTCONTEXT_REGS, .total_num = XCPTCONTEXT_REGS,
{ {
.p = g_reg_offs, .p = g_reg_offs,