Leverage some bit timing logic from LPC17xx to the STM32 CAN driver

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4317 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2012-01-20 03:37:29 +00:00
parent c62e27d17b
commit fe2501d654
8 changed files with 58 additions and 2 deletions
+4
View File
@@ -282,6 +282,8 @@ Configuration Options:
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined.
CONFIG_STM32_CAN2 - Enable support for CAN2
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined.
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
dump of all CAN registers.
@@ -535,6 +537,8 @@ STM3240G-EVAL-specific Configuration Options
mode for testing. The STM32 CAN driver does support loopback mode.
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1 is defined.
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2 is defined.
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7
CONFIG_CAN_REGDEBUG - If CONFIG_DEBUG is set, this will generate an
dump of all CAN registers.