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Update comments and README

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This commit is contained in:
Gregory Nutt
2015-04-05 07:22:46 -06:00
parent cf4bbae526
commit fca4c51420
5 changed files with 58 additions and 27 deletions
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arch/arm/src/samv7/sam_start.h
+3 -2
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@@ -109,8 +109,9 @@ void sam_lowsetup(void);
* *
* Description: * Description:
* All SAMV7 architectures must provide the following entry point. This entry * All SAMV7 architectures must provide the following entry point. This entry
* point is called early in the initialization -- after all memory has been * point is called early in the initialization -- after clocking and memory have
* configured and mapped but before any devices have been initialized. * been configured but before caches have been enabled and before any devices have
* been initialized.
* *
************************************************************************************/ ************************************************************************************/
arch/arm/src/samv7/samv71_periphclks.h
+2 -2
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@@ -118,7 +118,7 @@
#define sam_isi_enableclk() sam_enableperiph1(SAM_PID_ISI) #define sam_isi_enableclk() sam_enableperiph1(SAM_PID_ISI)
#define sam_pwm1_enableclk() sam_enableperiph1(SAM_PID_PWM1) #define sam_pwm1_enableclk() sam_enableperiph1(SAM_PID_PWM1)
#define sam_fpu_enableclk() #define sam_fpu_enableclk()
#define sam_sdramc_enableclk() sam_enableperiph1(SAM_PID_SDRAMC) #define sam_sdramc_enableclk() sam_enableperiph1(SAM_PID_SDRAMC) /* REVISIT: Does this exist? */
#define sam_wdt1_enableclk() #define sam_wdt1_enableclk()
#define sam_ccw_enableclk() #define sam_ccw_enableclk()
@@ -186,7 +186,7 @@
#define sam_isi_disableclk() sam_disableperiph1(SAM_PID_ISI) #define sam_isi_disableclk() sam_disableperiph1(SAM_PID_ISI)
#define sam_pwm1_disableclk() sam_disableperiph1(SAM_PID_PWM1) #define sam_pwm1_disableclk() sam_disableperiph1(SAM_PID_PWM1)
#define sam_fpu_disableclk() #define sam_fpu_disableclk()
#define sam_sdramc_disableclk() sam_disableperiph1(SAM_PID_SDRAMC) #define sam_sdramc_disableclk() sam_disableperiph1(SAM_PID_SDRAMC) /* REVISIT: Does this exist? */
#define sam_wdt1_disableclk() #define sam_wdt1_disableclk()
#define sam_ccw_disableclk() #define sam_ccw_disableclk()
configs/samv71-xult/README.txt
+28 -2
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@@ -111,6 +111,18 @@ The BASIC nsh configuration is fully function (as desribed below under
sample code and study of the data sheet, but I have not found the key to sample code and study of the data sheet, but I have not found the key to
solving this. solving this.
6. Partial support for the maXTouch Xplained Pro LCD is in place. The
ILI9488-based LCD is working well with a SMC DMA-based interface. Very
nice performance.
However, the maXTouch touchscreen driver is not working. I tried re-
using the maXTouch driver that was used with the SAMA5D4-EK TM7000
LCD, but the maXTouch Xplained Pro has a different maXTouch part.
The driver claims that all operations are success, but there are no
interrupts signalling touch event. I assume that the different
maXTouch part is not being configured correctly but there is no
avaiable technical documentation or sample code to debug with.
Serial Console Serial Console
============== ==============
@@ -1134,9 +1146,23 @@ Configuration sub-directories
CP2100CP programmable PLL, and 0x57 and 0x5f are the addresses of CP2100CP programmable PLL, and 0x57 and 0x5f are the addresses of
the AT2 EEPROM. I am not sure what the other address, 0x37, is). the AT2 EEPROM. I am not sure what the other address, 0x37, is).
8. Support for the touchscreen test is enabled (see apps/examples/touchscreen),
however, the maXTouch is not yet working (see STATUS below).
STATUS: STATUS:
2015-03-30: Currently contains on a touchscreen test. The touchscreen 2015-04-05: Partial support for the maXTouch Xplained Pro LCD is in
does not yet work. place. The ILI9488-based LCD is working well with a SMC DMA-based
interface. Very nice performance.
However, the maXTouch touchscreen driver is not working. I tried
re-using the maXTouch driver that was used with the SAMA5D4-EK
TM7000 LCD, but the maXTouch Xplained Pro has a different maXTouch
part. The driver claims that all operations are success, but
there are no interrupts signalling touch event. I assume that the
different maXTouch part is not being configured correctly but there
is no available technical documentation or sample code to debug
with.
netnsh: netnsh:
configs/samv71-xult/src/sam_boot.c
+20 -18
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@@ -1,4 +1,4 @@
/************************************************************************************ /****************************************************************************
* configs/samv71-xult/src/sam_boot.c * configs/samv71-xult/src/sam_boot.c
* *
* Copyright (C) 2015 Gregory Nutt. All rights reserved. * Copyright (C) 2015 Gregory Nutt. All rights reserved.
@@ -31,11 +31,11 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE. * POSSIBILITY OF SUCH DAMAGE.
* *
************************************************************************************/ ****************************************************************************/
/************************************************************************************ /****************************************************************************
* Included Files * Included Files
************************************************************************************/ ****************************************************************************/
#include <nuttx/config.h> #include <nuttx/config.h>
@@ -45,35 +45,37 @@
#include <arch/board/board.h> #include <arch/board/board.h>
#include "up_arch.h" #include "up_arch.h"
#include "sam_start.h"
#include "samv71-xult.h" #include "samv71-xult.h"
/************************************************************************************ /****************************************************************************
* Pre-processor Definitions * Pre-processor Definitions
************************************************************************************/ ****************************************************************************/
/************************************************************************************ /****************************************************************************
* Private Functions * Private Functions
************************************************************************************/ ****************************************************************************/
/************************************************************************************ /****************************************************************************
* Public Functions * Public Functions
************************************************************************************/ ****************************************************************************/
/************************************************************************************ /****************************************************************************
* Name: sam_boardinitialize * Name: sam_boardinitialize
* *
* Description: * Description:
* All SAM3U architectures must provide the following entry point. This entry point * All SAMV7 architectures must provide the following entry point. This
* is called early in the initialization -- after all memory has been configured * entry point is called early in the initialization -- after clocking and
* and mapped but before any devices have been initialized. * memory have been configured but before caches have been enabled and
* before any devices have been initialized.
* *
************************************************************************************/ ****************************************************************************/
void sam_boardinitialize(void) void sam_boardinitialize(void)
{ {
#ifdef CONFIG_SAMV7_SDRAMC #ifdef CONFIG_SAMV7_SDRAMC
/* Configure SDRAM if it has been enabled in the NuttX configuration. Here we /* Configure SDRAM if it has been enabled in the NuttX configuration.
* assume, of course, that we are not running out SDRAM. * Here we assume, of course, that we are not running out SDRAM.
*/ */
sam_sdram_config(); sam_sdram_config();
@@ -113,7 +115,7 @@ void sam_boardinitialize(void)
* If CONFIG_BOARD_INITIALIZE is selected, then an additional * If CONFIG_BOARD_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a * initialization call will be performed in the boot-up sequence to a
* function called board_initialize(). board_initialize() will be * function called board_initialize(). board_initialize() will be
* called immediately after up_intiialize() is called and just before the * called immediately after up_intitialize() is called and just before the
* initial application is started. This additional initialization phase * initial application is started. This additional initialization phase
* may be used, for example, to initialize board-specific device drivers. * may be used, for example, to initialize board-specific device drivers.
* *
configs/samv71-xult/src/sam_sdram.c
+5 -3
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@@ -90,9 +90,11 @@
* None * None
* *
* Assumptions: * Assumptions:
* The DDR memory regions is configured as strongly ordered memory. When * This test runs early in initialization before I- and D-caches are
* we complete initialization of SDRAM and it is ready for use, we will * enabled.
* make DRAM into normal, cached memory. *
* NOTE: Since the delay loop is calibrate with caches in enabled, the
* calls to up_udelay() are wrong ty orders of magnitude.
* *
****************************************************************************/ ****************************************************************************/