mirror of
https://github.com/apache/nuttx.git
synced 2026-05-31 14:27:37 +08:00
Add PIC32 exception handlers
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3630 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
@@ -160,7 +160,6 @@ extern uint32_t _bmxdupba_address; /* BMX register setting */
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extern void up_boot(void);
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extern void up_boot(void);
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extern void up_copystate(uint32_t *dest, uint32_t *src);
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extern void up_copystate(uint32_t *dest, uint32_t *src);
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extern void up_decodeirq(uint32_t *regs);
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extern void up_irqinitialize(void);
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extern void up_irqinitialize(void);
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#ifdef CONFIG_ARCH_DMA
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#ifdef CONFIG_ARCH_DMA
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extern void weak_function up_dmainitialize(void);
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extern void weak_function up_dmainitialize(void);
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@@ -171,6 +170,9 @@ extern void up_lowputc(char ch);
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extern void up_puts(const char *str);
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extern void up_puts(const char *str);
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extern void up_lowputs(const char *str);
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extern void up_lowputs(const char *str);
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/* Two alternative interrupt handling functions */
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extern uint32_t *up_decodeirq(uint32_t *regs);
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extern uint32_t *up_doirq(int irq, uint32_t *regs);
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extern uint32_t *up_doirq(int irq, uint32_t *regs);
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/* Defined in up_dumpstate.c */
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/* Defined in up_dumpstate.c */
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Executable
+103
@@ -0,0 +1,103 @@
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/****************************************************************************
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* arch/mips/src/mips32/up_bevexcptn.S
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <arch/mips32/registers.h>
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#include "chip/excptmacros.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Global Symbols
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****************************************************************************/
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.file "up_bevexcptn.S"
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.global up_dobev
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: _bev_exception
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*
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* Description:
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* Boot Exception Vector Handler. Jumps to bev_handler
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* Does not return
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*
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****************************************************************************/
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.section .bev_excpt,"ax",@progbits
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.set noreorder
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.ent _bev_exception
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_bev_exception:
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la k0, _bev_handler
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jr k0
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nop
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.end _bev_exception
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/****************************************************************************
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* Name: _bev_handler
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*
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* Description:
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* BEV exception handler
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*
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****************************************************************************/
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.section .bev_handler, "ax", @progbits
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.set noreorder
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.ent _bev_handler
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_bev_handler:
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EXCPT_PROLOGUE t0 /* Save registers on stack, enable nested interrupts */
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move a0, sp /* Pass register save structure as the parameter 1 */
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USE_INTSTACK t0, t1, t2 /* Switch to the interrupt stack */
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la t0, up_dobev /* Call up_dobev(regs) */
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jalr t0, ra
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di /* Disable interrupts */
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RESTORE_STACK t0, t1 /* Undo the operations of USE_STACK */
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EXCPT_EPILOGUE v0 /* Return to the context returned by up_dobev() */
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.end _bev_handler
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Executable
+104
@@ -0,0 +1,104 @@
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/****************************************************************************
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* arch/mips/src/mips32/up_genexcptn.S
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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||||||
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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||||||
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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||||||
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <arch/mips32/registers.h>
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#include "chip/excptmacros.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Global Symbols
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****************************************************************************/
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.file "up_genexcptn.S"
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.global _int_handler
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.global up_decodeirq
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: _int_exception
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*
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* Description:
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* Interrupt Exception Vector Handler. Jumps to _int_handler
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* Does not return
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*
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****************************************************************************/
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.section .int_excpt,"ax",@progbits
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.set noreorder
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.ent _int_exception
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_int_exception:
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la k0, _int_handler
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jr k0
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nop
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.end _int_exception
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/****************************************************************************
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* Name: _int_handler
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*
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* Description:
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* Interrupt exception handler
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*
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****************************************************************************/
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.section .int_handler, "ax", @progbits
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.set noreorder
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.ent _int_handler
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_int_handler:
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EXCPT_PROLOGUE t0 /* Save registers on stack, enable nested interrupts */
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move a0, sp /* Pass register save structure as the parameter 1 */
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USE_INTSTACK t0, t1, t2 /* Switch to the interrupt stack */
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la t0, up_decodeirq /* Call up_decodeirq(regs) */
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jalr t0, ra
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di /* Disable interrupts */
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RESTORE_STACK t0, t1 /* Undo the operations of USE_STACK */
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EXCPT_EPILOGUE v0 /* Return to the context returned by up_decodeirq() */
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.end _int_handler
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@@ -39,7 +39,7 @@ HEAD_ASRC = pic32mx-head.S
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# Common MIPS files
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# Common MIPS files
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CMN_ASRCS = up_syscall0.S
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CMN_ASRCS = up_syscall0.S up_inthandler.S up_bevhandler.S
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CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \
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CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \
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up_createstack.c up_doirq.c up_exit.c up_idle.c up_initialize.c \
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up_createstack.c up_doirq.c up_exit.c up_idle.c up_initialize.c \
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up_initialstate.c up_interruptcontext.c up_irq.c up_lowputs.c \
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up_initialstate.c up_interruptcontext.c up_irq.c up_lowputs.c \
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@@ -1,5 +1,5 @@
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/********************************************************************************************
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/********************************************************************************************
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* arch/mips/src/mips32/mips32-excptmacros.h
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* arch/mips/src/pic32mx/excptmacros.h
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*
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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@@ -33,8 +33,8 @@
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*
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*
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********************************************************************************************/
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********************************************************************************************/
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#ifndef __ARCH_MIPS_SRC_MIPS32_MIPS32_EXCPTMACROS_H
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#ifndef __ARCH_MIPS_SRC_PIC32MX_EXCPTMACROS_H
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#define __ARCH_MIPS_SRC_MIPS32_MIPS32_EXCPTMACROS_H
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#define __ARCH_MIPS_SRC_PIC32MX_EXCPTMACROS_H
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/********************************************************************************************
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/********************************************************************************************
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* Included Files
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* Included Files
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@@ -43,7 +43,7 @@
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#include <nuttx/config.h>
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#include <nuttx/config.h>
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#include <arch/irq.h>
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#include <arch/irq.h>
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#include <arch/mips32/cp0.h>
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#include <arch/pic32mx/cp0.h>
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#ifdef __ASSEMBLY__
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#ifdef __ASSEMBLY__
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@@ -70,7 +70,7 @@
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* my_exception:
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* my_exception:
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* EXCPT_PROLOGUE t0 - Save registers on stack, enable nested interrupts
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* EXCPT_PROLOGUE t0 - Save registers on stack, enable nested interrupts
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* move a0, sp - Pass register save structure as the parameter 1
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* move a0, sp - Pass register save structure as the parameter 1
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* USE_INTSTACK, t0, t1, t2 - Switch to the interrupt stack
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* USE_INTSTACK t0, t1, t2 - Switch to the interrupt stack
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* jal handler - Handle the exception IN=old regs OUT=new regs
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* jal handler - Handle the exception IN=old regs OUT=new regs
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* di - Disable interrupts
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* di - Disable interrupts
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* RESTORE_STACK t0, t1 - Undo the operations of USE_STACK
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* RESTORE_STACK t0, t1 - Undo the operations of USE_STACK
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@@ -100,7 +100,8 @@
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*
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*
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********************************************************************************************/
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********************************************************************************************/
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.macro EXCPT_PROLOGUE, tmp
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.macro EXCPT_PROLOGUE, tmp
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.set noat
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/* Get the SP from the previous shadow set */
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/* Get the SP from the previous shadow set */
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@@ -243,7 +244,8 @@
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*
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*
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********************************************************************************************/
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********************************************************************************************/
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.macro EXCPT_EXIT, regs
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.macro EXCPT_EPILOGUE, regs
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.set noat
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/* Since interrupts are disabled via di can now use k0 and k1 again. Use k1 as the
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/* Since interrupts are disabled via di can now use k0 and k1 again. Use k1 as the
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* pointer to the register save array.
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* pointer to the register save array.
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@@ -407,4 +409,4 @@
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.endm
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.endm
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#endif /* __ASSEMBLY__ */
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_MIPS_SRC_MIPS32_MIPS32_EXCPTMACROS_H */
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#endif /* __ARCH_MIPS_SRC_PIC32MX_EXCPTMACROS_H */
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@@ -78,7 +78,9 @@
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.global __start
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.global __start
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.global halt
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.global halt
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.global __nmi_handler
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.global nmi_handler
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.global bev_handler
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.global int_handler
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.global os_start
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.global os_start
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/****************************************************************************
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/****************************************************************************
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@@ -321,52 +323,6 @@ __start:
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nop
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nop
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.end __start
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.end __start
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/****************************************************************************
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* Name: _bev_exception
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*
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* Description:
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* Boot Exception Vector Handler. Jumps to _bootstrap_exception_handler
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* Does not return
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*
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****************************************************************************/
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.section .bev_handler,"ax",@progbits
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.set noreorder
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.ent _bev_exception
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_bev_exception:
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la k0, _bootstrap_exception_handler
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jr k0
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nop
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.end _bev_exception
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/****************************************************************************
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* Name: _bev_exception
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*
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* Description:
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* General Exception Vector Handler. Jumps to _general_exception_handler
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*
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* Input Parameters:
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* None
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*
|
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* Returned Value:
|
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* Does not return
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*
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****************************************************************************/
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.section .gen_handler,"ax",@progbits
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.set noreorder
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.ent _gen_exception
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_gen_exception:
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la k0, _general_exception_context
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jr k0
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nop
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.end _gen_exception
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/****************************************************************************
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/****************************************************************************
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* Name: __start_nuttx
|
* Name: __start_nuttx
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*
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*
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@@ -49,20 +49,32 @@ MEMORY
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* REGION PHYSICAL KSEG SIZE
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* REGION PHYSICAL KSEG SIZE
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* DESCRIPTION START ADDR (BYTES)
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* DESCRIPTION START ADDR (BYTES)
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* ------------- ---------- ------ ---------------
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* ------------- ---------- ------ ---------------
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* Reset 0x1fc00000 KSEG1 896
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* Exceptions:*
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* BEV exception 0x1fc00380 KSEG1 256
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* Reset 0x1fc00000 KSEG1 512
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* DBG exception 0x1fc00480 KSEG1 16
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* TLB Refill 0x1fc00200 KSEG1 256
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* Cache Error 0x1fc00300 KSEG1 256
|
||||||
|
* Others 0x1fc00380 KSEG1 256
|
||||||
|
* Interrupt 0x1fc00400 KSEG1 128
|
||||||
|
* JTAG 0x1fc00480 KSEG1 16
|
||||||
* Startup logic 0x1fc00490 KSEG0 4096-896-256-16
|
* Startup logic 0x1fc00490 KSEG0 4096-896-256-16
|
||||||
* Exceptions 0x1fc01000 KSEG0 4096
|
* Exceptions 0x1fc01000 KSEG0 4096
|
||||||
* Debug code 0x1fc02000 KSEG1 4096-16
|
* Debug code 0x1fc02000 KSEG1 4096-16
|
||||||
* DEVCFG3-0 0x1fc02ff0 KSEG1 16
|
* DEVCFG3-0 0x1fc02ff0 KSEG1 16
|
||||||
|
*
|
||||||
|
* Exceptions assme:
|
||||||
|
*
|
||||||
|
* STATUS: BEV=1 and EXL=0
|
||||||
|
* CAUSE: IV=1
|
||||||
|
* JTAG: ProbEn=0
|
||||||
|
* And multi-vector support disabled
|
||||||
*/
|
*/
|
||||||
|
|
||||||
kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 896
|
kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 896
|
||||||
kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 256
|
kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 256
|
||||||
kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16
|
kseg1_intexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128
|
||||||
|
kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128
|
||||||
kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 4096-1168
|
kseg0_bootmem (rx) : ORIGIN = 0x9fc00490, LENGTH = 4096-1168
|
||||||
kseg0_exptmem (rx) : ORIGIN = 0x9fc01000, LENGTH = 4096
|
kseg0_excptmem (rx) : ORIGIN = 0x9fc01000, LENGTH = 4096
|
||||||
kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16
|
kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16
|
||||||
kseg1_devcfg (r) : ORIGIN = 0xbfc02ff0, LENGTH = 16
|
kseg1_devcfg (r) : ORIGIN = 0xbfc02ff0, LENGTH = 16
|
||||||
|
|
||||||
@@ -78,6 +90,9 @@ OUTPUT_FORMAT("elf32-tradlittlemips")
|
|||||||
OUTPUT_ARCH(pic32mx)
|
OUTPUT_ARCH(pic32mx)
|
||||||
ENTRY(__start)
|
ENTRY(__start)
|
||||||
|
|
||||||
|
INPUT(up_inthandler.o);
|
||||||
|
INPUT(up_bevhandler.o);
|
||||||
|
|
||||||
SECTIONS
|
SECTIONS
|
||||||
{
|
{
|
||||||
/* Boot FLASH sections */
|
/* Boot FLASH sections */
|
||||||
@@ -87,11 +102,35 @@ SECTIONS
|
|||||||
*(.reset)
|
*(.reset)
|
||||||
} > kseg1_reset
|
} > kseg1_reset
|
||||||
|
|
||||||
.bev_excp :
|
/* Exception handlers. The following is assumed:
|
||||||
|
*
|
||||||
|
* STATUS: BEV=1 and EXL=0
|
||||||
|
* CAUSE: IV=1
|
||||||
|
* JTAG: ProbEn=0
|
||||||
|
* And multi-vector support disabled
|
||||||
|
*
|
||||||
|
* In that configuration, the vector locations become:
|
||||||
|
*
|
||||||
|
* Reset, Soft Reset bfc0:0000
|
||||||
|
* TLB Refill bfc0:0200
|
||||||
|
* Cache Error bfc0:0300
|
||||||
|
* All others bfc0:0380
|
||||||
|
* Interrupt bfc0:0400
|
||||||
|
* EJTAG Debug bfc0:0480
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* KSEG1 exception handler "trampolines" */
|
||||||
|
|
||||||
|
.bev_excpt :
|
||||||
{
|
{
|
||||||
*(.bev_excp)
|
*(.bev_excpt)
|
||||||
} > kseg1_bevexcpt
|
} > kseg1_bevexcpt
|
||||||
|
|
||||||
|
.int_excpt :
|
||||||
|
{
|
||||||
|
*(.int_excpt)
|
||||||
|
} > kseg1_intexcpt
|
||||||
|
|
||||||
.dbg_excpt = ORIGIN(kseg1_dbgexcpt);
|
.dbg_excpt = ORIGIN(kseg1_dbgexcpt);
|
||||||
|
|
||||||
.start :
|
.start :
|
||||||
@@ -99,10 +138,13 @@ SECTIONS
|
|||||||
*(.start)
|
*(.start)
|
||||||
} > kseg0_bootmem
|
} > kseg0_bootmem
|
||||||
|
|
||||||
.vectors :
|
/* KSEG0 exception handlers */
|
||||||
|
|
||||||
|
.excpt_handlers :
|
||||||
{
|
{
|
||||||
*(.vectors)
|
*(.bev_handler)
|
||||||
} > kseg0_exptmem
|
*(.int_handler)
|
||||||
|
} > kseg0_excptmem
|
||||||
|
|
||||||
.dbg_code = ORIGIN(kseg1_dbgcode);
|
.dbg_code = ORIGIN(kseg1_dbgcode);
|
||||||
|
|
||||||
|
|||||||
Reference in New Issue
Block a user