diff --git a/arch/arm/src/stm32/Kconfig b/arch/arm/src/stm32/Kconfig index c1e277fc2bf..13d8af23849 100644 --- a/arch/arm/src/stm32/Kconfig +++ b/arch/arm/src/stm32/Kconfig @@ -6215,7 +6215,7 @@ endchoice config STM32_ETHMAC_REGDEBUG bool "Register-Level Debug" default n - depends on DEBUG_FEATURES + depends on DEBUG_NET_INFO ---help--- Enable very low-level register access debug. Depends on CONFIG_DEBUG_FEATURES. @@ -6305,14 +6305,14 @@ menu "USB Host Debug Configuration" config STM32_USBHOST_REGDEBUG bool "Register-Level Debug" default n - depends on USBHOST && (STM32_OTGFS || STM32_OTGHS) + depends on USBHOST && DEBUG_USB_INFO && (STM32_OTGFS || STM32_OTGHS) ---help--- Enable very low-level register access debug. config STM32_USBHOST_PKTDUMP bool "Packet Dump Debug" default n - depends on USBHOST && (STM32_OTGFS || STM32_OTGHS) + depends on USBHOST && DEBUG_USB_INFO && (STM32_OTGFS || STM32_OTGHS) ---help--- Dump all incoming and outgoing USB packets. diff --git a/arch/arm/src/stm32/stm32_adc.c b/arch/arm/src/stm32/stm32_adc.c index d730923a223..3b541dde8a9 100644 --- a/arch/arm/src/stm32/stm32_adc.c +++ b/arch/arm/src/stm32/stm32_adc.c @@ -906,7 +906,7 @@ static int adc_timinit(FAR struct stm32_dev_s *priv) if (prescaler < 1) { - aerr("WARNING: Prescaler underflowed.\n"); + awarn("WARNING: Prescaler underflowed.\n"); prescaler = 1; } @@ -914,7 +914,7 @@ static int adc_timinit(FAR struct stm32_dev_s *priv) else if (prescaler > 65536) { - aerr("WARNING: Prescaler overflowed.\n"); + awarn("WARNING: Prescaler overflowed.\n"); prescaler = 65536; } @@ -923,12 +923,12 @@ static int adc_timinit(FAR struct stm32_dev_s *priv) reload = timclk / priv->freq; if (reload < 1) { - aerr("WARNING: Reload value underflowed.\n"); + awarn("WARNING: Reload value underflowed.\n"); reload = 1; } else if (reload > 65535) { - aerr("WARNING: Reload value overflowed.\n"); + awarn("WARNING: Reload value overflowed.\n"); reload = 65535; } @@ -1070,7 +1070,7 @@ static int adc_timinit(FAR struct stm32_dev_s *priv) break; default: - aerr("No such trigger: %d\n", priv->trigger); + aerr("ERROR: No such trigger: %d\n", priv->trigger); return -EINVAL; } @@ -2002,7 +2002,7 @@ static void adc_reset(FAR struct adc_dev_s *dev) ret = adc_timinit(priv); if (ret < 0) { - aerr("adc_timinit failed: %d\n", ret); + aerr("ERROR: adc_timinit failed: %d\n", ret); } } #ifndef CONFIG_ADC_NO_STARTUP_CONV @@ -2718,12 +2718,12 @@ static int adc_interrupt(FAR struct adc_dev_s *dev) if ((regval & ADC_ISR_AWD) != 0) { - allerr("WARNING: Analog Watchdog, Value converted out of range!\n"); + allwarn("WARNING: Analog Watchdog, Value converted out of range!\n"); } if ((regval & ADC_ISR_OVR) != 0) { - allerr("WARNING: Overrun has occurred!\n"); + allwarn("WARNING: Overrun has occurred!\n"); } /* EOC: End of conversion */ @@ -3012,7 +3012,7 @@ struct adc_dev_s *stm32_adcinitialize(int intf, FAR const uint8_t *chanlist, break; #endif default: - aerr("No ADC interface defined\n"); + aerr("ERROR: No ADC interface defined\n"); return NULL; } diff --git a/arch/arm/src/stm32/stm32_bbsram.c b/arch/arm/src/stm32/stm32_bbsram.c index 0266f6beddb..e2ca52eee49 100644 --- a/arch/arm/src/stm32/stm32_bbsram.c +++ b/arch/arm/src/stm32/stm32_bbsram.c @@ -75,6 +75,10 @@ #define MAX_OPENCNT (255) /* Limit of uint8_t */ +#ifndef CONFIG_DEBUG_INFO +# undef CONFIG_BBSRAM_DEBUG +#endif + #if defined(CONFIG_BBSRAM_DEBUG) # define BBSRAM_DEBUG_READ() stm32_bbsram_rd() # define BBSRAM_DUMP(p,s) stm32_bbsram_dump(p,s) @@ -183,15 +187,15 @@ static void stm32_bbsram_rd(void) static void stm32_bbsram_dump(FAR struct bbsramfh_s *bbf, char *op) { BBSRAM_DEBUG_READ(); - llerr("%s:\n", op); - llerr(" File Address:0x%8x\n", bbf); - llerr(" crc:0x%8x\n", bbf->crc); - llerr(" fileno:%d\n", (int) bbf->fileno); - llerr(" dirty:%d\n", (int) bbf->dirty); - llerr(" length:%d\n", (int) bbf->len); - llerr(" time:%ld:%ld\n", bbf->lastwrite.tv_sec, bbf->lastwrite.tv_nsec); - llerr(" data: 0x%2x 0x%2x 0x%2x 0x%2x 0x%2x\n", - bbf->data[0], bbf->data[1], bbf->data[2], bbf->data[3], bbf->data[4]); + info("%s:\n", op); + info(" File Address:0x%8x\n", bbf); + info(" crc:0x%8x\n", bbf->crc); + info(" fileno:%d\n", (int) bbf->fileno); + info(" dirty:%d\n", (int) bbf->dirty); + info(" length:%d\n", (int) bbf->len); + info(" time:%ld:%ld\n", bbf->lastwrite.tv_sec, bbf->lastwrite.tv_nsec); + info(" data: 0x%2x 0x%2x 0x%2x 0x%2x 0x%2x\n", + bbf->data[0], bbf->data[1], bbf->data[2], bbf->data[3], bbf->data[4]); } #endif diff --git a/arch/arm/src/stm32/stm32_dac.c b/arch/arm/src/stm32/stm32_dac.c index a2cfcea92ff..528faf1786c 100644 --- a/arch/arm/src/stm32/stm32_dac.c +++ b/arch/arm/src/stm32/stm32_dac.c @@ -852,7 +852,7 @@ static int dac_timinit(FAR struct stm32_chan_s *chan) break; #endif default: - aerr("Could not enable timer\n"); + aerr("ERROR: Could not enable timer\n"); break; } @@ -1016,7 +1016,7 @@ static int dac_chaninit(FAR struct stm32_chan_s *chan) chan->dma = stm32_dmachannel(chan->dmachan); if (!chan->dma) { - aerr("Failed to allocate a DMA channel\n"); + aerr("ERROR: Failed to allocate a DMA channel\n"); return -EBUSY; } @@ -1025,7 +1025,7 @@ static int dac_chaninit(FAR struct stm32_chan_s *chan) ret = dac_timinit(chan); if (ret < 0) { - aerr("Failed to initialize the DMA timer: %d\n", ret); + aerr("ERROR: Failed to initialize the DMA timer: %d\n", ret); return ret; } } @@ -1128,7 +1128,7 @@ FAR struct dac_dev_s *stm32_dacinitialize(int intf) else #endif { - aerr("No such DAC interface: %d\n", intf); + aerr("ERROR: No such DAC interface: %d\n", intf); errno = ENODEV; return NULL; } @@ -1138,7 +1138,7 @@ FAR struct dac_dev_s *stm32_dacinitialize(int intf) ret = dac_blockinit(); if (ret < 0) { - aerr("Failed to initialize the DAC block: %d\n", ret); + aerr("ERROR: Failed to initialize the DAC block: %d\n", ret); errno = -ret; return NULL; } @@ -1149,7 +1149,7 @@ FAR struct dac_dev_s *stm32_dacinitialize(int intf) ret = dac_chaninit(chan); if (ret < 0) { - aerr("Failed to initialize DAC channel %d: %d\n", intf, ret); + aerr("ERROR: Failed to initialize DAC channel %d: %d\n", intf, ret); errno = -ret; return NULL; } diff --git a/arch/arm/src/stm32/stm32_dma2d.c b/arch/arm/src/stm32/stm32_dma2d.c index 06325fe28de..5e5740e27b8 100644 --- a/arch/arm/src/stm32/stm32_dma2d.c +++ b/arch/arm/src/stm32/stm32_dma2d.c @@ -137,8 +137,8 @@ /* Debug option */ #ifdef CONFIG_STM32_DMA2D_REGDEBUG -# define regerr err -# define reginfo info +# define regerr lcderr +# define reginfo lcdinfo #else # define regerr(x...) # define reginfo(x...) @@ -408,7 +408,7 @@ static void stm32_dma2d_control(uint32_t setbits, uint32_t clrbits) { uint32_t cr; - ginfo("setbits=%08x, clrbits=%08x\n", setbits, clrbits); + lcdinfo("setbits=%08x, clrbits=%08x\n", setbits, clrbits); cr = getreg32(STM32_DMA2D_CR); cr &= ~clrbits; @@ -469,7 +469,7 @@ static int stm32_dma2dirq(int irq, void *context) if (ret != OK) { - err("sem_post() failed\n"); + lcderr("ERROR: sem_post() failed\n"); return ret; } } @@ -512,7 +512,7 @@ static int stm32_dma2d_waitforirq(void) if (ret != OK) { - err("sem_wait() failed\n"); + lcderr("ERROR: sem_wait() failed\n"); return ret; } } @@ -632,7 +632,7 @@ static uint32_t stm32_dma2d_memaddress(FAR const struct stm32_dma2d_s *layer, offset = xpos * DMA2D_PF_BYPP(layer->pinfo.bpp) + layer->pinfo.stride * ypos; - ginfo("%p\n", ((uint32_t) pinfo->fbmem) + offset); + lcdinfo("%p\n", ((uint32_t) pinfo->fbmem) + offset); return ((uint32_t) pinfo->fbmem) + offset; } @@ -655,7 +655,7 @@ static fb_coord_t stm32_dma2d_lineoffset(FAR const struct stm32_dma2d_s *layer, { /* offset at the end of each line in the context to the area layer */ - ginfo("%d\n", layer->vinfo.xres - area->xres); + lcdinfo("%d\n", layer->vinfo.xres - area->xres); return layer->vinfo.xres - area->xres; } @@ -677,7 +677,7 @@ static fb_coord_t stm32_dma2d_lineoffset(FAR const struct stm32_dma2d_s *layer, static int stm32_dma2d_pixelformat(uint8_t fmt, uint8_t *fmtmap) { - ginfo("fmt=%d, fmtmap=%p\n", fmt, fmtmap); + lcdinfo("fmt=%d, fmtmap=%p\n", fmt, fmtmap); /* Map to the controller known format * @@ -711,7 +711,7 @@ static int stm32_dma2d_pixelformat(uint8_t fmt, uint8_t *fmtmap) break; #endif default: - gerr("ERROR: Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -736,7 +736,7 @@ static int stm32_dma2d_pixelformat(uint8_t fmt, uint8_t *fmtmap) static int stm32_dma2d_bpp(uint8_t fmt, uint8_t *bpp) { - ginfo("fmt=%d, bpp=%p\n", fmt, bpp); + lcdinfo("fmt=%d, bpp=%p\n", fmt, bpp); switch (fmt) { @@ -756,7 +756,7 @@ static int stm32_dma2d_bpp(uint8_t fmt, uint8_t *bpp) break; #endif default: - gerr("ERROR: Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -937,7 +937,7 @@ static void stm32_dma2d_linit(FAR struct stm32_dma2d_s *layer, { FAR struct dma2d_layer_s *priv = &layer->dma2d; - ginfo("layer=%p, lid=%d, fmt=%02x\n", layer, lid, fmt); + lcdinfo("layer=%p, lid=%d, fmt=%02x\n", layer, lid, fmt); /* initialize the layer interface */ @@ -985,8 +985,8 @@ static void stm32_dma2d_lfifo(FAR const struct stm32_dma2d_s *layer, int lid, fb_coord_t xpos, fb_coord_t ypos, FAR const struct ltdc_area_s *area) { - ginfo("layer=%p, lid=%d, xpos=%d, ypos=%d, area=%p\n", - layer, lid, xpos, ypos, area); + lcdinfo("layer=%p, lid=%d, xpos=%d, ypos=%d, area=%p\n", + layer, lid, xpos, ypos, area); putreg32(stm32_dma2d_memaddress(layer, xpos, ypos), stm32_mar_layer_t[lid]); putreg32(stm32_dma2d_lineoffset(layer, area), stm32_or_layer_t[lid]); @@ -1006,7 +1006,7 @@ static void stm32_dma2d_lfifo(FAR const struct stm32_dma2d_s *layer, int lid, static void stm32_dma2d_lcolor(FAR const struct stm32_dma2d_s *layer, int lid, uint32_t color) { - ginfo("layer=%p, lid=%d, color=%08x\n", layer, lid, color); + lcdinfo("layer=%p, lid=%d, color=%08x\n", layer, lid, color); putreg32(color, stm32_color_layer_t[lid]); } @@ -1027,7 +1027,7 @@ static void stm32_dma2d_llnr(FAR struct stm32_dma2d_s *layer, { uint32_t nlrreg; - ginfo("pixel per line: %d, number of lines: %d\n", area->xres, area->yres); + lcdinfo("pixel per line: %d, number of lines: %d\n", area->xres, area->yres); nlrreg = getreg32(STM32_DMA2D_NLR); nlrreg = (DMA2D_NLR_PL(area->xres) | DMA2D_NLR_NL(area->yres)); @@ -1047,7 +1047,7 @@ static void stm32_dma2d_llnr(FAR struct stm32_dma2d_s *layer, static int stm32_dma2d_loutpfc(FAR const struct stm32_dma2d_s *layer) { - ginfo("layer=%p\n", layer); + lcdinfo("layer=%p\n", layer); /* CLUT format isn't supported by the dma2d controller */ @@ -1055,8 +1055,8 @@ static int stm32_dma2d_loutpfc(FAR const struct stm32_dma2d_s *layer) { /* Destination layer doesn't support CLUT output */ - gerr("ERROR: Returning ENOSYS, " - "output to layer with CLUT format not supported.\n"); + lcderr("ERROR: Returning ENOSYS, " + "output to layer with CLUT format not supported.\n"); return -ENOSYS; } @@ -1083,7 +1083,7 @@ static void stm32_dma2d_lpfc(FAR const struct stm32_dma2d_s *layer, { uint32_t pfccrreg; - ginfo("layer=%p, lid=%d, blendmode=%08x\n", layer, lid, blendmode); + lcdinfo("layer=%p, lid=%d, blendmode=%08x\n", layer, lid, blendmode); /* Set color format */ @@ -1172,7 +1172,7 @@ static int stm32_dma2dgetvideoinfo(FAR struct dma2d_layer_s *layer, { FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer; - ginfo("layer=%p, vinfo=%p\n", layer, vinfo); + lcdinfo("layer=%p, vinfo=%p\n", layer, vinfo); if (stm32_dma2d_lvalidate(priv) && vinfo) { @@ -1183,7 +1183,7 @@ static int stm32_dma2dgetvideoinfo(FAR struct dma2d_layer_s *layer, return OK; } - gerr("ERROR: Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -ENOSYS; } @@ -1209,7 +1209,7 @@ static int stm32_dma2dgetplaneinfo(FAR struct dma2d_layer_s *layer, int planeno, { FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer; - ginfo("layer=%p, planeno=%d, pinfo=%p\n", layer, planeno, pinfo); + lcdinfo("layer=%p, planeno=%d, pinfo=%p\n", layer, planeno, pinfo); if (stm32_dma2d_lvalidate(priv) && pinfo && planeno == 0) { @@ -1220,7 +1220,7 @@ static int stm32_dma2dgetplaneinfo(FAR struct dma2d_layer_s *layer, int planeno, return OK; } - gerr("ERROR: Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -1244,7 +1244,7 @@ static int stm32_dma2dgetlid(FAR struct dma2d_layer_s *layer, int *lid) { FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer; - ginfo("layer=%p, lid=%p\n", layer, lid); + lcdinfo("layer=%p, lid=%p\n", layer, lid); if (stm32_dma2d_lvalidate(priv) && lid) { @@ -1254,7 +1254,7 @@ static int stm32_dma2dgetlid(FAR struct dma2d_layer_s *layer, int *lid) return OK; } - gerr("ERROR: Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -1282,7 +1282,7 @@ static int stm32_dma2dsetclut(FAR struct dma2d_layer_s *layer, int ret; FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer; - ginfo("layer=%p, cmap=%p\n", layer, cmap); + lcdinfo("layer=%p, cmap=%p\n", layer, cmap); if (stm32_dma2d_lvalidate(priv) && cmap) { @@ -1320,14 +1320,14 @@ static int stm32_dma2dsetclut(FAR struct dma2d_layer_s *layer, if (priv->fmt != DMA2D_PF_L8) { - gerr("Error: CLUT is not supported for the pixel format: %d\n", - priv->vinfo.fmt); + lcderr("ERROR: CLUT is not supported for the pixel format: %d\n", + priv->vinfo.fmt); ret = -EINVAL; } else if (cmap->first >= STM32_DMA2D_NCLUT) { - gerr("Error: only %d color table entries supported\n", - STM32_DMA2D_NCLUT); + lcderr("ERROR: only %d color table entries supported\n", + STM32_DMA2D_NCLUT); ret = -EINVAL; } else @@ -1374,7 +1374,7 @@ static int stm32_dma2dsetclut(FAR struct dma2d_layer_s *layer, return ret; } - gerr("ERROR: Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -1401,7 +1401,7 @@ static int stm32_dma2dgetclut(FAR struct dma2d_layer_s *layer, int ret; FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer; - ginfo("layer=%p, cmap=%p\n", layer, cmap); + lcdinfo("layer=%p, cmap=%p\n", layer, cmap); if (stm32_dma2d_lvalidate(priv) && cmap) { @@ -1409,14 +1409,14 @@ static int stm32_dma2dgetclut(FAR struct dma2d_layer_s *layer, if (priv->fmt != DMA2D_PF_L8) { - gerr("Error: CLUT is not supported for the pixel format: %d\n", - priv->vinfo.fmt); + lcderr("ERROR: CLUT is not supported for the pixel format: %d\n", + priv->vinfo.fmt); ret = -EINVAL; } else if (cmap->first >= STM32_DMA2D_NCLUT) { - gerr("Error: only %d color table entries supported\n", - STM32_DMA2D_NCLUT); + lcderr("ERROR: only %d color table entries supported\n", + STM32_DMA2D_NCLUT); ret = -EINVAL; } else @@ -1461,7 +1461,7 @@ static int stm32_dma2dgetclut(FAR struct dma2d_layer_s *layer, return ret; } - gerr("ERROR: Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } #endif @@ -1491,7 +1491,7 @@ static int stm32_dma2dsetalpha(FAR struct dma2d_layer_s *layer, uint8_t alpha) { FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer; - ginfo("layer=%p, alpha=%02x\n", layer, alpha); + lcdinfo("layer=%p, alpha=%02x\n", layer, alpha); if (stm32_dma2d_lvalidate(priv)) { @@ -1502,7 +1502,7 @@ static int stm32_dma2dsetalpha(FAR struct dma2d_layer_s *layer, uint8_t alpha) return OK; } - gerr("ERROR: Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -1526,7 +1526,7 @@ static int stm32_dma2dgetalpha(FAR struct dma2d_layer_s *layer, uint8_t *alpha) { FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer; - ginfo("layer=%p, alpha=%p\n", layer, alpha); + lcdinfo("layer=%p, alpha=%p\n", layer, alpha); if (stm32_dma2d_lvalidate(priv)) { @@ -1537,7 +1537,7 @@ static int stm32_dma2dgetalpha(FAR struct dma2d_layer_s *layer, uint8_t *alpha) return OK; } - gerr("ERROR: Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -1577,7 +1577,7 @@ static int stm32_dma2dsetblendmode(FAR struct dma2d_layer_s *layer, { FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer; - ginfo("layer=%p, mode=%08x\n", layer, mode); + lcdinfo("layer=%p, mode=%08x\n", layer, mode); if (stm32_dma2d_lvalidate(priv)) { @@ -1588,7 +1588,7 @@ static int stm32_dma2dsetblendmode(FAR struct dma2d_layer_s *layer, return OK; } - gerr("ERROR: Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -1613,7 +1613,7 @@ static int stm32_dma2dgetblendmode(FAR struct dma2d_layer_s *layer, { FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer; - ginfo("layer=%p, mode=%p\n", layer, mode); + lcdinfo("layer=%p, mode=%p\n", layer, mode); if (stm32_dma2d_lvalidate(priv) && mode) { @@ -1624,7 +1624,7 @@ static int stm32_dma2dgetblendmode(FAR struct dma2d_layer_s *layer, return OK; } - gerr("ERROR: Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -1661,8 +1661,8 @@ static int stm32_dma2dblit(FAR struct dma2d_layer_s *dest, FAR struct stm32_dma2d_s * destlayer = (FAR struct stm32_dma2d_s *)dest; FAR struct stm32_dma2d_s * srclayer = (FAR struct stm32_dma2d_s *)src; - ginfo("dest=%p, destxpos=%d, destypos=%d, src=%p, srcarea=%p\n", - dest, destxpos, destypos, src, srcarea); + lcdinfo("dest=%p, destxpos=%d, destypos=%d, src=%p, srcarea=%p\n", + dest, destxpos, destypos, src, srcarea); if (stm32_dma2d_lvalidatesize(destlayer, destxpos, destypos, srcarea) && stm32_dma2d_lvalidatesize(srclayer, srcarea->xpos, @@ -1718,7 +1718,7 @@ static int stm32_dma2dblit(FAR struct dma2d_layer_s *dest, if (ret != OK) { ret = -ECANCELED; - gerr("ERROR: Returning ECANCELED\n"); + lcderr("ERROR: Returning ECANCELED\n"); } } @@ -1727,7 +1727,7 @@ static int stm32_dma2dblit(FAR struct dma2d_layer_s *dest, else { ret = -EINVAL; - gerr("ERROR: Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); } return ret; @@ -1772,10 +1772,10 @@ static int stm32_dma2dblend(FAR struct dma2d_layer_s *dest, FAR struct stm32_dma2d_s * forelayer = (FAR struct stm32_dma2d_s *)fore; FAR struct stm32_dma2d_s * backlayer = (FAR struct stm32_dma2d_s *)back; - ginfo("dest=%p, destxpos=%d, destypos=%d, " - "fore=%p, forexpos=%d, foreypos=%d, " - "back=%p, backarea=%p\n", - dest, destxpos, destypos, fore, forexpos, foreypos, back, backarea); + lcdinfo("dest=%p, destxpos=%d, destypos=%d, " + "fore=%p, forexpos=%d, foreypos=%d, " + "back=%p, backarea=%p\n", + dest, destxpos, destypos, fore, forexpos, foreypos, back, backarea); if (stm32_dma2d_lvalidatesize(destlayer, destxpos, destypos, backarea) && stm32_dma2d_lvalidatesize(forelayer, forexpos, foreypos, backarea) && @@ -1832,7 +1832,7 @@ static int stm32_dma2dblend(FAR struct dma2d_layer_s *dest, if (ret != OK) { ret = -ECANCELED; - gerr("ERROR: Returning ECANCELED\n"); + lcderr("ERROR: Returning ECANCELED\n"); } } @@ -1841,7 +1841,7 @@ static int stm32_dma2dblend(FAR struct dma2d_layer_s *dest, else { ret = -EINVAL; - gerr("ERROR: Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); } return ret; @@ -1874,7 +1874,7 @@ static int stm32_dma2dfillarea(FAR struct dma2d_layer_s *layer, int ret; FAR struct stm32_dma2d_s *priv = (FAR struct stm32_dma2d_s *)layer; - ginfo("layer=%p, area=%p, color=%08x\n", layer, area, color); + lcdinfo("layer=%p, area=%p, color=%08x\n", layer, area, color); if (stm32_dma2d_lvalidatesize(priv, area->xpos, area->ypos, area)) { @@ -1912,7 +1912,7 @@ static int stm32_dma2dfillarea(FAR struct dma2d_layer_s *layer, if (ret != OK) { ret = -ECANCELED; - gerr("ERROR: Returning ECANCELED\n"); + lcderr("ERROR: Returning ECANCELED\n"); } } @@ -1921,7 +1921,7 @@ static int stm32_dma2dfillarea(FAR struct dma2d_layer_s *layer, else { ret = -EINVAL; - gerr("ERROR: Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); } return ret; @@ -1954,7 +1954,7 @@ FAR struct dma2d_layer_s * up_dma2dgetlayer(int lid) return &priv->dma2d; } - gerr("ERROR: EINVAL, Unknown layer identifier\n"); + lcderr("ERROR: EINVAL, Unknown layer identifier\n"); errno = EINVAL; return NULL; } @@ -1989,7 +1989,7 @@ FAR struct dma2d_layer_s *up_dma2dcreatelayer(fb_coord_t width, uint8_t bpp = 0; FAR struct stm32_dma2d_s *layer = NULL; - ginfo("width=%d, height=%d, fmt=%02x \n", width, height, fmt); + lcdinfo("width=%d, height=%d, fmt=%02x \n", width, height, fmt); /* Validate if pixel format supported */ @@ -2069,19 +2069,19 @@ FAR struct dma2d_layer_s *up_dma2dcreatelayer(fb_coord_t width, /* free the layer struture */ kmm_free(layer); - gerr("ERROR: ENOMEM, Unable to allocate layer buffer\n"); + lcderr("ERROR: ENOMEM, Unable to allocate layer buffer\n"); errno = ENOMEM; } } else { - gerr("ERROR: ENOMEM, unable to allocate layer structure\n"); + lcderr("ERROR: ENOMEM, unable to allocate layer structure\n"); errno = ENOMEM; } } else { - gerr("ERROR: EINVAL, no free layer available\n"); + lcderr("ERROR: EINVAL, no free layer available\n"); errno = EINVAL; } @@ -2148,7 +2148,7 @@ int up_dma2dremovelayer(FAR struct dma2d_layer_s *layer) int up_dma2dinitialize(void) { - err("Initialize DMA2D driver\n"); + lcdinfo("Initialize DMA2D driver\n"); if (g_initialized == false) { @@ -2265,15 +2265,15 @@ FAR struct dma2d_layer_s * stm32_dma2dinitltdc(FAR struct stm32_ltdc_s *layer) uint8_t fmt = 0; FAR struct stm32_ltdc_dma2d_s *priv; - ginfo("layer=%p\n", layer); + lcdinfo("layer=%p\n", layer); DEBUGASSERT(layer && layer->lid >= 0 && layer->lid < DMA2D_SHADOW_LAYER); ret = stm32_dma2d_pixelformat(layer->vinfo.fmt, &fmt); if (ret != OK) { - err("Returning -EINVAL, unsupported pixel format: %d\n", - layer->vinfo.fmt); + lcderr("ERROR: Returning -EINVAL, unsupported pixel format: %d\n", + layer->vinfo.fmt); errno = -EINVAL; return NULL; } diff --git a/arch/arm/src/stm32/stm32_eth.c b/arch/arm/src/stm32/stm32_eth.c index e2708372ba7..df02c0a8573 100644 --- a/arch/arm/src/stm32/stm32_eth.c +++ b/arch/arm/src/stm32/stm32_eth.c @@ -240,7 +240,7 @@ * enabled. */ -#ifndef CONFIG_DEBUG_FEATURES +#ifndef CONFIG_DEBUG_NET_INFO # undef CONFIG_STM32_ETHMAC_REGDEBUG #endif @@ -748,7 +748,7 @@ static int stm32_ethconfig(FAR struct stm32_ethmac_s *priv); * ****************************************************************************/ -#if defined(CONFIG_STM32_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES) +#ifdef CONFIG_STM32_ETHMAC_REGDEBUG static uint32_t stm32_getreg(uint32_t addr) { static uint32_t prevaddr = 0; @@ -769,7 +769,7 @@ static uint32_t stm32_getreg(uint32_t addr) { if (count == 4) { - llerr("...\n"); + ninfo("...\n"); } return val; @@ -786,7 +786,7 @@ static uint32_t stm32_getreg(uint32_t addr) { /* Yes.. then show how many times the value repeated */ - llerr("[repeats %d more times]\n", count-3); + ninfo("[repeats %d more times]\n", count-3); } /* Save the new address, value, and count */ @@ -798,7 +798,7 @@ static uint32_t stm32_getreg(uint32_t addr) /* Show the register value read */ - llerr("%08x->%08x\n", addr, val); + ninfo("%08x->%08x\n", addr, val); return val; } #endif @@ -820,12 +820,12 @@ static uint32_t stm32_getreg(uint32_t addr) * ****************************************************************************/ -#if defined(CONFIG_STM32_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES) +#ifdef CONFIG_STM32_ETHMAC_REGDEBUG static void stm32_putreg(uint32_t val, uint32_t addr) { /* Show the register value being written */ - llerr("%08x<-%08x\n", addr, val); + ninfo("%08x<-%08x\n", addr, val); /* Write the value */ @@ -847,7 +847,7 @@ static void stm32_putreg(uint32_t val, uint32_t addr) * ****************************************************************************/ -#if defined(CONFIG_STM32_ETHMAC_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES) +#ifdef CONFIG_STM32_ETHMAC_REGDEBUG static void stm32_checksetup(void) { } @@ -1505,7 +1505,7 @@ static int stm32_recvframe(FAR struct stm32_ethmac_s *priv) if (!stm32_isfreebuffer(priv)) { - nllerr("No free buffers\n"); + nllerr("ERROR: No free buffers\n"); return -ENOMEM; } @@ -1612,7 +1612,7 @@ static int stm32_recvframe(FAR struct stm32_ethmac_s *priv) * scanning logic, and continue scanning with the next frame. */ - nllerr("DROPPED: RX descriptor errors: %08x\n", rxdesc->rdes0); + nllerr("ERROR: Dropped, RX descriptor errors: %08x\n", rxdesc->rdes0); stm32_freesegment(priv, rxcurr, priv->segments); } } @@ -1673,7 +1673,7 @@ static void stm32_receive(FAR struct stm32_ethmac_s *priv) if (dev->d_len > CONFIG_NET_ETH_MTU) { - nllerr("DROPPED: Too big: %d\n", dev->d_len); + nllerr("ERROR: Dropped, Too big: %d\n", dev->d_len); /* Free dropped packet buffer */ @@ -1793,7 +1793,7 @@ static void stm32_receive(FAR struct stm32_ethmac_s *priv) else #endif { - nllerr("DROPPED: Unknown type: %04x\n", BUF->type); + nllerr("ERROR: Dropped, Unknown type: %04x\n", BUF->type); } /* We are finished with the RX buffer. NOTE: If the buffer is @@ -2042,7 +2042,7 @@ static inline void stm32_interrupt_process(FAR struct stm32_ethmac_s *priv) { /* Just let the user know what happened */ - nllerr("Abormal event(s): %08x\n", dmasr); + nllninfoAbormal event(s): %08x\n", dmasr); /* Clear all pending abnormal events */ @@ -2246,7 +2246,7 @@ static void stm32_txtimeout_expiry(int argc, uint32_t arg, ...) { FAR struct stm32_ethmac_s *priv = (FAR struct stm32_ethmac_s *)arg; - nllerr("Timeout!\n"); + nllninfoTimeout!\n"); #ifdef CONFIG_NET_NOINTS /* Disable further Ethernet interrupts. This will prevent some race @@ -2447,15 +2447,15 @@ static int stm32_ifup(struct net_driver_s *dev) int ret; #ifdef CONFIG_NET_IPv4 - nerr("Bringing up: %d.%d.%d.%d\n", - dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff, + ninfo("Bringing up: %d.%d.%d.%d\n", + dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff, (dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24); #endif #ifdef CONFIG_NET_IPv6 - nerr("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n", - dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2], - dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5], - dev->d_ipv6addr[6], dev->d_ipv6addr[7]); + ninfo("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n", + dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2], + dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5], + dev->d_ipv6addr[6], dev->d_ipv6addr[7]); #endif /* Configure the Ethernet interface for DMA operation. */ @@ -2500,7 +2500,7 @@ static int stm32_ifdown(struct net_driver_s *dev) FAR struct stm32_ethmac_s *priv = (FAR struct stm32_ethmac_s *)dev->d_private; irqstate_t flags; - nerr("Taking the network down\n"); + ninfo("Taking the network down\n"); /* Disable the Ethernet interrupt */ @@ -3129,7 +3129,7 @@ static int stm32_phyread(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t *val } } - nerr("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x\n", + nerr("ERROR: MII transfer timed out: phydevaddr: %04x phyregaddr: %04x\n", phydevaddr, phyregaddr); return -ETIMEDOUT; @@ -3188,7 +3188,7 @@ static int stm32_phywrite(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t val } } - nerr("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x value: %04x\n", + nerr("ERROR: MII transfer timed out: phydevaddr: %04x phyregaddr: %04x value: %04x\n", phydevaddr, phyregaddr, value); return -ETIMEDOUT; @@ -3225,7 +3225,7 @@ static inline int stm32_dm9161(FAR struct stm32_ethmac_s *priv) ret = stm32_phyread(CONFIG_STM32_PHYADDR, MII_PHYID1, &phyval); if (ret < 0) { - nerr("Failed to read the PHY ID1: %d\n", ret); + nerr("ERROR: Failed to read the PHY ID1: %d\n", ret); return ret; } @@ -3243,7 +3243,7 @@ static inline int stm32_dm9161(FAR struct stm32_ethmac_s *priv) ret = stm32_phyread(CONFIG_STM32_PHYADDR, 16, &phyval); if (ret < 0) { - nerr("Failed to read the PHY Register 0x10: %d\n", ret); + nerr("ERROR: Failed to read the PHY Register 0x10: %d\n", ret); return ret; } @@ -3300,7 +3300,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv) ret = stm32_phywrite(CONFIG_STM32_PHYADDR, MII_MCR, MII_MCR_RESET); if (ret < 0) { - nerr("Failed to reset the PHY: %d\n", ret); + nerr("ERROR: Failed to reset the PHY: %d\n", ret); return ret; } up_mdelay(PHY_RESET_DELAY); @@ -3311,7 +3311,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv) ret = stm32_phy_boardinitialize(0); if (ret < 0) { - nerr("Failed to initialize the PHY: %d\n", ret); + nerr("ERROR: Failed to initialize the PHY: %d\n", ret); return ret; } #endif @@ -3336,7 +3336,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv) ret = stm32_phyread(CONFIG_STM32_PHYADDR, MII_MSR, &phyval); if (ret < 0) { - nerr("Failed to read the PHY MSR: %d\n", ret); + nerr("ERROR: Failed to read the PHY MSR: %d\n", ret); return ret; } else if ((phyval & MII_MSR_LINKSTATUS) != 0) @@ -3347,7 +3347,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv) if (timeout >= PHY_RETRY_TIMEOUT) { - nerr("Timed out waiting for link status: %04x\n", phyval); + nerr("ERROR: Timed out waiting for link status: %04x\n", phyval); return -ETIMEDOUT; } @@ -3356,7 +3356,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv) ret = stm32_phywrite(CONFIG_STM32_PHYADDR, MII_MCR, MII_MCR_ANENABLE); if (ret < 0) { - nerr("Failed to enable auto-negotiation: %d\n", ret); + nerr("ERROR: Failed to enable auto-negotiation: %d\n", ret); return ret; } @@ -3367,7 +3367,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv) ret = stm32_phyread(CONFIG_STM32_PHYADDR, MII_MSR, &phyval); if (ret < 0) { - nerr("Failed to read the PHY MSR: %d\n", ret); + nerr("ERROR: Failed to read the PHY MSR: %d\n", ret); return ret; } else if ((phyval & MII_MSR_ANEGCOMPLETE) != 0) @@ -3378,7 +3378,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv) if (timeout >= PHY_RETRY_TIMEOUT) { - nerr("Timed out waiting for auto-negotiation\n"); + nerr("ERROR: Timed out waiting for auto-negotiation\n"); return -ETIMEDOUT; } @@ -3387,7 +3387,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv) ret = stm32_phyread(CONFIG_STM32_PHYADDR, CONFIG_STM32_PHYSR, &phyval); if (ret < 0) { - nerr("Failed to read PHY status register\n"); + nerr("ERROR: Failed to read PHY status register\n"); return ret; } @@ -3457,7 +3457,7 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv) ret = stm32_phywrite(CONFIG_STM32_PHYADDR, MII_MCR, phyval); if (ret < 0) { - nerr("Failed to write the PHY MCR: %d\n", ret); + nerr("ERROR: Failed to write the PHY MCR: %d\n", ret); return ret; } up_mdelay(PHY_CONFIG_DELAY); @@ -3472,9 +3472,9 @@ static int stm32_phyinit(FAR struct stm32_ethmac_s *priv) #endif #endif - nerr("Duplex: %s Speed: %d MBps\n", - priv->fduplex ? "FULL" : "HALF", - priv->mbps100 ? 100 : 10); + ninfo("Duplex: %s Speed: %d MBps\n", + priv->fduplex ? "FULL" : "HALF", + priv->mbps100 ? 100 : 10); return OK; } diff --git a/arch/arm/src/stm32/stm32_i2c.c b/arch/arm/src/stm32/stm32_i2c.c index 97e6ccc682f..9f41597f04d 100644 --- a/arch/arm/src/stm32/stm32_i2c.c +++ b/arch/arm/src/stm32/stm32_i2c.c @@ -850,7 +850,7 @@ static void stm32_i2c_tracenew(FAR struct stm32_i2c_priv_s *priv, uint32_t statu if (priv->tndx >= (CONFIG_I2C_NTRACE-1)) { - i2cerr("Trace table overflow\n"); + i2cerr("ERROR: Trace table overflow\n"); return; } @@ -891,7 +891,7 @@ static void stm32_i2c_traceevent(FAR struct stm32_i2c_priv_s *priv, if (priv->tndx >= (CONFIG_I2C_NTRACE-1)) { - i2cerr("Trace table overflow\n"); + i2cerr("ERROR: Trace table overflow\n"); return; } @@ -1686,7 +1686,7 @@ static int stm32_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s status = stm32_i2c_getstatus(priv); ret = -ETIMEDOUT; - i2cerr("Timed out: CR1: 0x%04x status: 0x%08x\n", + i2cerr("ERROR: Timed out: CR1: 0x%04x status: 0x%08x\n", stm32_i2c_getreg(priv, STM32_I2C_CR1_OFFSET), status); /* "Note: When the STOP, START or PEC bit is set, the software must diff --git a/arch/arm/src/stm32/stm32_i2c_alt.c b/arch/arm/src/stm32/stm32_i2c_alt.c index 1419bfc81f1..ac2ea5f6071 100644 --- a/arch/arm/src/stm32/stm32_i2c_alt.c +++ b/arch/arm/src/stm32/stm32_i2c_alt.c @@ -858,7 +858,7 @@ static void stm32_i2c_tracenew(FAR struct stm32_i2c_priv_s *priv, uint16_t statu if (priv->tndx >= (CONFIG_I2C_NTRACE-1)) { - i2cerr("Trace table overflow\n"); + i2cerr("ERROR: Trace table overflow\n"); return; } @@ -899,7 +899,7 @@ static void stm32_i2c_traceevent(FAR struct stm32_i2c_priv_s *priv, if (priv->tndx >= (CONFIG_I2C_NTRACE-1)) { - i2cerr("Trace table overflow\n"); + i2cerr("ERROR: Trace table overflow\n"); return; } @@ -1373,7 +1373,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv) { /* TODO: untested!! */ - i2cerr(" An empty message has been detected, ignoring and passing to next message.\n"); + i2cwarn("WARNING: An empty message has been detected, ignoring and passing to next message.\n"); /* Trace event */ @@ -1600,14 +1600,14 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv) } else { - i2cerr("Write mode: next message has an unrecognized flag.\n"); + i2cerr("ERROR: Write mode: next message has an unrecognized flag.\n"); stm32_i2c_traceevent(priv, I2CEVENT_WRITE_FLAG_ERROR, priv->msgv->flags); } } else { - i2cerr("Write mode error.\n"); + i2cerr("ERROR: Write mode error.\n"); stm32_i2c_traceevent(priv, I2CEVENT_WRITE_ERROR, 0); } } @@ -1774,8 +1774,8 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv) else { - i2cerr("I2C read mode no correct state detected\n"); - i2cerr(" state %i, dcnt=%i\n", status, priv->dcnt); + i2cerr("ERROR: I2C read mode no correct state detected\n"); + i2cerr(" state %i, dcnt=%i\n", status, priv->dcnt); /* set condition to terminate ISR and wake waiting thread */ @@ -1800,7 +1800,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv) /* Read rest of the state */ status |= (stm32_i2c_getreg(priv, STM32_I2C_SR2_OFFSET) << 16); - i2cerr("Empty call to ISR: Stopping ISR\n"); + i2cwarn("WARNING: Empty call to ISR: Stopping ISR\n"); stm32_i2c_traceevent(priv, I2CEVENT_ISR_EMPTY_CALL, 0); } @@ -1824,8 +1824,8 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv) status |= (stm32_i2c_getreg(priv, STM32_I2C_SR2_OFFSET) << 16); - i2cerr(" No correct state detected(start bit, read or write) \n"); - i2cerr(" state %i\n", status); + i2cerr("ERROR: No correct state detected(start bit, read or write) \n"); + i2cerr(" state %i\n", status); /* set condition to terminate ISR and wake waiting thread */ @@ -2117,7 +2117,7 @@ static int stm32_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s status = stm32_i2c_getstatus(priv); ret = -ETIMEDOUT; - i2cerr("Timed out: CR1: 0x%04x status: 0x%08x\n", + i2cerr("ERROR: Timed out: CR1: 0x%04x status: 0x%08x\n", stm32_i2c_getreg(priv, STM32_I2C_CR1_OFFSET), status); /* "Note: When the STOP, START or PEC bit is set, the software must @@ -2147,7 +2147,8 @@ static int stm32_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s * Note: this commentary is found in both places. * */ - i2cerr("Check if the address was valid\n"); + + i2cinfo("Check if the address was valid\n"); stm32_i2c_sendstop(priv); #endif /* Clear busy flag in case of timeout */ diff --git a/arch/arm/src/stm32/stm32_iwdg.c b/arch/arm/src/stm32/stm32_iwdg.c index ab6b052714a..1cdf8e47bc0 100644 --- a/arch/arm/src/stm32/stm32_iwdg.c +++ b/arch/arm/src/stm32/stm32_iwdg.c @@ -84,6 +84,10 @@ # define CONFIG_STM32_IWDG_DEFTIMOUT IWDG_MAXTIMEOUT #endif +#ifndef CONFIG_DEBUG_WATCHDOG_INFO +# undef CONFIG_STM32_IWDG_REGDEBUG +#endif + /* REVISIT: It appears that you can only setup the prescaler and reload * registers once. After that, the SR register's PVU and RVU bits never go * to zero. So we defer setting up these registers until the watchdog @@ -129,7 +133,7 @@ struct stm32_lowerhalf_s ****************************************************************************/ /* Register operations ******************************************************/ -#if defined(CONFIG_STM32_IWDG_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES) +#ifdef CONFIG_STM32_IWDG_REGDEBUG static uint16_t stm32_getreg(uint32_t addr); static void stm32_putreg(uint16_t val, uint32_t addr); #else @@ -181,7 +185,7 @@ static struct stm32_lowerhalf_s g_wdgdev; * ****************************************************************************/ -#if defined(CONFIG_STM32_IWDG_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES) +#ifdef CONFIG_STM32_IWDG_REGDEBUG static uint16_t stm32_getreg(uint32_t addr) { static uint32_t prevaddr = 0; @@ -202,7 +206,7 @@ static uint16_t stm32_getreg(uint32_t addr) { if (count == 4) { - llerr("...\n"); + wdinfo("...\n"); } return val; @@ -219,7 +223,7 @@ static uint16_t stm32_getreg(uint32_t addr) { /* Yes.. then show how many times the value repeated */ - llerr("[repeats %d more times]\n", count-3); + wdinfo("[repeats %d more times]\n", count-3); } /* Save the new address, value, and count */ @@ -231,7 +235,7 @@ static uint16_t stm32_getreg(uint32_t addr) /* Show the register value read */ - llerr("%08x->%04x\n", addr, val); + wdinfo("%08x->%04x\n", addr, val); return val; } #endif @@ -244,12 +248,12 @@ static uint16_t stm32_getreg(uint32_t addr) * ****************************************************************************/ -#if defined(CONFIG_STM32_IWDG_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES) +#ifdef CONFIG_STM32_IWDG_REGDEBUG static void stm32_putreg(uint16_t val, uint32_t addr) { /* Show the register value being written */ - llerr("%08x<-%04x\n", addr, val); + wdinfo("%08x<-%04x\n", addr, val); /* Write the value */ @@ -509,7 +513,7 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower, if (timeout < 1 || timeout > IWDG_MAXTIMEOUT) { - wderr("Cannot represent timeout=%d > %d\n", + wderr("ERROR: Cannot represent timeout=%d > %d\n", timeout, IWDG_MAXTIMEOUT); return -ERANGE; } @@ -522,7 +526,7 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower, #ifdef CONFIG_STM32_IWDG_ONETIMESETUP if (priv->started) { - wderr("Timer is already started\n"); + wdwarn("WARNING: Timer is already started\n"); return -EBUSY; } #endif diff --git a/arch/arm/src/stm32/stm32_ltdc.c b/arch/arm/src/stm32/stm32_ltdc.c index 9ad25dfeed9..442af257dd4 100644 --- a/arch/arm/src/stm32/stm32_ltdc.c +++ b/arch/arm/src/stm32/stm32_ltdc.c @@ -283,8 +283,8 @@ /* Debug option */ #ifdef CONFIG_STM32_LTDC_REGDEBUG -# define regerr err -# define reginfo info +# define regerr lcderr +# define reginfo lcdinfo #else # define regerr(x...) # define reginfo(x...) @@ -942,7 +942,7 @@ static void stm32_ltdc_gpioconfig(void) { int i; - ginfo("Configuring pins\n"); + lcdinfo("Configuring pins\n"); /* Configure each pin */ @@ -1155,7 +1155,7 @@ static int stm32_ltdcirq(int irq, void *context) if (ret != OK) { - err("sem_post() failed\n"); + lcderr("ERROR: sem_post() failed\n"); return ret; } } @@ -1202,7 +1202,7 @@ static int stm32_ltdc_waitforirq(void) if (ret != OK) { - err("sem_wait() failed\n"); + lcderr("ERROR: sem_wait() failed\n"); } } @@ -1519,17 +1519,17 @@ static int stm32_ltdc_lvalidatearea(FAR struct stm32_layer_s *layer, (srcypos > ypos + yres - 1)) { - gerr("layer coordinates out of valid area: xpos = %d > %d, \ - ypos = %d > %d, width = %d > %d, height = %d > %d, \ - srcxpos = %d > %d, srcypos = %d > %d", - xpos, vinfo->xres - 1, - ypos, vinfo->yres - 1, - xres, vinfo->xres - xpos, - yres, vinfo->yres - ypos, - srcxpos, xpos + xres - 1, - srcypos, ypos + yres - 1); + lcderr("ERROR: layer coordinates out of valid area: xpos = %d > %d, \ + ypos = %d > %d, width = %d > %d, height = %d > %d, \ + srcxpos = %d > %d, srcypos = %d > %d", + xpos, vinfo->xres - 1, + ypos, vinfo->yres - 1, + xres, vinfo->xres - xpos, + yres, vinfo->yres - ypos, + srcxpos, xpos + xres - 1, + srcypos, ypos + yres - 1); - gerr("Returning EINVAL\n"); + lcderr(" Returning EINVAL\n"); return -EINVAL; } @@ -1985,8 +1985,8 @@ static void stm32_ltdc_lclear(FAR struct stm32_layer_s *layer, uint8_t *dest = (uint8_t *)priv->pinfo.fbmem; int i; - ginfo("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n", - priv->pinfo.bpp, color, dest, priv->pinfo.fblen); + lcdinfo("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n", + priv->pinfo.bpp, color, dest, priv->pinfo.fblen); for (i = 0; i < priv->pinfo.fblen; i += sizeof(uint8_t)) { @@ -2003,8 +2003,8 @@ static void stm32_ltdc_lclear(FAR struct stm32_layer_s *layer, uint16_t *dest = (uint16_t *)priv->pinfo.fbmem; int i; - ginfo("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n", - priv->pinfo.bpp, color, dest, priv->pinfo.fblen); + lcdinfo("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n", + priv->pinfo.bpp, color, dest, priv->pinfo.fblen); for (i = 0; i < priv->pinfo.fblen; i += sizeof(uint16_t)) { @@ -2024,8 +2024,8 @@ static void stm32_ltdc_lclear(FAR struct stm32_layer_s *layer, uint8_t b; int i; - ginfo("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n", - priv->pinfo.bpp, color, dest, priv->pinfo.fblen); + lcdinfo("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n", + priv->pinfo.bpp, color, dest, priv->pinfo.fblen); r = (uint8_t) color; g = (uint8_t) (color >> 8); @@ -2048,8 +2048,8 @@ static void stm32_ltdc_lclear(FAR struct stm32_layer_s *layer, uint32_t *dest = (uint32_t *)priv->pinfo.fbmem; int i; - ginfo("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n", - priv->pinfo.bpp, color, dest, priv->pinfo.fblen); + lcdinfo("Clearing display: BPP=%d color=%04x framebuffer=%08x size=%d\n", + priv->pinfo.bpp, color, dest, priv->pinfo.fblen); for (i = 0; i < priv->pinfo.fblen; i += sizeof(uint32_t)) { @@ -2191,7 +2191,7 @@ static void stm32_ltdc_linit(int lid) static int stm32_getvideoinfo(struct fb_vtable_s *vtable, struct fb_videoinfo_s *vinfo) { - ginfo("vtable=%p vinfo=%p\n", vtable, vinfo); + lcdinfo("vtable=%p vinfo=%p\n", vtable, vinfo); if (vtable) { FAR struct ltdc_layer_s *ltdc; @@ -2203,7 +2203,7 @@ static int stm32_getvideoinfo(struct fb_vtable_s *vtable, return stm32_lgetvideoinfo(ltdc, vinfo); } - gerr("ERROR: Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -2226,7 +2226,7 @@ static int stm32_getvideoinfo(struct fb_vtable_s *vtable, static int stm32_getplaneinfo(struct fb_vtable_s *vtable, int planeno, struct fb_planeinfo_s *pinfo) { - ginfo("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo); + lcdinfo("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo); if (vtable) { FAR struct ltdc_layer_s *ltdc; @@ -2238,7 +2238,7 @@ static int stm32_getplaneinfo(struct fb_vtable_s *vtable, int planeno, return stm32_lgetplaneinfo(ltdc, planeno, pinfo); } - gerr("Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -2315,7 +2315,7 @@ static int stm32_putcmap(struct fb_vtable_s *vtable, static int stm32_lgetvideoinfo(struct ltdc_layer_s *layer, struct fb_videoinfo_s *vinfo) { - ginfo("layer=%p vinfo=%p\n", layer, vinfo); + lcdinfo("layer=%p vinfo=%p\n", layer, vinfo); FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer; if (stm32_ltdc_lvalidate(priv)) @@ -2325,7 +2325,7 @@ static int stm32_lgetvideoinfo(struct ltdc_layer_s *layer, return OK; } - gerr("Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -2349,16 +2349,16 @@ static int stm32_lgetvideoinfo(struct ltdc_layer_s *layer, static int stm32_lgetplaneinfo(struct ltdc_layer_s *layer, int planeno, struct fb_planeinfo_s *pinfo) { - ginfo("layer=%p planeno=%d pinfo=%p\n", layer, planeno, pinfo); FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer; + lcdinfo("layer=%p planeno=%d pinfo=%p\n", layer, planeno, pinfo); if (stm32_ltdc_lvalidate(priv) && planeno == 0) { memcpy(pinfo, &priv->state.pinfo, sizeof(struct fb_planeinfo_s)); return OK; } - gerr("Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -2384,9 +2384,10 @@ static int stm32_lgetplaneinfo(struct ltdc_layer_s *layer, int planeno, static int stm32_setclut(struct ltdc_layer_s *layer, const struct fb_cmap_s *cmap) { - int ret; FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer; - ginfo("layer=%p cmap=%p\n", layer, cmap); + int ret; + + lcdinfo("layer=%p cmap=%p\n", layer, cmap); if (stm32_ltdc_lvalidate(priv) && cmap) { @@ -2394,14 +2395,14 @@ static int stm32_setclut(struct ltdc_layer_s *layer, if (priv->state.vinfo.fmt != FB_FMT_RGB8) { - gerr("Error: CLUT is not supported for the pixel format: %d\n", - priv->state.vinfo.fmt); + lcderr("ERROR: CLUT is not supported for the pixel format: %d\n", + priv->state.vinfo.fmt); ret = -EINVAL; } else if (cmap->first >= STM32_LTDC_NCLUT) { - gerr("Error: only %d color table entries supported\n", - STM32_LTDC_NCLUT); + lcderr("ERROR: only %d color table entries supported\n", + STM32_LTDC_NCLUT); ret = -EINVAL; } else @@ -2418,7 +2419,7 @@ static int stm32_setclut(struct ltdc_layer_s *layer, return ret; } - gerr("Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -2442,9 +2443,10 @@ static int stm32_setclut(struct ltdc_layer_s *layer, static int stm32_getclut(struct ltdc_layer_s *layer, struct fb_cmap_s *cmap) { - int ret; FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer; - ginfo("layer=%p cmap=%p\n", layer, cmap); + int ret; + + lcdinfo("layer=%p cmap=%p\n", layer, cmap); if (priv == &LAYER_L1 || priv == &LAYER_L2) { @@ -2460,14 +2462,14 @@ static int stm32_getclut(struct ltdc_layer_s *layer, #else if (priv->state.vinfo.fmt != FB_FMT_RGB8) { - gerr("Error: CLUT is not supported for the pixel format: %d\n", - priv->state.vinfo.fmt); + lcderr("ERROR: CLUT is not supported for the pixel format: %d\n", + priv->state.vinfo.fmt); ret = -EINVAL; } else if (cmap->first >= STM32_LTDC_NCLUT) { - gerr("Error: only %d color table entries supported\n", - STM32_LTDC_NCLUT); + lcderr("ERROR: only %d color table entries supported\n", + STM32_LTDC_NCLUT); ret = -EINVAL; } else @@ -2512,7 +2514,7 @@ static int stm32_getclut(struct ltdc_layer_s *layer, return ret; } - gerr("Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } #endif /* STM32_LAYER_CLUT_SIZE */ @@ -2542,7 +2544,7 @@ static int stm32_getlid(FAR struct ltdc_layer_s *layer, int *lid, { FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer; - ginfo("flag = %08x\n", flag); + lcdinfo("flag = %08x\n", flag); if (stm32_ltdc_lvalidate(priv)) { @@ -2583,7 +2585,7 @@ static int stm32_getlid(FAR struct ltdc_layer_s *layer, int *lid, #endif default: ret = EINVAL; - gerr("Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); break; } @@ -2592,7 +2594,7 @@ static int stm32_getlid(FAR struct ltdc_layer_s *layer, int *lid, return ret; } - gerr("Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -2617,7 +2619,8 @@ static int stm32_getlid(FAR struct ltdc_layer_s *layer, int *lid, static int stm32_setcolor(FAR struct ltdc_layer_s *layer, uint32_t argb) { FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer; - ginfo("layer = %p, argb = %08x\n", layer, argb); + + lcdinfo("layer = %p, argb = %08x\n", layer, argb); if (stm32_ltdc_lvalidate(priv)) { @@ -2629,7 +2632,7 @@ static int stm32_setcolor(FAR struct ltdc_layer_s *layer, uint32_t argb) return OK; } - gerr("Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -2652,7 +2655,8 @@ static int stm32_setcolor(FAR struct ltdc_layer_s *layer, uint32_t argb) static int stm32_getcolor(FAR struct ltdc_layer_s *layer, uint32_t *argb) { FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer; - ginfo("layer = %p, argb = %p\n", layer, argb); + + lcdinfo("layer = %p, argb = %p\n", layer, argb); if (stm32_ltdc_lvalidate(priv)) { @@ -2663,7 +2667,7 @@ static int stm32_getcolor(FAR struct ltdc_layer_s *layer, uint32_t *argb) return OK; } - gerr("Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -2688,7 +2692,8 @@ static int stm32_getcolor(FAR struct ltdc_layer_s *layer, uint32_t *argb) static int stm32_setcolorkey(FAR struct ltdc_layer_s *layer, uint32_t rgb) { FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer; - ginfo("layer = %p, argb = %08x\n", layer, rgb); + + lcdinfo("layer = %p, argb = %08x\n", layer, rgb); if (stm32_ltdc_lvalidate(priv)) { @@ -2700,7 +2705,7 @@ static int stm32_setcolorkey(FAR struct ltdc_layer_s *layer, uint32_t rgb) return OK; } - gerr("Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -2723,7 +2728,8 @@ static int stm32_setcolorkey(FAR struct ltdc_layer_s *layer, uint32_t rgb) static int stm32_getcolorkey(FAR struct ltdc_layer_s *layer, uint32_t *rgb) { FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer; - ginfo("layer = %p, argb = %p\n", layer, rgb); + + lcdinfo("layer = %p, argb = %p\n", layer, rgb); if (stm32_ltdc_lvalidate(priv)) { @@ -2734,7 +2740,7 @@ static int stm32_getcolorkey(FAR struct ltdc_layer_s *layer, uint32_t *rgb) return OK; } - gerr("Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -2763,7 +2769,8 @@ static int stm32_getcolorkey(FAR struct ltdc_layer_s *layer, uint32_t *rgb) static int stm32_setalpha(FAR struct ltdc_layer_s *layer, uint8_t alpha) { FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer; - ginfo("layer = %p, alpha = %02x\n", layer, alpha); + + lcdinfo("layer = %p, alpha = %02x\n", layer, alpha); if (stm32_ltdc_lvalidate(priv)) { @@ -2775,7 +2782,7 @@ static int stm32_setalpha(FAR struct ltdc_layer_s *layer, uint8_t alpha) return OK; } - gerr("Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -2798,7 +2805,8 @@ static int stm32_setalpha(FAR struct ltdc_layer_s *layer, uint8_t alpha) static int stm32_getalpha(FAR struct ltdc_layer_s *layer, uint8_t *alpha) { FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer; - ginfo("layer = %p, alpha = %p\n", layer, alpha); + + lcdinfo("layer = %p, alpha = %p\n", layer, alpha); if (stm32_ltdc_lvalidate(priv)) { @@ -2809,7 +2817,7 @@ static int stm32_getalpha(FAR struct ltdc_layer_s *layer, uint8_t *alpha) return OK; } - gerr("Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -2856,8 +2864,9 @@ static int stm32_getalpha(FAR struct ltdc_layer_s *layer, uint8_t *alpha) static int stm32_setblendmode(FAR struct ltdc_layer_s *layer, uint32_t mode) { FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer; - uint32_t blendmode = mode; - ginfo("layer = %p, mode = %08x\n", layer, mode); + uint32_t blendmode = mode; + + lcdinfo("layer = %p, mode = %08x\n", layer, mode); if (stm32_ltdc_lvalidate(priv)) { @@ -2926,7 +2935,7 @@ static int stm32_setblendmode(FAR struct ltdc_layer_s *layer, uint32_t mode) } if (blendmode) { - gerr("Unknown blendmode %02x\n", blendmode); + lcderr("ERROR: Unknown blendmode %02x\n", blendmode); ret = -EINVAL; } @@ -2942,7 +2951,7 @@ static int stm32_setblendmode(FAR struct ltdc_layer_s *layer, uint32_t mode) return ret; } - gerr("Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -2964,7 +2973,8 @@ static int stm32_setblendmode(FAR struct ltdc_layer_s *layer, uint32_t mode) static int stm32_getblendmode(FAR struct ltdc_layer_s *layer, uint32_t *mode) { FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer; - ginfo("layer = %p, mode = %p\n", layer, mode); + + lcdinfo("layer = %p, mode = %p\n", layer, mode); if (stm32_ltdc_lvalidate(priv)) { @@ -2975,7 +2985,7 @@ static int stm32_getblendmode(FAR struct ltdc_layer_s *layer, uint32_t *mode) return OK; } - gerr("Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -3011,8 +3021,9 @@ static int stm32_setarea(FAR struct ltdc_layer_s *layer, fb_coord_t srcypos) { FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer; - ginfo("layer = %p, area = %p, srcxpos = %d, srcypos = %d\n", - layer, area, srcxpos, srcypos); + + lcdinfo("layer = %p, area = %p, srcxpos = %d, srcypos = %d\n", + layer, area, srcxpos, srcypos); if (stm32_ltdc_lvalidate(priv)) { @@ -3039,7 +3050,7 @@ static int stm32_setarea(FAR struct ltdc_layer_s *layer, return ret; } - gerr("Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -3066,8 +3077,9 @@ static int stm32_getarea(FAR struct ltdc_layer_s *layer, fb_coord_t *srcxpos, fb_coord_t *srcypos) { FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer; - ginfo("layer = %p, area = %p, srcxpos = %p, srcypos = %p\n", - layer, area, srcxpos, srcypos); + + lcdinfo("layer = %p, area = %p, srcxpos = %p, srcypos = %p\n", + layer, area, srcxpos, srcypos); if (stm32_ltdc_lvalidate(priv)) { @@ -3080,7 +3092,7 @@ static int stm32_getarea(FAR struct ltdc_layer_s *layer, return OK; } - gerr("Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -3131,7 +3143,7 @@ static int stm32_update(FAR struct ltdc_layer_s *layer, uint32_t mode) FAR struct stm32_layer_s *inactive = &LAYER(!g_lactive); #endif - ginfo("layer = %p, mode = %08x\n", layer, mode); + lcdinfo("layer = %p, mode = %08x\n", layer, mode); if (stm32_ltdc_lvalidate(priv)) { @@ -3156,7 +3168,7 @@ static int stm32_update(FAR struct ltdc_layer_s *layer, uint32_t mode) if (stm32_ltdc_waitforirq() != OK) { - gerr("Returning ECANCELED\n"); + lcderr("ERROR: Returning ECANCELED\n"); return -ECANCELED; } @@ -3238,7 +3250,7 @@ static int stm32_update(FAR struct ltdc_layer_s *layer, uint32_t mode) return OK; } - gerr("Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -3272,8 +3284,8 @@ static int stm32_blit(FAR struct ltdc_layer_s *dest, { FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)dest; - ginfo("dest = %p, destxpos = %d, destypos = %d, src = %p, srcarea = %p\n", - dest, destxpos, destypos, src, srcarea); + lcdinfo("dest = %p, destxpos = %d, destypos = %d, src = %p, srcarea = %p\n", + dest, destxpos, destypos, src, srcarea); if (stm32_ltdc_lvalidate(priv)) { @@ -3286,7 +3298,7 @@ static int stm32_blit(FAR struct ltdc_layer_s *dest, return ret; } - gerr("Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -3325,10 +3337,10 @@ static int stm32_blend(FAR struct ltdc_layer_s *dest, { FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)dest; - ginfo("dest=%p, destxpos=%d, destypos=%d, " - "fore=%p, forexpos=%d foreypos=%d, " - "back=%p, backarea=%p\n", - dest, destxpos, destypos, fore, forexpos, foreypos, back, backarea); + lcdinfo("dest=%p, destxpos=%d, destypos=%d, " + "fore=%p, forexpos=%d foreypos=%d, " + "back=%p, backarea=%p\n", + dest, destxpos, destypos, fore, forexpos, foreypos, back, backarea); if (stm32_ltdc_lvalidate(priv)) { @@ -3342,7 +3354,7 @@ static int stm32_blend(FAR struct ltdc_layer_s *dest, return ret; } - gerr("Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } @@ -3370,7 +3382,8 @@ static int stm32_fillarea(FAR struct ltdc_layer_s *layer, uint32_t color) { FAR struct stm32_layer_s *priv = (FAR struct stm32_layer_s *)layer; - ginfo("layer = %p, area = %p, color = %08x\n", layer, area, color); + + lcdinfo("layer = %p, area = %p, color = %08x\n", layer, area, color); if (stm32_ltdc_lvalidate(priv)) { @@ -3383,7 +3396,7 @@ static int stm32_fillarea(FAR struct ltdc_layer_s *layer, return ret; } - gerr("Returning EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); return -EINVAL; } #endif @@ -3407,13 +3420,14 @@ static int stm32_fillarea(FAR struct ltdc_layer_s *layer, FAR struct ltdc_layer_s *stm32_ltdcgetlayer(int lid) { - ginfo("lid: %d\n", lid); + lcdinfo("lid: %d\n", lid); + if (lid == LTDC_LAYER_L1 || lid == LTDC_LAYER_L2) { return (FAR struct ltdc_layer_s *) &LAYER(lid); } - gerr("EINVAL\n"); + lcderr("ERROR: Returning EINVAL\n"); errno = EINVAL; return NULL; } @@ -3436,7 +3450,7 @@ int stm32_ltdcinitialize(void) int ret; #endif - err("Initialize LTDC driver\n"); + lcdinfo("Initialize LTDC driver\n"); if (g_initialized == true) { @@ -3447,16 +3461,16 @@ int stm32_ltdcinitialize(void) stm32_lcd_enable(false); - ginfo("Configuring the LCD controller\n"); + lcdinfo("Configuring the LCD controller\n"); /* Configure LCD periphery */ - ginfo("Configure lcd periphery\n"); + lcdinfo("Configure lcd periphery\n"); stm32_ltdc_periphconfig(); /* Configure global ltdc register */ - ginfo("Configure global register\n"); + lcdinfo("Configure global register\n"); stm32_global_configure(); #ifdef CONFIG_STM32_DMA2D @@ -3472,7 +3486,7 @@ int stm32_ltdcinitialize(void) /* Initialize ltdc layer */ - ginfo("Initialize ltdc layer\n"); + lcdinfo("Initialize ltdc layer\n"); stm32_ltdc_linit(LTDC_LAYER_L1); #ifdef CONFIG_STM32_LTDC_L2 stm32_ltdc_linit(LTDC_LAYER_L2); @@ -3493,12 +3507,12 @@ int stm32_ltdcinitialize(void) /* Reload shadow register */ - ginfo("Reload shadow register\n"); + lcdinfo("Reload shadow register\n"); stm32_ltdc_reload(LTDC_SRCR_IMR, false); /* Turn the LCD on */ - ginfo("Enabling the display\n"); + lcdinfo("Enabling the display\n"); stm32_lcd_enable(true); /* Set initialized state */ @@ -3524,7 +3538,7 @@ int stm32_ltdcinitialize(void) struct fb_vtable_s *stm32_ltdcgetvplane(int vplane) { - ginfo("vplane: %d\n", vplane); + lcdinfo("vplane: %d\n", vplane); if (vplane == 0) { @@ -3600,6 +3614,6 @@ void stm32_backlight(bool blon) { /* Set default backlight level CONFIG_STM32_LTDC_DEFBACKLIGHT */ - gerr("Not supported\n"); + lcderr("ERROR: Not supported\n"); } #endif diff --git a/arch/arm/src/stm32/stm32_otgfsdev.c b/arch/arm/src/stm32/stm32_otgfsdev.c index 8481142f88d..2d7912ac7b2 100644 --- a/arch/arm/src/stm32/stm32_otgfsdev.c +++ b/arch/arm/src/stm32/stm32_otgfsdev.c @@ -81,6 +81,10 @@ # define CONFIG_USBDEV_MAXPOWER 100 /* mA */ #endif +#ifndef CONFIG_DEBUG_USB_INFO +# undef CONFIG_STM32_USBDEV_REGDEBUG +#endif + /* There is 1.25Kb of FIFO memory. The default partitions this memory * so that there is a TxFIFO allocated for each endpoint and with more * memory provided for the common RxFIFO. A more knowledge-able @@ -472,7 +476,7 @@ struct stm32_usbdev_s /* Register operations ********************************************************/ -#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES) +#ifdef CONFIG_STM32_USBDEV_REGDEBUG static uint32_t stm32_getreg(uint32_t addr); static void stm32_putreg(uint32_t val, uint32_t addr); #else @@ -792,7 +796,7 @@ const struct trace_msg_t g_usb_trace_strings_intdecode[] = * ****************************************************************************/ -#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES) +#ifdef CONFIG_STM32_USBDEV_REGDEBUG static uint32_t stm32_getreg(uint32_t addr) { static uint32_t prevaddr = 0; @@ -813,7 +817,7 @@ static uint32_t stm32_getreg(uint32_t addr) { if (count == 4) { - llerr("...\n"); + usbinfo("...\n"); } return val; @@ -830,7 +834,7 @@ static uint32_t stm32_getreg(uint32_t addr) { /* Yes.. then show how many times the value repeated */ - llerr("[repeats %d more times]\n", count-3); + usbinfo("[repeats %d more times]\n", count-3); } /* Save the new address, value, and count */ @@ -842,7 +846,7 @@ static uint32_t stm32_getreg(uint32_t addr) /* Show the register value read */ - llerr("%08x->%08x\n", addr, val); + usbinfo("%08x->%08x\n", addr, val); return val; } #endif @@ -855,12 +859,12 @@ static uint32_t stm32_getreg(uint32_t addr) * ****************************************************************************/ -#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES) +#ifdef CONFIG_STM32_USBDEV_REGDEBUG static void stm32_putreg(uint32_t val, uint32_t addr) { /* Show the register value being written */ - llerr("%08x<-%08x\n", addr, val); + usbinfo("%08x<-%08x\n", addr, val); /* Write the value */ @@ -2625,7 +2629,7 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv) if ((daint & 1) != 0) { regval = stm32_getreg(STM32_OTGFS_DOEPINT(epno)); - ullerr("DOEPINT(%d) = %08x\n", epno, regval); + ullinfo("DOEPINT(%d) = %08x\n", epno, regval); stm32_putreg(0xFF, STM32_OTGFS_DOEPINT(epno)); } @@ -2855,8 +2859,8 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv) { if ((daint & 1) != 0) { - ullerr("DIEPINT(%d) = %08x\n", - epno, stm32_getreg(STM32_OTGFS_DIEPINT(epno))); + ullinfo("DIEPINT(%d) = %08x\n", + epno, stm32_getreg(STM32_OTGFS_DIEPINT(epno))); stm32_putreg(0xFF, STM32_OTGFS_DIEPINT(epno)); } @@ -3801,7 +3805,7 @@ static int stm32_epout_configure(FAR struct stm32_ep_s *privep, uint8_t eptype, break; default: - uerr("Unsupported maxpacket: %d\n", maxpacket); + uerr("ERROR: Unsupported maxpacket: %d\n", maxpacket); return -EINVAL; } } @@ -3896,7 +3900,7 @@ static int stm32_epin_configure(FAR struct stm32_ep_s *privep, uint8_t eptype, break; default: - uerr("Unsupported maxpacket: %d\n", maxpacket); + uerr("ERROR: Unsupported maxpacket: %d\n", maxpacket); return -EINVAL; } } @@ -5447,7 +5451,7 @@ void up_usbinitialize(void) ret = irq_attach(STM32_IRQ_OTGFS, stm32_usbinterrupt); if (ret < 0) { - uerr("irq_attach failed\n", ret); + uerr("ERROR: irq_attach failed\n", ret); goto errout; } diff --git a/arch/arm/src/stm32/stm32_otgfshost.c b/arch/arm/src/stm32/stm32_otgfshost.c index 912919a9406..632ba36287f 100644 --- a/arch/arm/src/stm32/stm32_otgfshost.c +++ b/arch/arm/src/stm32/stm32_otgfshost.c @@ -130,7 +130,7 @@ /* Register/packet debug depends on CONFIG_DEBUG_FEATURES */ -#ifndef CONFIG_DEBUG_FEATURES +#ifndef CONFIG_DEBUG_USB_INFO # undef CONFIG_STM32_USBHOST_REGDEBUG # undef CONFIG_STM32_USBHOST_PKTDUMP #endif @@ -506,7 +506,7 @@ static struct usbhost_connection_s g_usbconn = #ifdef CONFIG_STM32_USBHOST_REGDEBUG static void stm32_printreg(uint32_t addr, uint32_t val, bool iswrite) { - llerr("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val); + usbinfo("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val); } #endif @@ -556,7 +556,7 @@ static void stm32_checkreg(uint32_t addr, uint32_t val, bool iswrite) { /* No.. More than one. */ - llerr("[repeats %d more times]\n", count); + usbinfo("[repeats %d more times]\n", count); } } diff --git a/arch/arm/src/stm32/stm32_otghsdev.c b/arch/arm/src/stm32/stm32_otghsdev.c index 64b53eec4cd..c8d146373a4 100644 --- a/arch/arm/src/stm32/stm32_otghsdev.c +++ b/arch/arm/src/stm32/stm32_otghsdev.c @@ -81,6 +81,10 @@ # define CONFIG_USBDEV_MAXPOWER 100 /* mA */ #endif +#ifndef CONFIG_DEBUG_USB_INFO +# undef CONFIG_STM32_USBDEV_REGDEBUG +#endif + /* There is 1.25Kb of FIFO memory. The default partitions this memory * so that there is a TxFIFO allocated for each endpoint and with more * memory provided for the common RxFIFO. A more knowledge-able @@ -472,7 +476,7 @@ struct stm32_usbdev_s /* Register operations ********************************************************/ -#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES) +#ifdef CONFIG_STM32_USBDEV_REGDEBUG static uint32_t stm32_getreg(uint32_t addr); static void stm32_putreg(uint32_t val, uint32_t addr); #else @@ -792,7 +796,7 @@ const struct trace_msg_t g_usb_trace_strings_intdecode[] = * ****************************************************************************/ -#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES) +#ifdef CONFIG_STM32_USBDEV_REGDEBUG static uint32_t stm32_getreg(uint32_t addr) { static uint32_t prevaddr = 0; @@ -813,7 +817,7 @@ static uint32_t stm32_getreg(uint32_t addr) { if (count == 4) { - llerr("...\n"); + usbinfo("...\n"); } return val; @@ -830,7 +834,7 @@ static uint32_t stm32_getreg(uint32_t addr) { /* Yes.. then show how many times the value repeated */ - llerr("[repeats %d more times]\n", count-3); + usbinfo("[repeats %d more times]\n", count-3); } /* Save the new address, value, and count */ @@ -842,7 +846,7 @@ static uint32_t stm32_getreg(uint32_t addr) /* Show the register value read */ - llerr("%08x->%08x\n", addr, val); + usbinfo("%08x->%08x\n", addr, val); return val; } #endif @@ -855,12 +859,12 @@ static uint32_t stm32_getreg(uint32_t addr) * ****************************************************************************/ -#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES) +#ifdef CONFIG_STM32_USBDEV_REGDEBUG static void stm32_putreg(uint32_t val, uint32_t addr) { /* Show the register value being written */ - llerr("%08x<-%08x\n", addr, val); + usbinfo("%08x<-%08x\n", addr, val); /* Write the value */ @@ -2625,7 +2629,7 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv) if ((daint & 1) != 0) { regval = stm32_getreg(STM32_OTGHS_DOEPINT(epno)); - ullerr("DOEPINT(%d) = %08x\n", epno, regval); + ulinfo("("DOEPINT(%d) = %08x\n", epno, regval); stm32_putreg(0xFF, STM32_OTGHS_DOEPINT(epno)); } @@ -2855,7 +2859,7 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv) { if ((daint & 1) != 0) { - ullerr("DIEPINT(%d) = %08x\n", + ulinfo("("DIEPINT(%d) = %08x\n", epno, stm32_getreg(STM32_OTGHS_DIEPINT(epno))); stm32_putreg(0xFF, STM32_OTGHS_DIEPINT(epno)); } @@ -3801,7 +3805,7 @@ static int stm32_epout_configure(FAR struct stm32_ep_s *privep, uint8_t eptype, break; default: - uerr("Unsupported maxpacket: %d\n", maxpacket); + uerr("ERROR: Unsupported maxpacket: %d\n", maxpacket); return -EINVAL; } } @@ -3896,7 +3900,7 @@ static int stm32_epin_configure(FAR struct stm32_ep_s *privep, uint8_t eptype, break; default: - uerr("Unsupported maxpacket: %d\n", maxpacket); + uerr("ERROR: Unsupported maxpacket: %d\n", maxpacket); return -EINVAL; } } @@ -5436,7 +5440,7 @@ void up_usbinitialize(void) ret = irq_attach(STM32_IRQ_OTGHS, stm32_usbinterrupt); if (ret < 0) { - uerr("irq_attach failed\n", ret); + uerr("ERROR: irq_attach failed\n", ret); goto errout; } diff --git a/arch/arm/src/stm32/stm32_otghshost.c b/arch/arm/src/stm32/stm32_otghshost.c index b93e185c961..42a68f65338 100644 --- a/arch/arm/src/stm32/stm32_otghshost.c +++ b/arch/arm/src/stm32/stm32_otghshost.c @@ -130,7 +130,7 @@ /* Register/packet debug depends on CONFIG_DEBUG_FEATURES */ -#ifndef CONFIG_DEBUG_FEATURES +#ifndef CONFIG_DEBUG_USB_INFO # undef CONFIG_STM32_USBHOST_REGDEBUG # undef CONFIG_STM32_USBHOST_PKTDUMP #endif @@ -506,7 +506,7 @@ static struct usbhost_connection_s g_usbconn = #ifdef CONFIG_STM32_USBHOST_REGDEBUG static void stm32_printreg(uint32_t addr, uint32_t val, bool iswrite) { - llerr("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val); + usbinfo("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val); } #endif @@ -556,7 +556,7 @@ static void stm32_checkreg(uint32_t addr, uint32_t val, bool iswrite) { /* No.. More than one. */ - llerr("[repeats %d more times]\n", count); + usbinfo("[repeats %d more times]\n", count); } } diff --git a/arch/arm/src/stm32/stm32_pwm.c b/arch/arm/src/stm32/stm32_pwm.c index 77534effa83..36f4aa4c134 100644 --- a/arch/arm/src/stm32/stm32_pwm.c +++ b/arch/arm/src/stm32/stm32_pwm.c @@ -1190,7 +1190,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, break; default: - pwmerr("No such timer mode: %u\n", (unsigned int)priv->mode); + pwmerr("ERROR: No such timer mode: %u\n", (unsigned int)priv->mode); return -EINVAL; } } @@ -1317,7 +1317,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, if (j >= PWM_NCHANNELS) { - pwmerr("No such channel: %u\n", channel); + pwmerr("ERROR: No such channel: %u\n", channel); return -EINVAL; } #else @@ -1368,7 +1368,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, #endif default: - pwmerr("No such mode: %u\n", (unsigned int)mode); + pwmerr("ERROR: No such mode: %u\n", (unsigned int)mode); return -EINVAL; } @@ -1475,7 +1475,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, break; default: - pwmerr("No such channel: %u\n", channel); + pwmerr("ERROR: No such channel: %u\n", channel); return -EINVAL; } } @@ -1688,7 +1688,7 @@ static int pwm_update_duty(FAR struct stm32_pwmtimer_s *priv, uint8_t channel, break; default: - pwmerr("No such channel: %u\n", channel); + pwmerr("ERROR: No such channel: %u\n", channel); return -EINVAL; } @@ -2508,7 +2508,7 @@ FAR struct pwm_lowerhalf_s *stm32_pwminitialize(int timer) #endif default: - pwmerr("No such timer configured\n"); + pwmerr("ERROR: No such timer configured\n"); return NULL; } diff --git a/arch/arm/src/stm32/stm32_qencoder.c b/arch/arm/src/stm32/stm32_qencoder.c index 584ea46a47a..7d87debe334 100644 --- a/arch/arm/src/stm32/stm32_qencoder.c +++ b/arch/arm/src/stm32/stm32_qencoder.c @@ -1270,7 +1270,7 @@ int stm32_qeinitialize(FAR const char *devpath, int tim) priv = stm32_tim2lower(tim); if (!priv) { - snerr("TIM%d support not configured\n", tim); + snerr("ERROR: TIM%d support not configured\n", tim); return -ENXIO; } @@ -1278,7 +1278,7 @@ int stm32_qeinitialize(FAR const char *devpath, int tim) if (priv->inuse) { - snerr("TIM%d is in-used\n", tim); + snerr("ERROR: TIM%d is in-use\n", tim); return -EBUSY; } @@ -1287,7 +1287,7 @@ int stm32_qeinitialize(FAR const char *devpath, int tim) ret = qe_register(devpath, (FAR struct qe_lowerhalf_s *)priv); if (ret < 0) { - snerr("qe_register failed: %d\n", ret); + snerr("ERROR: qe_register failed: %d\n", ret); return ret; } diff --git a/arch/arm/src/stm32/stm32_rtcc.c b/arch/arm/src/stm32/stm32_rtcc.c index 602ff7099df..bbb2137ab72 100644 --- a/arch/arm/src/stm32/stm32_rtcc.c +++ b/arch/arm/src/stm32/stm32_rtcc.c @@ -711,13 +711,13 @@ int up_rtc_initialize(void) { case OK: { - rtcllerr("rtc_syncwait() okay\n"); + rtcllinfo("rtc_syncwait() okay\n"); break; } default: { - rtcllerr("rtc_syncwait() failed (%d)\n", ret); + rtcllerr("ERROR: rtc_syncwait() failed (%d)\n", ret); break; } } @@ -731,7 +731,7 @@ int up_rtc_initialize(void) if (regval != RTC_MAGIC) { - rtcllerr("Do setup\n"); + rtcllinfo("Do setup\n"); /* Perform the one-time setup of the LSE clocking to the RTC */ @@ -749,7 +749,7 @@ int up_rtc_initialize(void) } else { - rtcllerr("Do resume\n"); + rtcllinfo("Do resume\n"); /* RTC already set-up, just resume normal operation */ @@ -765,7 +765,7 @@ int up_rtc_initialize(void) if (ret != OK && nretry > 0) { - rtcllerr("setup/resume ran %d times and failed with %d\n", + rtcllinfo("setup/resume ran %d times and failed with %d\n", nretry, ret); return -ETIMEDOUT; } diff --git a/arch/arm/src/stm32/stm32_sdio.c b/arch/arm/src/stm32/stm32_sdio.c index 7fdf1c6caef..d1317e611eb 100644 --- a/arch/arm/src/stm32/stm32_sdio.c +++ b/arch/arm/src/stm32/stm32_sdio.c @@ -139,7 +139,7 @@ # undef CONFIG_SDIO_DMAPRIO #endif -#if !defined(CONFIG_DEBUG_FS) || !defined(CONFIG_DEBUG_FEATURES) +#ifndef CONFIG_DEBUG_MEMCARD_INFO # undef CONFIG_SDIO_XFRDEBUG #endif @@ -596,7 +596,7 @@ static inline void stm32_setclkcr(uint32_t clkcr) regval |= clkcr; putreg32(regval, STM32_SDIO_CLKCR); - finfo("CLKCR: %08x PWR: %08x\n", + mcinfo("CLKCR: %08x PWR: %08x\n", getreg32(STM32_SDIO_CLKCR), getreg32(STM32_SDIO_POWER)); } @@ -812,16 +812,16 @@ static void stm32_sample(struct stm32_dev_s *priv, int index) #ifdef CONFIG_SDIO_XFRDEBUG static void stm32_sdiodump(struct stm32_sdioregs_s *regs, const char *msg) { - ferr("SDIO Registers: %s\n", msg); - ferr(" POWER[%08x]: %08x\n", STM32_SDIO_POWER, regs->power); - ferr(" CLKCR[%08x]: %08x\n", STM32_SDIO_CLKCR, regs->clkcr); - ferr(" DCTRL[%08x]: %08x\n", STM32_SDIO_DCTRL, regs->dctrl); - ferr(" DTIMER[%08x]: %08x\n", STM32_SDIO_DTIMER, regs->dtimer); - ferr(" DLEN[%08x]: %08x\n", STM32_SDIO_DLEN, regs->dlen); - ferr(" DCOUNT[%08x]: %08x\n", STM32_SDIO_DCOUNT, regs->dcount); - ferr(" STA[%08x]: %08x\n", STM32_SDIO_STA, regs->sta); - ferr(" MASK[%08x]: %08x\n", STM32_SDIO_MASK, regs->mask); - ferr("FIFOCNT[%08x]: %08x\n", STM32_SDIO_FIFOCNT, regs->fifocnt); + mcinfo("SDIO Registers: %s\n", msg); + mcinfo(" POWER[%08x]: %08x\n", STM32_SDIO_POWER, regs->power); + mcinfo(" CLKCR[%08x]: %08x\n", STM32_SDIO_CLKCR, regs->clkcr); + mcinfo(" DCTRL[%08x]: %08x\n", STM32_SDIO_DCTRL, regs->dctrl); + mcinfo(" DTIMER[%08x]: %08x\n", STM32_SDIO_DTIMER, regs->dtimer); + mcinfo(" DLEN[%08x]: %08x\n", STM32_SDIO_DLEN, regs->dlen); + mcinfo(" DCOUNT[%08x]: %08x\n", STM32_SDIO_DCOUNT, regs->dcount); + mcinfo(" STA[%08x]: %08x\n", STM32_SDIO_STA, regs->sta); + mcinfo(" MASK[%08x]: %08x\n", STM32_SDIO_MASK, regs->mask); + mcinfo("FIFOCNT[%08x]: %08x\n", STM32_SDIO_FIFOCNT, regs->fifocnt); } #endif @@ -907,7 +907,7 @@ static void stm32_dmacallback(DMA_HANDLE handle, uint8_t status, void *arg) if ((status & DMA_STATUS_ERROR) != 0) { - fllerr("DMA error %02x, remaining: %d\n", status, priv->remaining); + mcllerr("ERROR: DMA error %02x, remaining: %d\n", status, priv->remaining); result = SDIOWAIT_ERROR; } else @@ -1172,7 +1172,7 @@ static void stm32_eventtimeout(int argc, uint32_t arg) /* Yes.. wake up any waiting threads */ stm32_endwait(priv, SDIOWAIT_TIMEOUT); - fllerr("Timeout: remaining: %d\n", priv->remaining); + mcllerr("ERROR: Timeout, remaining: %d\n", priv->remaining); } } @@ -1412,7 +1412,7 @@ static int stm32_interrupt(int irq, void *context) { /* Terminate the transfer with an error */ - fllerr("ERROR: Data block CRC failure, remaining: %d\n", priv->remaining); + mcllerr("ERROR: Data block CRC failure, remaining: %d\n", priv->remaining); stm32_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR); } @@ -1422,7 +1422,7 @@ static int stm32_interrupt(int irq, void *context) { /* Terminate the transfer with an error */ - fllerr("ERROR: Data timeout, remaining: %d\n", priv->remaining); + mcllerr("ERROR: Data timeout, remaining: %d\n", priv->remaining); stm32_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT); } @@ -1432,7 +1432,7 @@ static int stm32_interrupt(int irq, void *context) { /* Terminate the transfer with an error */ - fllerr("ERROR: RX FIFO overrun, remaining: %d\n", priv->remaining); + mcllerr("ERROR: RX FIFO overrun, remaining: %d\n", priv->remaining); stm32_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR); } @@ -1442,7 +1442,7 @@ static int stm32_interrupt(int irq, void *context) { /* Terminate the transfer with an error */ - fllerr("ERROR: TX FIFO underrun, remaining: %d\n", priv->remaining); + mcllerr("ERROR: TX FIFO underrun, remaining: %d\n", priv->remaining); stm32_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR); } @@ -1452,7 +1452,7 @@ static int stm32_interrupt(int irq, void *context) { /* Terminate the transfer with an error */ - fllerr("ERROR: Start bit, remaining: %d\n", priv->remaining); + mcllerr("ERROR: Start bit, remaining: %d\n", priv->remaining); stm32_endtransfer(priv, SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR); } } @@ -1588,8 +1588,8 @@ static void stm32_reset(FAR struct sdio_dev_s *dev) stm32_setpwrctrl(SDIO_POWER_PWRCTRL_ON); leave_critical_section(flags); - finfo("CLCKR: %08x POWER: %08x\n", - getreg32(STM32_SDIO_CLKCR), getreg32(STM32_SDIO_POWER)); + mcinfo("CLCKR: %08x POWER: %08x\n", + getreg32(STM32_SDIO_CLKCR), getreg32(STM32_SDIO_POWER)); } /**************************************************************************** @@ -1801,7 +1801,7 @@ static int stm32_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t arg) cmdidx = (cmd & MMCSD_CMDIDX_MASK) >> MMCSD_CMDIDX_SHIFT; regval |= cmdidx | SDIO_CMD_CPSMEN; - finfo("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval); + mcinfo("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval); /* Write the SDIO CMD */ @@ -2031,7 +2031,7 @@ static int stm32_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd) { if (--timeout <= 0) { - ferr("ERROR: Timeout cmd: %08x events: %08x STA: %08x\n", + mcerr("ERROR: Timeout cmd: %08x events: %08x STA: %08x\n", cmd, events, getreg32(STM32_SDIO_STA)); return -ETIMEDOUT; @@ -2066,7 +2066,7 @@ static int stm32_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd) static int stm32_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t *rshort) { -#ifdef CONFIG_DEBUG_FEATURES +#ifdef CONFIG_DEBUG_MEMCARD_INFO uint32_t respcmd; #endif uint32_t regval; @@ -2095,10 +2095,10 @@ static int stm32_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t */ -#ifdef CONFIG_DEBUG_FEATURES +#ifdef CONFIG_DEBUG_MEMCARD_INFO if (!rshort) { - ferr("ERROR: rshort=NULL\n"); + mcerr("ERROR: rshort=NULL\n"); ret = -EINVAL; } @@ -2108,7 +2108,7 @@ static int stm32_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R1B_RESPONSE && (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R6_RESPONSE) { - ferr("ERROR: Wrong response CMD=%08x\n", cmd); + mcerr("ERROR: Wrong response CMD=%08x\n", cmd); ret = -EINVAL; } else @@ -2119,15 +2119,15 @@ static int stm32_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t regval = getreg32(STM32_SDIO_STA); if ((regval & SDIO_STA_CTIMEOUT) != 0) { - ferr("ERROR: Command timeout: %08x\n", regval); + mcerr("ERROR: Command timeout: %08x\n", regval); ret = -ETIMEDOUT; } else if ((regval & SDIO_STA_CCRCFAIL) != 0) { - ferr("ERROR: CRC failure: %08x\n", regval); + mcerr("ERROR: CRC failure: %08x\n", regval); ret = -EIO; } -#ifdef CONFIG_DEBUG_FEATURES +#ifdef CONFIG_DEBUG_MEMCARD_INFO else { /* Check response received is of desired command */ @@ -2135,7 +2135,7 @@ static int stm32_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t respcmd = getreg32(STM32_SDIO_RESPCMD); if ((uint8_t)(respcmd & SDIO_RESPCMD_MASK) != (cmd & MMCSD_CMDIDX_MASK)) { - ferr("ERROR: RESCMD=%02x CMD=%08x\n", respcmd, cmd); + mcerr("ERROR: RESCMD=%02x CMD=%08x\n", respcmd, cmd); ret = -EINVAL; } } @@ -2163,12 +2163,12 @@ static int stm32_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t rlo * 0 1 End bit */ -#ifdef CONFIG_DEBUG_FEATURES +#ifdef CONFIG_DEBUG_MEMCARD_INFO /* Check that R1 is the correct response to this command */ if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R2_RESPONSE) { - ferr("ERROR: Wrong response CMD=%08x\n", cmd); + mcerr("ERROR: Wrong response CMD=%08x\n", cmd); ret = -EINVAL; } else @@ -2179,12 +2179,12 @@ static int stm32_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t rlo regval = getreg32(STM32_SDIO_STA); if (regval & SDIO_STA_CTIMEOUT) { - ferr("ERROR: Timeout STA: %08x\n", regval); + mcerr("ERROR: Timeout STA: %08x\n", regval); ret = -ETIMEDOUT; } else if (regval & SDIO_STA_CCRCFAIL) { - ferr("ERROR: CRC fail STA: %08x\n", regval); + mcerr("ERROR: CRC fail STA: %08x\n", regval); ret = -EIO; } } @@ -2218,11 +2218,11 @@ static int stm32_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t *r /* Check that this is the correct response to this command */ -#ifdef CONFIG_DEBUG_FEATURES +#ifdef CONFIG_DEBUG_MEMCARD_INFO if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R3_RESPONSE && (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R7_RESPONSE) { - ferr("ERROR: Wrong response CMD=%08x\n", cmd); + mcerr("ERROR: Wrong response CMD=%08x\n", cmd); ret = -EINVAL; } else @@ -2235,7 +2235,7 @@ static int stm32_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t *r regval = getreg32(STM32_SDIO_STA); if (regval & SDIO_STA_CTIMEOUT) { - ferr("ERROR: Timeout STA: %08x\n", regval); + mcerr("ERROR: Timeout STA: %08x\n", regval); ret = -ETIMEDOUT; } } @@ -2390,7 +2390,7 @@ static sdio_eventset_t stm32_eventwait(FAR struct sdio_dev_s *dev, 1, (uint32_t)priv); if (ret != OK) { - ferr("ERROR: wd_start failed: %d\n", ret); + mcerr("ERROR: wd_start failed: %d\n", ret); } } @@ -2477,7 +2477,7 @@ static void stm32_callbackenable(FAR struct sdio_dev_s *dev, { struct stm32_dev_s *priv = (struct stm32_dev_s *)dev; - finfo("eventset: %02x\n", eventset); + mcinfo("eventset: %02x\n", eventset); DEBUGASSERT(priv != NULL); priv->cbevents = eventset; @@ -2513,7 +2513,7 @@ static int stm32_registercallback(FAR struct sdio_dev_s *dev, /* Disable callbacks and register this callback and is argument */ - finfo("Register %p(%p)\n", callback, arg); + mcinfo("Register %p(%p)\n", callback, arg); DEBUGASSERT(priv != NULL); priv->cbevents = 0; @@ -2749,8 +2749,8 @@ static void stm32_callback(void *arg) /* Is a callback registered? */ DEBUGASSERT(priv != NULL); - finfo("Callback %p(%p) cbevents: %02x cdstatus: %02x\n", - priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus); + mcinfo("Callback %p(%p) cbevents: %02x cdstatus: %02x\n", + priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus); if (priv->callback) { @@ -2794,14 +2794,14 @@ static void stm32_callback(void *arg) { /* Yes.. queue it */ - finfo("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg); + mcinfo("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg); (void)work_queue(HPWORK, &priv->cbwork, (worker_t)priv->callback, priv->cbarg, 0); } else { /* No.. then just call the callback here */ - finfo("Callback to %p(%p)\n", priv->callback, priv->cbarg); + mcinfo("Callback to %p(%p)\n", priv->callback, priv->cbarg); priv->callback(priv->cbarg); } } @@ -2931,7 +2931,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot) leave_critical_section(flags); - finfo("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus); + mcinfo("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus); /* Perform any requested callback if the status has changed */ @@ -2973,7 +2973,8 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect) { priv->cdstatus &= ~SDIO_STATUS_WRPROTECTED; } - finfo("cdstatus: %02x\n", priv->cdstatus); + + mcinfo("cdstatus: %02x\n", priv->cdstatus); leave_critical_section(flags); } #endif /* CONFIG_STM32_SDIO */ diff --git a/arch/arm/src/stm32/stm32_usbdev.c b/arch/arm/src/stm32/stm32_usbdev.c index b219a93e6c2..ec8be78bccd 100644 --- a/arch/arm/src/stm32/stm32_usbdev.c +++ b/arch/arm/src/stm32/stm32_usbdev.c @@ -103,7 +103,7 @@ * enabled. */ -#ifndef CONFIG_DEBUG_FEATURES +#ifndef CONFIG_DEBUG_USB_INFO # undef CONFIG_STM32_USBDEV_REGDEBUG #endif @@ -388,7 +388,7 @@ struct stm32_usbdev_s /* Register operations ******************************************************/ -#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES) +#ifdef CONFIG_STM32_USBDEV_REGDEBUG static uint16_t stm32_getreg(uint32_t addr); static void stm32_putreg(uint16_t val, uint32_t addr); static void stm32_checksetup(void); @@ -648,11 +648,12 @@ const struct trace_msg_t g_usb_trace_strings_deverror[] = /**************************************************************************** * Register Operations ****************************************************************************/ + /**************************************************************************** * Name: stm32_getreg ****************************************************************************/ -#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES) +#ifdef CONFIG_STM32_USBDEV_REGDEBUG static uint16_t stm32_getreg(uint32_t addr) { static uint32_t prevaddr = 0; @@ -673,7 +674,7 @@ static uint16_t stm32_getreg(uint32_t addr) { if (count == 4) { - llerr("...\n"); + usbinfo("...\n"); } return val; } @@ -689,7 +690,7 @@ static uint16_t stm32_getreg(uint32_t addr) { /* Yes.. then show how many times the value repeated */ - llerr("[repeats %d more times]\n", count-3); + usbinfo("[repeats %d more times]\n", count-3); } /* Save the new address, value, and count */ @@ -701,7 +702,7 @@ static uint16_t stm32_getreg(uint32_t addr) /* Show the register value read */ - llerr("%08x->%04x\n", addr, val); + usbinfo("%08x->%04x\n", addr, val); return val; } #endif @@ -710,12 +711,12 @@ static uint16_t stm32_getreg(uint32_t addr) * Name: stm32_putreg ****************************************************************************/ -#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES) +#ifdef CONFIG_STM32_USBDEV_REGDEBUG static void stm32_putreg(uint16_t val, uint32_t addr) { /* Show the register value being written */ - llerr("%08x<-%04x\n", addr, val); + usbinfo("%08x<-%04x\n", addr, val); /* Write the value */ @@ -727,42 +728,42 @@ static void stm32_putreg(uint16_t val, uint32_t addr) * Name: stm32_dumpep ****************************************************************************/ -#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES) +#ifdef CONFIG_STM32_USBDEV_REGDEBUG static void stm32_dumpep(int epno) { uint32_t addr; /* Common registers */ - llerr("CNTR: %04x\n", getreg16(STM32_USB_CNTR)); - llerr("ISTR: %04x\n", getreg16(STM32_USB_ISTR)); - llerr("FNR: %04x\n", getreg16(STM32_USB_FNR)); - llerr("DADDR: %04x\n", getreg16(STM32_USB_DADDR)); - llerr("BTABLE: %04x\n", getreg16(STM32_USB_BTABLE)); + usbinfo("CNTR: %04x\n", getreg16(STM32_USB_CNTR)); + usbinfo("ISTR: %04x\n", getreg16(STM32_USB_ISTR)); + usbinfo("FNR: %04x\n", getreg16(STM32_USB_FNR)); + usbinfo("DADDR: %04x\n", getreg16(STM32_USB_DADDR)); + usbinfo("BTABLE: %04x\n", getreg16(STM32_USB_BTABLE)); /* Endpoint register */ addr = STM32_USB_EPR(epno); - llerr("EPR%d: [%08x] %04x\n", epno, addr, getreg16(addr)); + usbinfo("EPR%d: [%08x] %04x\n", epno, addr, getreg16(addr)); /* Endpoint descriptor */ addr = STM32_USB_BTABLE_ADDR(epno, 0); - llerr("DESC: %08x\n", addr); + usbinfo("DESC: %08x\n", addr); /* Endpoint buffer descriptor */ addr = STM32_USB_ADDR_TX(epno); - llerr(" TX ADDR: [%08x] %04x\n", addr, getreg16(addr)); + usbinfo(" TX ADDR: [%08x] %04x\n", addr, getreg16(addr)); addr = STM32_USB_COUNT_TX(epno); - llerr(" COUNT: [%08x] %04x\n", addr, getreg16(addr)); + usbinfo(" COUNT: [%08x] %04x\n", addr, getreg16(addr)); addr = STM32_USB_ADDR_RX(epno); - llerr(" RX ADDR: [%08x] %04x\n", addr, getreg16(addr)); + usbinfo(" RX ADDR: [%08x] %04x\n", addr, getreg16(addr)); addr = STM32_USB_COUNT_RX(epno); - llerr(" COUNT: [%08x] %04x\n", addr, getreg16(addr)); + usbinfo(" COUNT: [%08x] %04x\n", addr, getreg16(addr)); } #endif @@ -770,19 +771,19 @@ static void stm32_dumpep(int epno) * Name: stm32_checksetup ****************************************************************************/ -#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES) +#ifdef CONFIG_STM32_USBDEV_REGDEBUG static void stm32_checksetup(void) { uint32_t cfgr = getreg32(STM32_RCC_CFGR); uint32_t apb1rstr = getreg32(STM32_RCC_APB1RSTR); uint32_t apb1enr = getreg32(STM32_RCC_APB1ENR); - llerr("CFGR: %08x APB1RSTR: %08x APB1ENR: %08x\n", cfgr, apb1rstr, apb1enr); + usbinfo("CFGR: %08x APB1RSTR: %08x APB1ENR: %08x\n", cfgr, apb1rstr, apb1enr); if ((apb1rstr & RCC_APB1RSTR_USBRST) != 0 || (apb1enr & RCC_APB1ENR_USBEN) == 0) { - llerr("ERROR: USB is NOT setup correctly\n"); + usbinfo("ERROR: USB is NOT setup correctly\n"); } } #endif @@ -2844,7 +2845,7 @@ static int stm32_epconfigure(struct usbdev_ep_s *ep, if (!ep || !desc) { usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0); - ullerr("ERROR: ep=%p desc=%p\n"); + uusbinfo("ERROR: ep=%p desc=%p\n"); return -EINVAL; } #endif @@ -2940,7 +2941,7 @@ static int stm32_epdisable(struct usbdev_ep_s *ep) if (!ep) { usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0); - ullerr("ERROR: ep=%p\n", ep); + uusbinfo("ERROR: ep=%p\n", ep); return -EINVAL; } #endif @@ -3028,7 +3029,7 @@ static int stm32_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req) if (!req || !req->callback || !req->buf || !ep) { usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0); - ullerr("ERROR: req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep); + uusbinfo("ERROR: req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep); return -EINVAL; } #endif @@ -3040,7 +3041,7 @@ static int stm32_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req) if (!priv->driver) { usbtrace(TRACE_DEVERROR(STM32_TRACEERR_NOTCONFIGURED), priv->usbdev.speed); - ullerr("ERROR: driver=%p\n", priv->driver); + uusbinfo("ERROR: driver=%p\n", priv->driver); return -ESHUTDOWN; } #endif @@ -3057,7 +3058,7 @@ static int stm32_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req) if (privep->stalled) { stm32_abortrequest(privep, privreq, -EBUSY); - ullerr("ERROR: stalled\n"); + uusbinfo("ERROR: stalled\n"); ret = -EBUSY; } @@ -3136,7 +3137,7 @@ static int stm32_epcancel(struct usbdev_ep_s *ep, struct usbdev_req_s *req) struct stm32_ep_s *privep = (struct stm32_ep_s *)ep; irqstate_t flags; -#ifdef CONFIG_DEBUG_FEATURES +#ifdef CONFIG_DEBUG_USB if (!ep || !req) { usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0); @@ -3163,7 +3164,7 @@ static int stm32_epstall(struct usbdev_ep_s *ep, bool resume) uint16_t status; irqstate_t flags; -#ifdef CONFIG_DEBUG_FEATURES +#ifdef CONFIG_DEBUG_USB if (!ep) { usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0); @@ -3305,7 +3306,7 @@ static struct usbdev_ep_s *stm32_allocep(struct usbdev_s *dev, uint8_t epno, int bufno; usbtrace(TRACE_DEVALLOCEP, (uint16_t)epno); -#ifdef CONFIG_DEBUG_FEATURES +#ifdef CONFIG_DEBUG_USB if (!dev) { usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0); @@ -3379,7 +3380,7 @@ static void stm32_freeep(struct usbdev_s *dev, struct usbdev_ep_s *ep) struct stm32_usbdev_s *priv; struct stm32_ep_s *privep; -#ifdef CONFIG_DEBUG_FEATURES +#ifdef CONFIG_DEBUG_USB if (!dev || !ep) { usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0); @@ -3410,7 +3411,7 @@ static int stm32_getframe(struct usbdev_s *dev) { uint16_t fnr; -#ifdef CONFIG_DEBUG_FEATURES +#ifdef CONFIG_DEBUG_USB if (!dev) { usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0); @@ -3435,7 +3436,7 @@ static int stm32_wakeup(struct usbdev_s *dev) irqstate_t flags; usbtrace(TRACE_DEVWAKEUP, 0); -#ifdef CONFIG_DEBUG_FEATURES +#ifdef CONFIG_DEBUG_USB if (!dev) { usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0); @@ -3473,7 +3474,7 @@ static int stm32_selfpowered(struct usbdev_s *dev, bool selfpowered) usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered); -#ifdef CONFIG_DEBUG_FEATURES +#ifdef CONFIG_DEBUG_USB if (!dev) { usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0); @@ -3834,7 +3835,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver) usbtrace(TRACE_DEVREGISTER, 0); -#ifdef CONFIG_DEBUG_FEATURES +#ifdef CONFIG_DEBUG_USB if (!driver || !driver->ops->bind || !driver->ops->unbind || !driver->ops->disconnect || !driver->ops->setup) { @@ -3912,7 +3913,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) usbtrace(TRACE_DEVUNREGISTER, 0); -#ifdef CONFIG_DEBUG_FEATURES +#ifdef CONFIG_DEBUG_USB if (driver != priv->driver) { usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0); diff --git a/arch/arm/src/stm32/stm32_wwdg.c b/arch/arm/src/stm32/stm32_wwdg.c index 116d8d56ac4..6c982997437 100644 --- a/arch/arm/src/stm32/stm32_wwdg.c +++ b/arch/arm/src/stm32/stm32_wwdg.c @@ -81,6 +81,10 @@ # define CONFIG_STM32_WWDG_DEFTIMOUT WWDG_MAXTIMEOUT #endif +#ifndef CONFIG_DEBUG_WATCHDOG_INFO +# undef CONFIG_STM32_WWDG_REGDEBUG +#endif + /**************************************************************************** * Private Types ****************************************************************************/ @@ -105,7 +109,7 @@ struct stm32_lowerhalf_s ****************************************************************************/ /* Register operations ******************************************************/ -#if defined(CONFIG_STM32_WWDG_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES) +#ifdef CONFIG_STM32_WWDG_REGDEBUG static uint16_t stm32_getreg(uint32_t addr); static void stm32_putreg(uint16_t val, uint32_t addr); #else @@ -165,7 +169,7 @@ static struct stm32_lowerhalf_s g_wdgdev; * ****************************************************************************/ -#if defined(CONFIG_STM32_WWDG_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES) +#ifdef CONFIG_STM32_WWDG_REGDEBUG static uint16_t stm32_getreg(uint32_t addr) { static uint32_t prevaddr = 0; @@ -186,7 +190,7 @@ static uint16_t stm32_getreg(uint32_t addr) { if (count == 4) { - llerr("...\n"); + wdinfo("...\n"); } return val; @@ -203,7 +207,7 @@ static uint16_t stm32_getreg(uint32_t addr) { /* Yes.. then show how many times the value repeated */ - llerr("[repeats %d more times]\n", count-3); + wdinfo("[repeats %d more times]\n", count-3); } /* Save the new address, value, and count */ @@ -215,7 +219,7 @@ static uint16_t stm32_getreg(uint32_t addr) /* Show the register value read */ - llerr("%08x->%04x\n", addr, val); + wdinfo("%08x->%04x\n", addr, val); return val; } #endif @@ -228,12 +232,12 @@ static uint16_t stm32_getreg(uint32_t addr) * ****************************************************************************/ -#if defined(CONFIG_STM32_WWDG_REGDEBUG) && defined(CONFIG_DEBUG_FEATURES) +#ifdef CONFIG_STM32_WWDG_REGDEBUG static void stm32_putreg(uint16_t val, uint32_t addr) { /* Show the register value being written */ - llerr("%08x<-%04x\n", addr, val); + wdinfo("%08x<-%04x\n", addr, val); /* Write the value */ @@ -499,7 +503,7 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower, if (timeout < 1 || timeout > WWDG_MAXTIMEOUT) { - wderr("Cannot represent timeout=%d > %d\n", + wderr("ERROR: Cannot represent timeout=%d > %d\n", timeout, WWDG_MAXTIMEOUT); return -ERANGE; } diff --git a/arch/arm/src/stm32/stm32f20xxx_dma.c b/arch/arm/src/stm32/stm32f20xxx_dma.c index 335a9cd0096..8edd31db2cb 100644 --- a/arch/arm/src/stm32/stm32f20xxx_dma.c +++ b/arch/arm/src/stm32/stm32f20xxx_dma.c @@ -606,8 +606,8 @@ void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr, uint32_t regoffset; uint32_t regval; - dmaerr("paddr: %08x maddr: %08x ntransfers: %d scr: %08x\n", - paddr, maddr, ntransfers, scr); + dmainfo("paddr: %08x maddr: %08x ntransfers: %d scr: %08x\n", + paddr, maddr, ntransfers, scr); /* "If the stream is enabled, disable it by resetting the EN bit in the * DMA_SxCR register, then read this bit in order to confirm that there is no diff --git a/arch/arm/src/stm32/stm32f30xxx_i2c.c b/arch/arm/src/stm32/stm32f30xxx_i2c.c index de9d9241cb7..141b0deb75c 100644 --- a/arch/arm/src/stm32/stm32f30xxx_i2c.c +++ b/arch/arm/src/stm32/stm32f30xxx_i2c.c @@ -966,7 +966,7 @@ static void stm32_i2c_tracenew(FAR struct stm32_i2c_priv_s *priv, if (priv->tndx >= (CONFIG_I2C_NTRACE-1)) { - i2cerr("Trace table overflow\n"); + i2cerr("ERROR: Trace table overflow\n"); return; } @@ -1007,7 +1007,7 @@ static void stm32_i2c_traceevent(FAR struct stm32_i2c_priv_s *priv, if (priv->tndx >= (CONFIG_I2C_NTRACE-1)) { - i2cerr("Trace table overflow\n"); + i2cerr("ERROR: Trace table overflow\n"); return; } @@ -1700,7 +1700,7 @@ static int stm32_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s status = stm32_i2c_getstatus(priv); ret = -ETIMEDOUT; - i2cerr("Timed out: CR1: %04x status: %08x\n", + i2cerr("ERROR: Timed out: CR1: %04x status: %08x\n", stm32_i2c_getreg(priv, STM32_I2C_CR1_OFFSET), status); /* "Note: When the STOP, START or PEC bit is set, the software must diff --git a/arch/arm/src/stm32/stm32f40xxx_dma.c b/arch/arm/src/stm32/stm32f40xxx_dma.c index 8aae23d833f..f631c6ea4a6 100644 --- a/arch/arm/src/stm32/stm32f40xxx_dma.c +++ b/arch/arm/src/stm32/stm32f40xxx_dma.c @@ -605,8 +605,8 @@ void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr, uint32_t regoffset; uint32_t regval; - dmaerr("paddr: %08x maddr: %08x ntransfers: %d scr: %08x\n", - paddr, maddr, ntransfers, scr); + dmainfo("paddr: %08x maddr: %08x ntransfers: %d scr: %08x\n", + paddr, maddr, ntransfers, scr); #ifdef CONFIG_STM32_DMACAPABLE DEBUGASSERT(stm32_dmacapable(maddr, ntransfers, scr)); diff --git a/arch/arm/src/stm32/stm32f40xxx_rtcc.c b/arch/arm/src/stm32/stm32f40xxx_rtcc.c index bd0b6e45c8b..5017658cfe3 100644 --- a/arch/arm/src/stm32/stm32f40xxx_rtcc.c +++ b/arch/arm/src/stm32/stm32f40xxx_rtcc.c @@ -971,13 +971,13 @@ int up_rtc_initialize(void) { case OK: { - rtcllerr("rtc_syncwait() okay\n"); + rtcllinfo("rtc_syncwait() okay\n"); break; } default: { - rtcllerr("rtc_syncwait() failed (%d)\n", ret); + rtcllerr("ERROR: rtc_syncwait() failed (%d)\n", ret); break; } } @@ -991,7 +991,7 @@ int up_rtc_initialize(void) if (regval != RTC_MAGIC) { - rtcllerr("Do setup\n"); + rtcllinfo("Do setup\n"); /* Perform the one-time setup of the LSE clocking to the RTC */ @@ -1009,7 +1009,7 @@ int up_rtc_initialize(void) } else { - rtcllerr("Do resume\n"); + rtcllinfo("Do resume\n"); /* RTC already set-up, just resume normal operation */ @@ -1025,7 +1025,7 @@ int up_rtc_initialize(void) if (ret != OK && nretry > 0) { - rtcllerr("setup/resume ran %d times and failed with %d\n", + rtcllinfo("setup/resume ran %d times and failed with %d\n", nretry, ret); return -ETIMEDOUT; } diff --git a/arch/arm/src/stm32f7/stm32_gpio.h b/arch/arm/src/stm32f7/stm32_gpio.h index e08aac39f77..f79b398b7a1 100644 --- a/arch/arm/src/stm32f7/stm32_gpio.h +++ b/arch/arm/src/stm32f7/stm32_gpio.h @@ -345,7 +345,7 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge, * ************************************************************************************/ -#ifdef CONFIG_DEBUG_FEATURES +#ifdef CONFIG_DEBUG_GPIO_INFO int stm32_dumpgpio(uint32_t pinset, const char *msg); #else # define stm32_dumpgpio(p,m)