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More trailing whilespace removal

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This commit is contained in:
Gregory Nutt
2014-04-13 16:22:22 -06:00
parent 3a1324741a
commit f8024cf409
1051 changed files with 3204 additions and 3207 deletions
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configs/cloudctrl/src/Makefile
+1 -1
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@@ -38,7 +38,7 @@
CFLAGS += -I$(TOPDIR)/sched
ASRCS =
ASRCS =
AOBJS = $(ASRCS:.S=$(OBJEXT))
CSRCS = up_boot.c up_spi.c up_chipid.c
configs/cloudctrl/src/cloudctrl-internal.h
+1 -1
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@@ -84,7 +84,7 @@
* 56 PD9 MII_RXD0 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP
* 57 PD10 MII_RXD1 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP
*
* The board desdign can support a 50MHz external clock to drive the PHY
* The board desdign can support a 50MHz external clock to drive the PHY
* (U9). However, on my board, U9 is not present.
*
* 67 PA8 MCO DM9161AEP
configs/cloudctrl/src/up_buttons.c
+1 -1
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@@ -88,7 +88,7 @@ void board_button_initialize(void)
{
int i;
/* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are
/* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are
* configured for some pins but NOT used in this file
*/
configs/cloudctrl/src/up_userleds.c
+2 -2
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@@ -76,9 +76,9 @@
****************************************************************************/
/* This array maps an LED number to GPIO pin configuration */
static uint32_t g_ledcfg[BOARD_NLEDS] =
static uint32_t g_ledcfg[BOARD_NLEDS] =
{
GPIO_LED1, GPIO_LED2, GPIO_LED3, GPIO_LED4
GPIO_LED1, GPIO_LED2, GPIO_LED3, GPIO_LED4
};
/****************************************************************************