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stm32h7/fdcan: fixed kconfig and debug register

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Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
This commit is contained in:
Jorge Guzman
2024-04-05 21:09:43 -03:00
committed by Alan Carvalho de Assis
parent 510b6221ca
commit f7a98db234
2 changed files with 3 additions and 4 deletions
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arch/arm/src/stm32h7/Kconfig
-1
View File
@@ -5914,7 +5914,6 @@ endmenu # STM32H7_FDCAN2
config STM32H7_FDCAN_REGDEBUG config STM32H7_FDCAN_REGDEBUG
bool "Enable register dump debugging" bool "Enable register dump debugging"
depends on DEBUG_CAN_INFO
depends on DEBUG_NET_INFO depends on DEBUG_NET_INFO
default n default n
---help--- ---help---
arch/arm/src/stm32h7/stm32_fdcan_sock.c
+3 -3
View File
@@ -549,7 +549,7 @@ static void fdcan_dumpregs(struct fdcan_driver_s *priv)
/* Protocol error -- check protocol status register for details */ /* Protocol error -- check protocol status register for details */
regval = getreg32(priv->base + STM32_FDCAN_PSR_OFFSET); regval = getreg32(priv->base + STM32_FDCAN_PSR_OFFSET);
printf("--PSR.LEC = %d\n", regval & FDCAN_PSR_LEC); printf("--PSR.LEC = %" PRId32 "\n", regval & FDCAN_PSR_LEC_MASK);
} }
} }
#endif #endif
@@ -2080,7 +2080,7 @@ int fdcan_initialize(struct fdcan_driver_s *priv)
} }
#ifdef CONFIG_STM32H7_FDCAN_REGDEBUG #ifdef CONFIG_STM32H7_FDCAN_REGDEBUG
const fdcan_bitseg *tim = &priv->arbi_timing; const struct fdcan_bitseg *tim = &priv->arbi_timing;
ninfo("[fdcan][arbi] Timings: presc=%u sjw=%u bs1=%u bs2=%u\r\n", ninfo("[fdcan][arbi] Timings: presc=%u sjw=%u bs1=%u bs2=%u\r\n",
tim->prescaler, tim->sjw, tim->bs1, tim->bs2); tim->prescaler, tim->sjw, tim->bs1, tim->bs2);
#endif #endif
@@ -2104,7 +2104,7 @@ int fdcan_initialize(struct fdcan_driver_s *priv)
} }
#ifdef CONFIG_STM32H7_FDCAN_REGDEBUG #ifdef CONFIG_STM32H7_FDCAN_REGDEBUG
const fdcan_bitseg *tim = &priv->data_timing; tim = &priv->data_timing;
ninfo("[fdcan][data] Timings: presc=%u sjw=%u bs1=%u bs2=%u\r\n", ninfo("[fdcan][data] Timings: presc=%u sjw=%u bs1=%u bs2=%u\r\n",
tim->prescaler, tim->sjw, tim->bs1, tim->bs2); tim->prescaler, tim->sjw, tim->bs1, tim->bs2);
#endif #endif