mirror of
https://github.com/apache/nuttx.git
synced 2026-06-04 14:53:47 +08:00
arch/tricore: support minimal vectortalbe in tricore
The SRN number in TriCore far exceeds the PN number. Using IRQ as the PN number would result in an overflow. Therefore, MINIMAL_VECTORTABLE is used to ensure that the PN number does not overflow. Signed-off-by: zhangyuan29 <zhangyuan29@xiaomi.com>
This commit is contained in:
@@ -26,6 +26,8 @@ config ARCH_TC3XX
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bool
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select ARCH_HAVE_TESTSET
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select ARCH_HAVE_IRQTRIGGER
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select ARCH_MINIMAL_VECTORTABLE
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select ARCH_MINIMAL_VECTORTABLE_DYNAMIC
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default n
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config ARCH_FAMILY
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@@ -88,7 +88,7 @@
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#define XCPTCONTEXT_REGS (TC_CONTEXT_REGS * 2)
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#define XCPTCONTEXT_SIZE (sizeof(void *) * XCPTCONTEXT_REGS)
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#define NR_IRQS (255)
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#define NR_IRQS (2048)
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/* PSW: Program Status Word Register */
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@@ -112,6 +112,9 @@
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#define FCX_FCXS_MASK (0xf << FCX_FCXS)
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#define FCX_FREE (FCX_FCXS_MASK | FCX_FCXO_MASK) /* Free CSA manipulation */
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#define TRICORE_SRC2IRQ(src_addr) \
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(((uintptr_t)(src_addr) - (uintptr_t)&MODULE_SRC) / 4)
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/****************************************************************************
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* Public Types
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****************************************************************************/
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@@ -75,7 +75,7 @@ IFX_INTERRUPT_INTERNAL(tricore_doirq, 0, 255)
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/* Deliver the IRQ */
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irq_dispatch(icr.B.CCPN, regs);
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irq_dispatch(NDX_TO_IRQ(icr.B.CCPN), regs);
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/* Check for a context switch. */
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@@ -122,30 +122,15 @@ void up_enable_irq(int irq)
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{
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volatile Ifx_SRC_SRCR *src = &SRC_CPU_CPU0_SB + irq;
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IfxSrc_init(src, IfxSrc_Tos_cpu0, irq);
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#ifdef CONFIG_ARCH_TC3XX
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IfxSrc_init(src, IfxSrc_Tos_cpu0, IRQ_TO_NDX(irq));
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#else
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IfxSrc_init(src, IfxSrc_Tos_cpu0, IRQ_TO_NDX(irq), IfxSrc_VmId_none);
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#endif
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IfxSrc_enable(src);
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}
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#ifdef CONFIG_ARCH_HAVE_IRQTRIGGER
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/****************************************************************************
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* Name: up_trigger_irq
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*
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* Description:
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* Trigger an IRQ by software.
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*
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****************************************************************************/
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void up_trigger_irq(int irq, cpu_set_t cpuset)
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{
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(void) cpuset;
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volatile Ifx_SRC_SRCR *src = &SRC_CPU_CPU0_SB + irq;
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IfxSrc_setRequest(src);
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}
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#endif
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/****************************************************************************
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* Name: up_affinity_irq
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*
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@@ -51,7 +51,9 @@ void up_timer_initialize(void)
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{
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struct oneshot_lowerhalf_s *lower;
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lower = tricore_systimer_initialize(&MODULE_STM0, 192, SCU_FREQUENCY);
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lower = tricore_systimer_initialize(&MODULE_STM0,
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TRICORE_SRC2IRQ(&SRC_STM0SR0),
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SCU_FREQUENCY);
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DEBUGASSERT(lower != NULL);
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@@ -12,6 +12,7 @@ CONFIG_ARCH_BOARD_A2G_TC397_5V_TFT=y
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CONFIG_ARCH_CHIP="tc397"
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CONFIG_ARCH_CHIP_TC397=y
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CONFIG_ARCH_INTERRUPTSTACK=2048
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CONFIG_ARCH_NUSER_INTERRUPTS=48
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_ARCH_TRICORE=y
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CONFIG_BOARD_LOOPSPERMSEC=99369
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+40
-22
@@ -42,38 +42,51 @@
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* Pre-processor Definitions
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/* IRQ detach is a convenience definition, it detach all the handlers
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* sharing the same IRQ. Detaching an interrupt handler is equivalent to
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* setting a NULL interrupt handler.
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*/
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# define irq_detach(irq) irq_attach(irq, NULL, NULL)
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# define irq_detach_wqueue(irq) irq_attach_wqueue(irq, NULL, NULL, NULL, 0)
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# define irq_detach_thread(irq) \
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irq_attach_thread(irq, NULL, NULL, NULL, 0, 0)
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#define irq_detach(irq) irq_attach(irq, NULL, NULL)
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#define irq_detach_wqueue(irq) irq_attach_wqueue(irq, NULL, NULL, NULL, 0)
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#define irq_detach_thread(irq) irq_attach_thread(irq, NULL, NULL, NULL, 0, 0)
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/* Maximum/minimum values of IRQ integer types */
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# if NR_IRQS <= 256
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# define IRQT_MAX UINT8_MAX
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# elif NR_IRQS <= 65536
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# define IRQT_MAX UINT16_MAX
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#if NR_IRQS <= 256
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# define IRQT_MAX UINT8_MAX
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#elif NR_IRQS <= 65536
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# define IRQT_MAX UINT16_MAX
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#else
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# define IRQT_MAX UINT32_MAX
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#endif
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#ifdef CONFIG_ARCH_MINIMAL_VECTORTABLE
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# if CONFIG_ARCH_NUSER_INTERRUPTS <= 256
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# define IRQMAPPED_MAX UINT8_MAX
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# elif CONFIG_ARCH_NUSER_INTERRUPTS <= 65536
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# define IRQMAPPED_MAX UINT16_MAX
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# else
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# define IRQT_MAX UINT32_MAX
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# define IRQMAPPED_MAX UINT32_MAX
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# endif
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#endif
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# ifdef CONFIG_ARCH_MINIMAL_VECTORTABLE
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# if CONFIG_ARCH_NUSER_INTERRUPTS <= 256
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# define IRQMAPPED_MAX UINT8_MAX
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# elif CONFIG_ARCH_NUSER_INTERRUPTS <= 65536
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# define IRQMAPPED_MAX UINT16_MAX
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# else
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# define IRQMAPPED_MAX UINT32_MAX
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# endif
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# endif
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#if defined(CONFIG_ARCH_MINIMAL_VECTORTABLE) && \
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!defined(CONFIG_ARCH_NUSER_INTERRUPTS)
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# error CONFIG_ARCH_NUSER_INTERRUPTS is not defined
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#endif
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#endif /* __ASSEMBLY__ */
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#if defined(CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC)
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# define IRQ_TO_NDX(irq) (g_irqmap[irq] ? g_irqmap[irq] : irq_to_ndx(irq))
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# define NDX_TO_IRQ(ndx) g_irqrevmap[ndx]
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#elif defined(CONFIG_ARCH_MINIMAL_VECTORTABLE)
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# define IRQ_TO_NDX(irq) \
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(g_irqmap[(irq)] < CONFIG_ARCH_NUSER_INTERRUPTS ? g_irqmap[(irq)] : -EINVAL)
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# define NDX_TO_IRQ(ndx) ndx_to_irq(ndx)
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#else
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# define IRQ_TO_NDX(irq) (irq)
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# define NDX_TO_IRQ(ndx) (ndx)
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#endif
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#ifdef CONFIG_SMP
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# define cpu_irqlock_clear() \
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@@ -168,7 +181,6 @@ extern "C"
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#define EXTERN extern
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#endif
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#ifdef CONFIG_ARCH_MINIMAL_VECTORTABLE
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/* This is the interrupt vector mapping table. This must be provided by
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* architecture specific logic if CONFIG_ARCH_MINIMAL_VECTORTABLE is define
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* in the configuration.
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@@ -179,7 +191,13 @@ extern "C"
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* here with NR_IRQS undefined.
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*/
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/* EXTERN const irq_mapped_t g_irqmap[NR_IRQS]; */
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#if defined(CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC)
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extern irq_mapped_t g_irqmap[];
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extern int g_irqrevmap[];
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int irq_to_ndx(int irq);
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#elif defined(CONFIG_ARCH_MINIMAL_VECTORTABLE)
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extern const irq_mapped_t g_irqmap[];
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int ndx_to_irq(int ndx);
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#endif
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/****************************************************************************
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@@ -37,24 +37,6 @@
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#include <nuttx/irq.h>
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#include <nuttx/spinlock.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#if defined(CONFIG_ARCH_MINIMAL_VECTORTABLE) && \
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!defined(CONFIG_ARCH_NUSER_INTERRUPTS)
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# error CONFIG_ARCH_NUSER_INTERRUPTS is not defined
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#endif
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#if defined(CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC)
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# define IRQ_TO_NDX(irq) (g_irqmap[irq] ? g_irqmap[irq] : irq_to_ndx(irq))
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#elif defined(CONFIG_ARCH_MINIMAL_VECTORTABLE)
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# define IRQ_TO_NDX(irq) \
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(g_irqmap[(irq)] < CONFIG_ARCH_NUSER_INTERRUPTS ? g_irqmap[(irq)] : -EINVAL)
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#else
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# define IRQ_TO_NDX(irq) (irq)
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#endif
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/****************************************************************************
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* Public Types
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****************************************************************************/
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@@ -98,22 +80,6 @@ extern struct irq_info_s g_irqvector[CONFIG_ARCH_NUSER_INTERRUPTS];
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extern struct irq_info_s g_irqvector[NR_IRQS];
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#endif
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/* This is the interrupt vector mapping table. This must be provided by
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* architecture specific logic if CONFIG_ARCH_MINIMAL_VECTORTABLE is define
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* in the configuration.
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*
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* REVISIT: This should be declared in include/nuttx/irq.h. The declaration
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* at that location, however, introduces a circular include dependency so the
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* declaration is here for the time being.
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*/
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#if defined(CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC)
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extern irq_mapped_t g_irqmap[NR_IRQS];
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int irq_to_ndx(int irq);
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#elif defined(CONFIG_ARCH_MINIMAL_VECTORTABLE)
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extern const irq_mapped_t g_irqmap[NR_IRQS];
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#endif
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#ifdef CONFIG_SMP
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/* This is the spinlock that enforces critical sections when interrupts are
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* disabled.
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+19
-1
@@ -57,6 +57,7 @@ static int g_irqmap_count = 1;
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*/
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irq_mapped_t g_irqmap[NR_IRQS];
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int g_irqrevmap[CONFIG_ARCH_NUSER_INTERRUPTS];
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#endif
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/****************************************************************************
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@@ -71,12 +72,29 @@ int irq_to_ndx(int irq)
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irqstate_t flags = spin_lock_irqsave(&g_irqlock);
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if (g_irqmap[irq] == 0)
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{
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g_irqmap[irq] = g_irqmap_count++;
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int ndx = g_irqmap_count++;
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g_irqmap[irq] = ndx;
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g_irqrevmap[ndx] = irq;
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}
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spin_unlock_irqrestore(&g_irqlock, flags);
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return g_irqmap[irq];
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}
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#elif defined(CONFIG_ARCH_MINIMAL_VECTORTABLE)
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int ndx_to_irq(int ndx)
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{
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int i;
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for (i = 0; i < NR_IRQS; i++)
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{
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if (g_irqmap[i] == ndx)
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{
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return i;
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}
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}
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return -EINVAL;
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}
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#endif
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/****************************************************************************
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