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!drivers: separate pulse count feature from PWM driver
BREAKING CHANGE: separate pulse count feature from PWM driver. Coupling PWM driver with pulse count feature was bad decision from the beginning, these are two different things: - PWM is a modulation scheme: it continuously represents a value by varying duty cycle, usually at a fixed frequency. - Pulse train generation is a finite waveform transaction: generate N edges/pulses with selected timing, then complete. This change introduce a new pulse count driver with new API. Now user can generate pulse train by providing: - high pulse length in ns - low pulse length in ns - pulse count All architectures supporting pulse count have been adapted in subsequent commits. Users must migrate their code to use the new driver with new API. Signed-off-by: raiden00pl <raiden00@railab.me>
This commit is contained in:
raiden00pl
committed by
Alin Jerpelea
Alin Jerpelea
parent
08a2de27cf
commit
f1e7b143d9
@@ -114,6 +114,7 @@
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#define _EEPIOCBASE (0x4600) /* EEPROM driver ioctl commands */
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#define _PTPBASE (0x4700) /* PTP ioctl commands */
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#define _DSHOTIOCBASE (0x4800) /* Dshot device ioctl commands */
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#define _PULSECOUNTBASE (0x4900) /* Pulse count driver ioctl commands */
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#define _WLIOCBASE (0x8b00) /* Wireless modules ioctl network commands */
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/* boardctl() commands share the same number space */
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@@ -815,6 +816,11 @@
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#define _DSHOTIOCVALID(c) (_IOC_TYPE(c)==_DSHOTIOCBASE)
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#define _DSHOTIOC(nr) _IOC(_DSHOTIOCBASE,nr)
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/* Pulse count driver ioctl definitions *************************************/
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#define _PULSECOUNTIOCVALID(c) (_IOC_TYPE(c)==_PULSECOUNTBASE)
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#define _PULSECOUNTIOC(nr) _IOC(_PULSECOUNTBASE,nr)
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/****************************************************************************
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* Public Type Definitions
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****************************************************************************/
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@@ -0,0 +1,189 @@
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/****************************************************************************
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* include/nuttx/timers/pulsecount.h
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __INCLUDE_NUTTX_TIMERS_PULSECOUNT_H
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#define __INCLUDE_NUTTX_TIMERS_PULSECOUNT_H
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/* A pulsecount device generates a finite pulse train with controlled high
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* time, low time, and pulse count. The driver is split into two parts:
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*
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* 1. An "upper half", generic character driver that provides the common
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* pulsecount interface to application code.
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* 2. A "lower half", platform-specific driver that implements the timer
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* programming needed to generate the pulse train.
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*/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/compiler.h>
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#include <nuttx/clock.h>
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#include <stdint.h>
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#include <fixedmath.h>
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#include <nuttx/fs/ioctl.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* IOCTL Commands ***********************************************************/
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/* PULSECOUNTIOC_SETCHARACTERISTICS - Set the pulse train characteristics.
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*
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* ioctl argument: A read-only reference to struct pulsecount_info_s.
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*
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* PULSECOUNTIOC_GETCHARACTERISTICS - Get the currently selected pulse train
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* characteristics.
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*
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* ioctl argument: A writable reference to struct pulsecount_info_s.
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*
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* PULSECOUNTIOC_START - Start the configured pulse train. The
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* PULSECOUNTIOC_SETCHARACTERISTICS command must have previously been sent.
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* By default this command blocks until the configured pulse count
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* completes. That blocking behavior can be overridden by opening the
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* device with O_NONBLOCK.
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*
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* ioctl argument: None.
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*
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* PULSECOUNTIOC_STOP - Stop pulse generation and return immediately.
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*
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* TODO: Support cancelling a blocking PULSECOUNTIOC_START.
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*
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* ioctl argument: None.
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*/
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#define PULSECOUNTIOC_SETCHARACTERISTICS _PULSECOUNTIOC(1)
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#define PULSECOUNTIOC_GETCHARACTERISTICS _PULSECOUNTIOC(2)
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#define PULSECOUNTIOC_START _PULSECOUNTIOC(3)
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#define PULSECOUNTIOC_STOP _PULSECOUNTIOC(4)
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/****************************************************************************
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* Public Types
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****************************************************************************/
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struct pulsecount_info_s
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{
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uint32_t high_ns; /* Pulse high time in nanoseconds */
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uint32_t low_ns; /* Pulse low time in nanoseconds */
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uint32_t count; /* Number of pulses to generate */
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};
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/****************************************************************************
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* Public Inline Functions
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****************************************************************************/
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static inline uint64_t
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pulsecount_period_ns(FAR const struct pulsecount_info_s *info)
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{
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return (uint64_t)info->high_ns + info->low_ns;
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}
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static inline uint32_t
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pulsecount_frequency(FAR const struct pulsecount_info_s *info)
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{
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return NSEC_PER_SEC / pulsecount_period_ns(info);
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}
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static inline ub16_t
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pulsecount_duty(FAR const struct pulsecount_info_s *info)
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{
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return (ub16_t)(((uint64_t)info->high_ns << 16) /
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pulsecount_period_ns(info));
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}
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struct pulsecount_lowerhalf_s;
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struct pulsecount_ops_s
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{
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/* This method is called when the driver is opened. The lower half driver
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* should configure and initialize the device so that it is ready for use.
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* It should not generate pulses until the start method is called.
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*/
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CODE int (*setup)(FAR struct pulsecount_lowerhalf_s *dev);
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/* This method is called when the driver is closed. The lower half driver
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* should stop pulse output, free resources, disable the timer, and put the
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* system into the lowest possible power usage state.
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*/
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CODE int (*shutdown)(FAR struct pulsecount_lowerhalf_s *dev);
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/* Configure the timer and start the finite pulse train. The lower half
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* must call pulsecount_expired() with the provided handle after the
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* programmed pulse count completes.
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*/
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CODE int (*start)(FAR struct pulsecount_lowerhalf_s *dev,
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FAR const struct pulsecount_info_s *info,
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FAR void *handle);
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/* Stop the pulse train and reset the timer resources. */
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CODE int (*stop)(FAR struct pulsecount_lowerhalf_s *dev);
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/* Lower-half logic may support platform-specific ioctl commands. */
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CODE int (*ioctl)(FAR struct pulsecount_lowerhalf_s *dev,
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int cmd, unsigned long arg);
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};
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struct pulsecount_lowerhalf_s
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{
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/* The first field of this state structure must be a pointer to the
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* pulsecount callback structure.
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*/
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FAR const struct pulsecount_ops_s *ops;
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};
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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int pulsecount_register(FAR const char *path,
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FAR struct pulsecount_lowerhalf_s *dev);
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/* This callback is called by the lower half after a finite pulse train has
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* completed. The handle must be the value passed to the lower half start()
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* method.
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*/
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void pulsecount_expired(FAR void *handle);
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INCLUDE_NUTTX_TIMERS_PULSECOUNT_H */
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@@ -24,10 +24,9 @@
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#define __INCLUDE_NUTTX_TIMERS_PWM_H
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/* For the purposes of this driver, a PWM device is any device that generates
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* periodic output pulses s of controlled frequency and pulse width. Such a
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* device might be used, for example, to perform pulse-width modulated output
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* or frequency/pulse-count modulated output (such as might be needed to
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* control a stepper motor).
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* periodic output pulses of controlled frequency and pulse width. Such a
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* device might be used, for example, to perform pulse-width modulated
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* output.
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*
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* The PWM driver is split into two parts:
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*
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@@ -59,10 +58,6 @@
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/* Configuration ************************************************************/
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/* CONFIG_PWM - Enables because PWM driver support
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* CONFIG_PWM_PULSECOUNT - Some hardware will support generation of a fixed
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* number of pulses. This might be used, for example to support a stepper
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* motor. If the hardware will support a fixed pulse count, then this
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* configuration should be set to enable the capability.
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* CONFIG_DEBUG_PWM_INFO - This will generate output that can be use to
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* debug the PWM driver.
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*/
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@@ -98,11 +93,7 @@
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* characteristics of the pulsed output.
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*
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* PWMIOC_START - Start the pulsed output. The PWMIOC_SETCHARACTERISTICS
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* command must have previously been sent. If CONFIG_PWM_PULSECOUNT is
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* defined and the pulse count was configured to a non-zero value, then
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* this ioctl call will, by default, block until the programmed pulse count
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* completes. That default blocking behavior can be overridden by using
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* the O_NONBLOCK flag when the PWM driver is opened.
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* command must have previously been sent.
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*
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* ioctl argument: None
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*
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@@ -174,11 +165,6 @@ struct pwm_chan_s
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uint8_t cpol;
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uint8_t dcpol;
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int8_t channel;
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#ifdef CONFIG_PWM_PULSECOUNT
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uint32_t count; /* The number of pulse to generate. 0 means to
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* generate an indefinite number of pulses */
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#endif
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};
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/* This structure describes the characteristics of the pulsed output */
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@@ -219,17 +205,11 @@ struct pwm_ops_s
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/* (Re-)initialize the timer resources and start the pulsed output. The
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* start method should return an error if it cannot start the timer with
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* the given parameter (frequency, duty, or optionally pulse count)
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* the given parameter (frequency or duty)
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*/
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#ifdef CONFIG_PWM_PULSECOUNT
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CODE int (*start)(FAR struct pwm_lowerhalf_s *dev,
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FAR const struct pwm_info_s *info,
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FAR void *handle);
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#else
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CODE int (*start)(FAR struct pwm_lowerhalf_s *dev,
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FAR const struct pwm_info_s *info);
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#endif
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/* Stop the pulsed output and reset the timer resources */
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@@ -313,47 +293,6 @@ extern "C"
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int pwm_register(FAR const char *path, FAR struct pwm_lowerhalf_s *dev);
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/****************************************************************************
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* Name: pwm_expired
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*
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* Description:
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* If CONFIG_PWM_PULSECOUNT is defined and the pulse count was configured
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* to a non-zero value, then the "upper half" driver will wait for the
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* pulse count to expire. The sequence of expected events is as follows:
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*
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* 1. The upper half driver calls the start method, providing the lower
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* half driver with the pulse train characteristics. If a fixed
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* number of pulses is required, the 'count' value will be nonzero.
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* 2. The lower half driver's start() method must verify that it can
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* support the request pulse train (frequency, duty, AND pulse count).
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* If it cannot, it should return an error. If the pulse count is
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* non-zero, it should set up the hardware for that number of pulses
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* and return success. NOTE: That is CONFIG_PWM_PULSECOUNT is
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* defined, the start() method receives an additional parameter
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* that must be used in this callback.
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* 3. When the start() method returns success, the upper half driver
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* will "sleep" until the pwm_expired method is called.
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* 4. When the lower half detects that the pulse count has expired
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* (probably through an interrupt), it must call the pwm_expired
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* interface using the handle that was previously passed to the
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* start() method
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*
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* Input Parameters:
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* handle - This is the handle that was provided to the lower-half
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* start() method.
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*
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* Returned Value:
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* None
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*
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* Assumptions:
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* This function may be called from an interrupt handler.
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*
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****************************************************************************/
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#ifdef CONFIG_PWM_PULSECOUNT
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void pwm_expired(FAR void *handle);
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#endif
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/****************************************************************************
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* Platform-Independent "Lower-Half" PWM Driver Interfaces
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****************************************************************************/
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