From f07420dedf828694dd1eba08f1bb28f6ba701826 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 4 Jul 2017 14:31:26 -0600 Subject: [PATCH] SAME70-Xplained: Add MRF24J40 support. --- configs/same70-xplained/Kconfig | 31 ++ configs/same70-xplained/README.txt | 59 +++ configs/same70-xplained/src/Makefile | 6 +- configs/same70-xplained/src/sam_bringup.c | 13 +- configs/same70-xplained/src/sam_mrf24j40.c | 347 ++++++++++++++++++ configs/same70-xplained/src/sam_spi.c | 32 ++ configs/same70-xplained/src/same70-xplained.h | 94 ++++- configs/samv71-xult/README.txt | 14 +- configs/samv71-xult/src/sam_bringup.c | 1 - configs/samv71-xult/src/sam_spi.c | 2 +- 10 files changed, 586 insertions(+), 13 deletions(-) create mode 100644 configs/same70-xplained/src/sam_mrf24j40.c diff --git a/configs/same70-xplained/Kconfig b/configs/same70-xplained/Kconfig index 95ffaaa0fff..ab5c765cfa9 100644 --- a/configs/same70-xplained/Kconfig +++ b/configs/same70-xplained/Kconfig @@ -5,6 +5,37 @@ if ARCH_BOARD_SAME70_XPLAINED +config SAME70XPLAINED_CLICKSHIELD + bool "Mikroe Click Shield" + default n + ---help--- + In the mrf24j40-starhub configuration, a click shield from + MikroElectronika was used along with a Click "Bee" module. The + click shield supports two click shields. + +config SAME70XPLAINED_MB1_SPI + bool + default n + +config SAME70XPLAINED_MB2_SPI + bool + default n + +choice + prompt "Bee mikroBUS" + depends on SAME70XPLAINED_CLICKSHIELD && IEEE802154_MRF24J40 + default SAME70XPLAINED_MB1_BEE + +config SAME70XPLAINED_MB1_BEE + bool "MRF24J40 Bee in mikroBUS1" + select SAME70XPLAINED_MB1_SPI + +config SAME70XPLAINED_MB2_BEE + bool "MRF24J40 Bee in mikroBUS2" + select SAME70XPLAINED_MB2_SPI + +endchoice # Bee mikroBUS + config SAME70XPLAINED_HSMCI0_AUTOMOUNT bool "HSMCI0 automounter" default n diff --git a/configs/same70-xplained/README.txt b/configs/same70-xplained/README.txt index 1b10b484b04..e2275469698 100644 --- a/configs/same70-xplained/README.txt +++ b/configs/same70-xplained/README.txt @@ -19,6 +19,7 @@ Contents - USBHS Device Controller Driver - MCAN1 Loopback Test - SPI Slave + - Click Shield - Tickless OS - Debugging - Using OpenOCD and GDB to flash via the EDBG chip @@ -834,6 +835,64 @@ SPI Slave b) It will hog all of the CPU for the duration of the transfer). +Click Shield +============ + + In the mrf24j40-starhub configuration, a click shield from + MikroElectronika was used along with a Click "Bee" module. The click + shield supports two click shields and the following tables describe the + relationship between the pins on each click shield, the Arduino + connector and the SAME70 pins. + + --------- ---------------------- -------- --------- ------------------ ---------- + mikroBUS1 Arduino SAME70 mikroBUS2 Arduino SAME70 + --------- ---------------------- -------- --------- ------------------ ---------- + AN HD1 A0 AN0 Pin 1 AD0 PD26 AN HD1 A1 AN1 Pin 2 AD1 PC31 + RST HD1 A3 Pin 4 AD3 PA19 RST HD1 A2 Pin 3 AD2 PD30 + CS HD4 D10 SPI-SS Pin 8 D10 PD25 CS HD4 D9 Pin 9 D9 PC9 + SCK HD4 D13 SPI-SCK Pin 5 D13 PD22 SCK Same + MISO HD4 D12 SPI-MISO Pin 6 D12 PD20 MISO Same + MOSI HD4 D11 SPI-MOSI Pin 7 D11 PD21 MOSI Same + 3.3V N/A 3.3V N/A + GND N/A GND N/A + PWM HD3 D6 PWMA Pin 2 D6 PC19 PWM HD3 D5 PWMB Pin 5 D5 PD11 + INT HD3 D2 INT0 Pin 6 D2 PA5 INT HD3 D3 INT1 Pin 5 D3 PA6 + RX HD3 D0 HDR-RX* Pin 8 D0 PD28 RX Same + TX HD3 D1 HDR-TX* Pin 7 D1 PD30 TX Same + SCL HD1 A5 I2C-SCL Pin 5 AD5 PC30 SDA Same + SDA HD1 A4 I2C-SDA Pin 6 AD4 PC13 SCL Same + 5V N/A 5V N/A + GND N/A GND N/A + --------- ---------------------- -------- --------- ------------------ ---------- + + * Depends upon setting of SW1, UART vs PROG. + + --- ----- ------------------------------ --------------------------------- + PIN PORT SHIELD FUNCTION SAME70PIN CONFIGURATION + --- ----- ------------------------------ --------------------------------- + AD0 PD26 microBUS2 Analog TD PD26 *** Not an AFE pin *** + AD1 PC31 microBUS2 Analog PC31 AFE1_AD6 GPIO_AFE1_AD6 + AD2 PD30 microBUS2 GPIO reset output PD30 + AD3 PA19 microBUS1 GPIO reset output PA19 + AD4 PC13 (both) I2C-SDA PC13 *** Does not support I2C SDA *** + AD5 PC30 (both) I2C-SCL PC30 *** Does not support I2C SCL *** + AD6 PA17 *** Not used *** + AD7 PC12 *** Not used *** + D0 PD28 (both) HDR_RX PD28 URXD3 GPIO_UART3_RXD + D1 PD30 (both) HDR_TX PD30 UTXD3 GPIO_UART3_TXD_1 + D2 PA5 microBUS1 GPIO interrupt input PA5 + D3 PA6 microBUS2 GPIO interrupt input PA6 + D4 PD27 *** Not used *** + D5 PD11 microBUS2 PWM PD11 PWMC0_H0 + D6 PC19 microBUS1 PWN PC19 PWMC0_H2 + D7 PA2 *** Not used *** + D8 PA17 *** Not used *** + D9 PC9 microBUS2 CS GPIO output PC9 + D10 PD25 microBUS1 CS GPIO output PD25 SPI0_NPCS1 + D11 PD21 (both) SPI-MOSI PD21 SPI0_MOSI GPIO_SPI0_MOSI + D12 PD20 (both) SPI-MISO PD20 SPI0_MISO GPIO_SPI0_MISO + D13 PD22 (both) SPI-SCK PD22 SPI0_SPCK GPIO_SPI0_SPCK + Tickless OS =========== diff --git a/configs/same70-xplained/src/Makefile b/configs/same70-xplained/src/Makefile index 1f2eafb849a..8d2583374b7 100644 --- a/configs/same70-xplained/src/Makefile +++ b/configs/same70-xplained/src/Makefile @@ -1,7 +1,7 @@ ############################################################################ # configs/same70-xplained/src/Makefile # -# Copyright (C) 2015 Gregory Nutt. All rights reserved. +# Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved. # Author: Gregory Nutt # # Redistribution and use in source and binary forms, with or without @@ -94,4 +94,8 @@ ifneq (,$(findstring y,$(CONFIG_SAMV7_DAC0) $(CONFIG_SAMV7_DAC1))) CSRCS += sam_dac.c endif +ifeq ($(CONFIG_IEEE802154_MRF24J40),y) +CSRCS += sam_mrf24j40.c +endif + include $(TOPDIR)/configs/Board.mk diff --git a/configs/same70-xplained/src/sam_bringup.c b/configs/same70-xplained/src/sam_bringup.c index 4b41c93674f..91c191914ee 100644 --- a/configs/same70-xplained/src/sam_bringup.c +++ b/configs/same70-xplained/src/sam_bringup.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/same70-xplained/src/sam_bringup.c * - * Copyright (C) 2015, 2016 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2017 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -329,10 +329,19 @@ int sam_bringup(void) } #endif +#ifdef HAVE_MRF24J40 + /* Configure MRF24J40 wireless */ + + ret = sam_mrf24j40_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: sam_mrf24j40_initialize() failed: %d\n", ret); + } +#endif + #ifdef HAVE_ELF /* Initialize the ELF binary loader */ - syslog(LOG_ERR, "Initializing the ELF binary loader\n"); ret = elf_initialize(); if (ret < 0) { diff --git a/configs/same70-xplained/src/sam_mrf24j40.c b/configs/same70-xplained/src/sam_mrf24j40.c new file mode 100644 index 00000000000..c7f718855c9 --- /dev/null +++ b/configs/same70-xplained/src/sam_mrf24j40.c @@ -0,0 +1,347 @@ +/**************************************************************************** + * configs/same70-xplained/src/sam_mrf24j40.c + * + * Copyright (C) 2017 Gregory Nutt, All rights reserver + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "sam_gpio.h" +#include "sam_spi.h" + +#include "same70-xplained.h" + +#ifdef HAVE_MRF24J40 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#undef BEE_RESET + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct sam_priv_s +{ + struct mrf24j40_lower_s dev; + uint32_t intcfg; +#ifdef BEE_RESET + uint32_t rstcfg; +#endif + uint8_t irq; + uint8_t spidev; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind callbacks + * to isolate the MRF24J40 driver from differences in GPIO interrupt handling + * varying boards and MCUs. + * + * irq_attach - Attach the MRF24J40 interrupt handler to the GPIO + interrupt + * irq_enable - Enable or disable the GPIO interrupt + */ + +static int sam_attach_irq(FAR const struct mrf24j40_lower_s *lower, + xcpt_t handler, FAR void *arg); +static void sam_enable_irq(FAR const struct mrf24j40_lower_s *lower, + bool state); +static int sam_mrf24j40_devsetup(FAR struct sam_priv_s *priv); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the MRF24J40 + * driver. This structure provides information about the configuration + * of the MRF24J40 and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. The + * memory must be writable because, under certain circumstances, the driver + * may modify frequency or X plate resistance values. + */ + +#ifdef CONFIG_SAME70XPLAINED_MB1_BEE +static struct sam_priv_s g_mrf24j40_mb1_priv = +{ + .dev.attach = sam_attach_irq, + .dev.enable = sam_enable_irq, + .intcfg = CLICK_MB1_INTR, +#ifdef BEE_RESET + .rstcfg = CLICK_MB1_RESET, +#endif + .irq = IRQ_MB1, + .spidev = 0, +}; +#endif + +#ifdef CONFIG_SAME70XPLAINED_MB2_BEE +static struct sam_priv_s g_mrf24j40_mb2_priv = +{ + .dev.attach = sam_attach_irq, + .dev.enable = sam_enable_irq, + .intcfg = CLICK_MB2_INTR, +#ifdef BEE_RESET + .rstcfg = CLICK_MB2_RESET, +#endif + .irq = IRQ_MB2, + .spidev = 0, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the MRF24J40 driver from differences in GPIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * irq_attach - Attach the MRF24J40 interrupt handler to the GPIO + * interrupt + * irq_enable - Enable or disable the GPIO interrupt + */ + +static int sam_attach_irq(FAR const struct mrf24j40_lower_s *lower, + xcpt_t handler, FAR void *arg) +{ + FAR struct sam_priv_s *priv = (FAR struct sam_priv_s *)lower; + int ret; + + DEBUGASSERT(priv != NULL); + + ret = irq_attach(priv->irq, handler, arg); + if (ret < 0) + { + wlerr("ERROR: Failed to attach WM8904 interrupt: %d\n", ret); + } + + return ret; +} + +static void sam_enable_irq(FAR const struct mrf24j40_lower_s *lower, + bool state) +{ + FAR struct sam_priv_s *priv = (FAR struct sam_priv_s *)lower; + static bool enabled; + irqstate_t flags; + + /* The caller should not attempt to enable interrupts if the handler + * has not yet been 'attached' + */ + + DEBUGASSERT(priv != NULL); + wlinfo("state: %d irq: %u\n", (int)state, priv->irq); + + /* Has the interrupt state changed */ + + flags = enter_critical_section(); + if (state != enabled) + { + /* Enable or disable interrupts */ + + if (state) + { + wlinfo("Enabling\n"); + sam_gpioirqenable(priv->irq); + enabled = true; + } + else + { + wlinfo("Disabling\n"); + sam_gpioirqdisable(priv->irq); + enabled = false; + } + } + + leave_critical_section(flags); +} + +/**************************************************************************** + * Name: sam_mrf24j40_devsetup + * + * Description: + * Initialize one the MRF24J40 device in one mikroBUS slot + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +static int sam_mrf24j40_devsetup(FAR struct sam_priv_s *priv) +{ + FAR struct ieee802154_radio_s *radio; + MACHANDLE mac; + FAR struct spi_dev_s *spi; + int ret; + +#ifdef BEE_RESET + /* Bring the MRF24J40 out of reset + * NOTE: Not necessary. The RST# input is pulled high on the BEE. + */ + + (void)sam_configgpio(priv->rstcfg); + sam_gpiowrite(priv->rstcfg, true); +#endif + + /* Configure the interrupt pin */ + + (void)sam_configgpio(priv->intcfg); + sam_gpioirq(priv->intcfg); + + /* Initialize the SPI bus and get an instance of the SPI interface */ + + spi = sam_spibus_initialize(priv->spidev); + if (spi == NULL) + { + wlerr("ERROR: Failed to initialize SPI bus %d\n", priv->spidev); + return -ENODEV; + } + + /* Initialize and register the SPI MRF24J40 device */ + + radio = mrf24j40_init(spi, &priv->dev); + if (radio == NULL) + { + wlerr("ERROR: Failed to initialize SPI bus %d\n", priv->spidev); + return -ENODEV; + } + + /* Create a 802.15.4 MAC device from a 802.15.4 compatible radio device. */ + + mac = mac802154_create(radio); + if (mac == NULL) + { + wlerr("ERROR: Failed to initialize IEEE802.15.4 MAC\n"); + return -ENODEV; + } + +#ifdef CONFIG_IEEE802154_NETDEV + /* Use the IEEE802.15.4 MAC interface instance to create a 6LoWPAN + * network interface by wrapping the MAC intrface instance in a + * network device driver via mac802154dev_register(). + */ + + ret = mac802154netdev_register(mac); + if (ret < 0) + { + wlerr("ERROR: Failed to register the MAC network driver wpan%d: %d\n", + 0, ret); + return ret; + } +#endif + +#ifdef CONFIG_IEEE802154_MACDEV + /* If want to call these APIs from userspace, you have to wrap the MAC + * interface in a character device viamac802154dev_register(). + */ + + ret = mac802154dev_register(mac, 0); + if (ret < 0) + { + wlerr("ERROR: Failed to register the MAC character driver /dev/ieee%d: %d\n", + 0, ret); + return ret; + } +#endif + + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_mrf24j40_initialize + * + * Description: + * Initialize the MRF24J40 device. + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int sam_mrf24j40_initialize(void) +{ + int ret; + +#ifdef CONFIG_SAME70XPLAINED_MB1_BEE + wlinfo("Configuring BEE in mikroBUS1\n"); + + ret = sam_mrf24j40_devsetup(&g_mrf24j40_mb1_priv); + if (ret < 0) + { + wlerr("ERROR: Failed to initialize BD in mikroBUS1: %d\n", ret); + } +#endif + +#ifdef CONFIG_SAME70XPLAINED_MB2_BEE + wlinfo("Configuring BEE in mikroBUS2\n"); + + ret = sam_mrf24j40_devsetup(&g_mrf24j40_mb2_priv); + if (ret < 0) + { + wlerr("ERROR: Failed to initialize BD in mikroBUS2: %d\n", ret); + } +#endif + + UNUSED(ret); + return OK; +} +#endif /* HAVE_MRF24J40 */ diff --git a/configs/same70-xplained/src/sam_spi.c b/configs/same70-xplained/src/sam_spi.c index e50136df930..60fd5c0c37e 100644 --- a/configs/same70-xplained/src/sam_spi.c +++ b/configs/same70-xplained/src/sam_spi.c @@ -70,6 +70,18 @@ void sam_spidev_initialize(void) { #ifdef CONFIG_SAMV7_SPI0_MASTER +#ifdef CONFIG_SAME70XPLAINED_MB1_SPI + /* Enable chip select for mikroBUS1 */ + + (void)sam_configgpio(CLICK_MB1_CS); +#endif + +#ifdef CONFIG_SAME70XPLAINED_MB2_SPI + /* Enable chip select for mikroBUS2 */ + + (void)sam_configgpio(CLICK_MB2_CS); + +#endif #endif #ifdef CONFIG_SAMV7_SPI0_SLAVE @@ -143,12 +155,32 @@ void sam_spidev_initialize(void) #ifdef CONFIG_SAMV7_SPI0_MASTER void sam_spi0select(uint32_t devid, bool selected) { + spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + + switch (devid) + { +#ifdef CONFIG_IEEE802154_MRF24J40 + case SPIDEV_IEEE802154(0): + /* Set the GPIO low to select and high to de-select */ + +#if defined(CONFIG_SAME70XPLAINED_MB1_BEE) + sam_gpiowrite(CLICK_MB1_CS, !selected); +#elif defined(CONFIG_SAME70XPLAINED_MB2_BEE) + sam_gpiowrite(CLICK_MB2_CS, !selected); +#endif + break; +#endif + + default: + break; + } } #endif #ifdef CONFIG_SAMV7_SPI1_MASTER void sam_spi1select(uint32_t devid, bool selected) { + spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); } #endif diff --git a/configs/same70-xplained/src/same70-xplained.h b/configs/same70-xplained/src/same70-xplained.h index ed0e98e1564..b415ed3b857 100644 --- a/configs/same70-xplained/src/same70-xplained.h +++ b/configs/same70-xplained/src/same70-xplained.h @@ -1,7 +1,7 @@ /************************************************************************************ * configs/same70-xplained/src/same70-xplained.h * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -63,6 +63,7 @@ #define HAVE_MTDCONFIG 1 #define HAVE_PROGMEM_CHARDEV 1 #define HAVE_I2CTOOL 1 +#define HAVE_MRF24J40 1 /* HSMCI */ /* Can't support MMC/SD if the card interface is not enabled */ @@ -207,6 +208,28 @@ # endif #endif +/* Check if the MRF24J40 is supported in this configuration */ + +#ifndef CONFIG_IEEE802154_MRF24J40 +# undef HAVE_MRF24J40 +#endif + +#ifndef CONFIG_SAME70XPLAINED_CLICKSHIELD +# undef HAVE_MRF24J40 +#endif + +#if !defined(CONFIG_SAME70XPLAINED_MB1_BEE) && !defined(CONFIG_SAME70XPLAINED_MB2_BEE) +# undef HAVE_MRF24J40 +#endif + +#ifndef CONFIG_SAMV7_SPI0_MASTER +# undef HAVE_MRF24J40 +#endif + +#ifndef CONFIG_SAMV7_GPIOA_IRQ +# undef HAVE_MRF24J40 +#endif + /* SAME70-XPLD GPIO Pin Definitions *************************************************/ /* Ethernet MAC. @@ -299,6 +322,59 @@ #define GPIO_VBUSON (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_SET | \ GPIO_PORT_PIOC | GPIO_PIN16) +/* Click Shield + * + * --- ----- ------------------------------ --------------------------------- + * PIN PORT SHIELD FUNCTION PIN CONFIGURATION + * --- ----- ------------------------------ --------------------------------- + * AD0 PD26 microBUS2 Analog TD PD26 *** Not an AFE pin *** + * AD1 PC31 microBUS2 Analog PC31 AFE1_AD6 GPIO_AFE1_AD6 + * AD2 PD30 microBUS2 GPIO reset output PD30 + * AD3 PA19 microBUS1 GPIO reset output PA19 + * AD4 PC13 (both) I2C-SDA PC13 *** Does not support I2C SDA *** + * AD5 PC30 (both) I2C-SCL PC30 *** Does not support I2C SCL *** + * AD6 PA17 *** Not used *** + * AD7 PC12 *** Not used *** + * D0 PD28 (both) HDR_RX PD28 URXD3 GPIO_UART3_RXD + * D1 PD30 (both) HDR_TX PD30 UTXD3 GPIO_UART3_TXD_1 + * D2 PA5 microBUS1 GPIO interrupt input PA5 + * D3 PA6 microBUS2 GPIO interrupt input PA6 + * D4 PD27 *** Not used *** + * D5 PD11 microBUS2 PWMB PD11 PWMC0_H0 + * D6 PC19 microBUS1 PWMA PC19 PWMC0_H2 + * D7 PA2 *** Not used *** + * D8 PA17 *** Not used *** + * D9 PC9 microBUS2 CS GPIO output PC9 + * D10 PD25 microBUS1 CS GPIO output PD25 SPI0_NPCS1 + * D11 PD21 (both) SPI-MOSI PD21 SPI0_MOSI GPIO_SPI0_MOSI + * D12 PD20 (both) SPI-MISO PD20 SPI0_MISO GPIO_SPI0_MISO + * D13 PD22 (both) SPI-SCK PD22 SPI0_SPCK GPIO_SPI0_SPCK + */ + +/* Reset (RST#) Pulled-up on the click board */ + +#define CLICK_MB1_RESET (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOA | GPIO_PIN19) +#define CLICK_MB2_RESET (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_CLEAR | \ + GPIO_PORT_PIOD | GPIO_PIN30) + +/* Interrupts. No pull-ups on the BEE; assumig active low. */ + +#define CLICK_MB1_INTR (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \ + GPIO_INT_FALLING | GPIO_PORT_PIOA | GPIO_PIN5) +#define CLICK_MB2_INTR (GPIO_INPUT | GPIO_CFG_PULLUP | GPIO_CFG_DEGLITCH | \ + GPIO_INT_FALLING | GPIO_PORT_PIOA | GPIO_PIN6) + +#define IRQ_MB1 SAM_IRQ_PA5 +#define IRQ_MB2 SAM_IRQ_PA6 + +/* SP chip selects */ + +#define CLICK_MB1_CS (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOD | GPIO_PIN25) +#define CLICK_MB2_CS (GPIO_OUTPUT | GPIO_CFG_DEFAULT | GPIO_OUTPUT_SET | \ + GPIO_PORT_PIOC | GPIO_PIN9) + /************************************************************************************ * Public Types ************************************************************************************/ @@ -536,5 +612,21 @@ bool sam_writeprotected(int slotno); int sam_at24config(void); #endif +/**************************************************************************** + * Name: stm32_mrf24j40_initialize + * + * Description: + * Initialize the MRF24J40 device. + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +#ifdef HAVE_MRF24J40 +int sam_mrf24j40_initialize(void); +#endif + #endif /* __ASSEMBLY__ */ #endif /* __CONFIGS_SAME70_XPLAINED_SRC_SAME70_XPLAINED_H */ diff --git a/configs/samv71-xult/README.txt b/configs/samv71-xult/README.txt index 56d2620ff0c..c408f4dc863 100644 --- a/configs/samv71-xult/README.txt +++ b/configs/samv71-xult/README.txt @@ -1445,24 +1445,24 @@ Click Shield MikroElectronika was used along with a Click "Bee" module. The click shield supports two click shields and the following tables describe the relationship between the pins on each click shield, the Arduino - connector and the SAME70 pins. + connector and the SAMV71 pins. --------- ---------------------- -------- --------- ------------------ ---------- - mikroBUS1 Arduino SAME70 mikroBUS2 Arduino SAME70 + mikroBUS1 Arduino SAMV71 mikroBUS2 Arduino SAMV71 --------- ---------------------- -------- --------- ------------------ ---------- AN HD1 A0 AN0 Pin 1 AD0 PD26 AN HD1 A1 AN1 Pin 2 AD1 PC31 - RST HD1 A3 Pin 4 AD3 PD30 RST HD1 A2 Pin 3 AD2 PA19 + RST HD1 A3 Pin 4 AD3 PA19 RST HD1 A2 Pin 3 AD2 PD30 CS HD4 D10 SPI-SS Pin 8 D10 PD25 CS HD4 D9 Pin 9 D9 PC9 SCK HD4 D13 SPI-SCK Pin 5 D13 PD22 SCK Same MISO HD4 D12 SPI-MISO Pin 6 D12 PD20 MISO Same MOSI HD4 D11 SPI-MOSI Pin 7 D11 PD21 MOSI Same 3.3V N/A 3.3V N/A GND N/A GND N/A - PWM HD3 D6 PWMA Pin 2 D6 PA2 PWM HD3 D5 PWMB Pin 5 D5 PD11 + PWM HD3 D6 PWMA Pin 2 D6 PC19 PWM HD3 D5 PWMB Pin 5 D5 PD11 INT HD3 D2 INT0 Pin 6 D2 PA5 INT HD3 D3 INT1 Pin 5 D3 PA6 RX HD3 D0 HDR-RX* Pin 8 D0 PD28 RX Same - TX HD3 D1 HDR-TX* Pin 7 D1 PD20 TX Same - SCL HD1 A5 I2C-SCL Pin 5 AD5 PE0 SDA Same + TX HD3 D1 HDR-TX* Pin 7 D1 PD30 TX Same + SCL HD1 A5 I2C-SCL Pin 5 AD5 PC30 SDA Same SDA HD1 A4 I2C-SDA Pin 6 AD4 PC13 SCL Same 5V N/A 5V N/A GND N/A GND N/A @@ -1471,7 +1471,7 @@ Click Shield * Depends upon setting of SW1, UART vs PROG. --- ----- ------------------------------ --------------------------------- - PIN PORT SHIELD FUNCTION PIN CONFIGURATION + PIN PORT SHIELD FUNCTION SAMV71PIN CONFIGURATION --- ----- ------------------------------ --------------------------------- AD0 PD26 microBUS2 Analog TD PD26 *** Not an AFE pin *** AD1 PC31 microBUS2 Analog PC31 AFE1_AD6 GPIO_AFE1_AD6 diff --git a/configs/samv71-xult/src/sam_bringup.c b/configs/samv71-xult/src/sam_bringup.c index 6234c845ae0..68460f1cb40 100644 --- a/configs/samv71-xult/src/sam_bringup.c +++ b/configs/samv71-xult/src/sam_bringup.c @@ -542,7 +542,6 @@ int sam_bringup(void) #ifdef HAVE_ELF /* Initialize the ELF binary loader */ - syslog(LOG_ERR, "Initializing the ELF binary loader\n"); ret = elf_initialize(); if (ret < 0) { diff --git a/configs/samv71-xult/src/sam_spi.c b/configs/samv71-xult/src/sam_spi.c index 81163fab648..712db8e0cbc 100644 --- a/configs/samv71-xult/src/sam_spi.c +++ b/configs/samv71-xult/src/sam_spi.c @@ -70,12 +70,12 @@ void sam_spidev_initialize(void) { #ifdef CONFIG_SAMV7_SPI0_MASTER - #ifdef CONFIG_SAMV71XULT_MB1_SPI /* Enable chip select for mikroBUS1 */ (void)sam_configgpio(CLICK_MB1_CS); #endif + #ifdef CONFIG_SAMV71XULT_MB2_SPI /* Enable chip select for mikroBUS2 */