Mirrors_Framework/nuttx
1
0
Fork 0
mirror of https://github.com/apache/nuttx.git synced 2026-06-01 16:59:28 +08:00
Code Issues Actions 1 Packages Projects Releases Wiki Activity

Revert "arch/risc-v: use STACK_FRAME_SIZE for in S-mode syscall asm"

Browse Source 
This reverts commit 9b7f9867aa.
This commit is contained in:
Xiang Xiao
2022-04-05 01:28:37 +08:00
committed by Petro Karashchenko
parent a021177de8
commit efce8bd198
3 changed files with 10 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/risc-v/include/arch.h
-5
View File
@@ -66,11 +66,6 @@
# define REGSTORE __STR(sd) # define REGSTORE __STR(sd)
#endif #endif
/* RISC-V requires a 16-byte stack alignment. */
#define STACK_ALIGNMENT 16
#define STACK_FRAME_SIZE __XSTR(STACK_ALIGNMENT)
/* Provide the maximum amount of page table levels per MMU type */ /* Provide the maximum amount of page table levels per MMU type */
#ifdef CONFIG_ARCH_MMU_TYPE_SV39 #ifdef CONFIG_ARCH_MMU_TYPE_SV39
arch/risc-v/include/syscall.h
+2 -2
View File
@@ -126,11 +126,11 @@
#if defined (CONFIG_ARCH_USE_S_MODE) && defined (__KERNEL__) #if defined (CONFIG_ARCH_USE_S_MODE) && defined (__KERNEL__)
# define ASM_SYS_CALL \ # define ASM_SYS_CALL \
" addi sp, sp, -" STACK_FRAME_SIZE "\n" /* Make room */ \ " addi sp, sp, -16\n" /* Make room */ \
REGSTORE " ra, 0(sp)\n" /* Save ra */ \ REGSTORE " ra, 0(sp)\n" /* Save ra */ \
" jal ra, riscv_dispatch_syscall\n" /* Dispatch (modifies ra) */ \ " jal ra, riscv_dispatch_syscall\n" /* Dispatch (modifies ra) */ \
REGLOAD " ra, 0(sp)\n" /* Restore ra */ \ REGLOAD " ra, 0(sp)\n" /* Restore ra */ \
" addi sp, sp, " STACK_FRAME_SIZE "\n" /* Restore sp */ " addi sp, sp, 16\n" /* Restore sp */
#else #else
# define ASM_SYS_CALL \ # define ASM_SYS_CALL \
"ecall" "ecall"
arch/risc-v/src/common/riscv_internal.h
+5 -2
View File
@@ -33,8 +33,6 @@
# include <sys/types.h> # include <sys/types.h>
# include <stdint.h> # include <stdint.h>
# include <syscall.h> # include <syscall.h>
#else
# include <arch/arch.h>
#endif #endif
/**************************************************************************** /****************************************************************************
@@ -49,6 +47,11 @@
#define INTSTACK_COLOR 0xdeadbeef #define INTSTACK_COLOR 0xdeadbeef
#define HEAP_COLOR 'h' #define HEAP_COLOR 'h'
/* RISC-V requires a 16-byte stack alignment. */
#define STACK_ALIGNMENT 16
#define STACK_FRAME_SIZE __XSTR(STACK_ALIGNMENT)
/* Stack alignment macros */ /* Stack alignment macros */
#define STACK_ALIGN_MASK (STACK_ALIGNMENT - 1) #define STACK_ALIGN_MASK (STACK_ALIGNMENT - 1)