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stm32f7:SDMMC add dcache alignment check in dma{recv|send}setup
In the where CONFIG_SDIO_PREFLIGHT is not used and dcache write-buffed mode is used (not write-through) buffer alignment is required for DMA transfers because a) arch_invalidate_dcache could lose buffered writes data and b) arch_flush_dcache could corrupt adjacent memory if the buffer and the bufflen, are not on ARMV7M_DCACHE_LINESIZE boundaries.
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@@ -2843,16 +2843,21 @@ static int stm32_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
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DEBUGASSERT(priv != NULL && buffer != NULL && buflen > 0);
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DEBUGASSERT(priv != NULL && buffer != NULL && buflen > 0);
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#ifdef CONFIG_SDIO_PREFLIGHT
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#ifdef CONFIG_SDIO_PREFLIGHT
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DEBUGASSERT(stm32_dmapreflight(dev, buffer, buflen) == 0);
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DEBUGASSERT(stm32_dmapreflight(dev, buffer, buflen) == 0);
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#endif
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#else
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# if defined(CONFIG_ARMV7M_DCACHE) && !defined(CONFIG_ARMV7M_DCACHE_WRITETHROUGH)
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#ifdef CONFIG_ARMV7M_DCACHE
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/* buffer alignment is required for DMA transfers with dcache in buffered
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/* buffer alignment is required for DMA transfers with dcache */
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* mode (not write-through) because the arch_invalidate_dcache could lose
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* buffered buffered writes if the buffer alignment and sizes are not on
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* ARMV7M_DCACHE_LINESIZE boundaries.
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*/
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if (((uintptr_t)buffer & (ARMV7M_DCACHE_LINESIZE-1)) != 0 ||
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if (((uintptr_t)buffer & (ARMV7M_DCACHE_LINESIZE-1)) != 0 ||
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(buflen & (ARMV7M_DCACHE_LINESIZE-1)) != 0)
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(buflen & (ARMV7M_DCACHE_LINESIZE-1)) != 0)
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{
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{
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return -EFAULT;
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return -EFAULT;
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}
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}
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# endif
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#endif
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#endif
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/* Reset the DPSM configuration */
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/* Reset the DPSM configuration */
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@@ -2928,16 +2933,20 @@ static int stm32_dmasendsetup(FAR struct sdio_dev_s *dev,
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DEBUGASSERT(priv != NULL && buffer != NULL && buflen > 0);
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DEBUGASSERT(priv != NULL && buffer != NULL && buflen > 0);
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#ifdef CONFIG_SDIO_PREFLIGHT
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#ifdef CONFIG_SDIO_PREFLIGHT
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DEBUGASSERT(stm32_dmapreflight(dev, buffer, buflen) == 0);
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DEBUGASSERT(stm32_dmapreflight(dev, buffer, buflen) == 0);
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#endif
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#else
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# if defined(CONFIG_ARMV7M_DCACHE) && !defined(CONFIG_ARMV7M_DCACHE_WRITETHROUGH)
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#ifdef CONFIG_ARMV7M_DCACHE
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/* buffer alignment is required for DMA transfers with dcache in buffered
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/* buffer alignment is required for DMA transfers with dcache */
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* mode (not write-through) because the arch_flush_dcache would corrupt adjacent
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* memory if the buffer alignment and sizes are not on ARMV7M_DCACHE_LINESIZE
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* boundaries.
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*/
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if (((uintptr_t)buffer & (ARMV7M_DCACHE_LINESIZE-1)) != 0 ||
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if (((uintptr_t)buffer & (ARMV7M_DCACHE_LINESIZE-1)) != 0 ||
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(buflen & (ARMV7M_DCACHE_LINESIZE-1)) != 0)
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(buflen & (ARMV7M_DCACHE_LINESIZE-1)) != 0)
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{
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{
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return -EFAULT;
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return -EFAULT;
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}
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}
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# endif
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#endif
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#endif
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/* Reset the DPSM configuration */
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/* Reset the DPSM configuration */
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