diff --git a/arch/xtensa/src/esp32/esp32_cpuint.c b/arch/xtensa/src/esp32/esp32_cpuint.c
index 3218a377176..b730c7a4f61 100644
--- a/arch/xtensa/src/esp32/esp32_cpuint.c
+++ b/arch/xtensa/src/esp32/esp32_cpuint.c
@@ -209,11 +209,11 @@ static inline void xtensa_disable_all(void)
 }
 
 /****************************************************************************
- * Name:  esp32_alloc_cpuint
+ * Name:  esp32_getcpuint
  *
  * Description:
- *   Allocate a CPU interrupt for a peripheral device.  This function will
- *   not allocate any of the pre-allocated CPU interrupts for internal
+ *   Get a free CPU interrupt for a peripheral device.  This function will
+ *   not ignore all of the pre-allocated CPU interrupts for internal
  *   devices.
  *
  * Input Parameters:
@@ -221,14 +221,12 @@ static inline void xtensa_disable_all(void)
  *             be allocated from free interrupts within this set
  *
  * Returned Value:
- *   On success, the allocated level-sensitive, CPU interrupt number is
- *   returned.  A negated errno is returned on failure.  The only possible
- *   failure is that all level-sensitive CPU interrupts have already been
- *   allocated.
+ *   On success, a CPU interrupt number is returned.
+ *   A negated errno is returned on failure.
  *
  ****************************************************************************/
 
-static int esp32_alloc_cpuint(uint32_t intmask)
+static int esp32_getcpuint(uint32_t intmask)
 {
   irqstate_t flags;
   uint32_t *freeints;
@@ -401,7 +399,7 @@ int esp32_cpuint_initialize(void)
 }
 
 /****************************************************************************
- * Name:  esp32_alloc_levelint
+ * Name:  esp32_alloc_cpuint
  *
  * Description:
  *   Allocate a level CPU interrupt
@@ -410,58 +408,40 @@ int esp32_cpuint_initialize(void)
  *   priority - Priority of the CPU interrupt (1-5)
  *
  * Returned Value:
- *   On success, the allocated level-sensitive, CPU interrupt number is
- *   returned.  A negated errno is returned on failure.  The only possible
- *   failure is that all level-sensitive CPU interrupts have already been
+ *   On success, the allocated CPU interrupt number is returned.
+ *   A negated errno is returned on failure.  The only possible failure
+ *   is that all CPU interrupts of the requested type have already been
  *   allocated.
  *
  ****************************************************************************/
 
-int esp32_alloc_levelint(int priority)
+int esp32_alloc_cpuint(int priority, int type)
 {
-  uint32_t intmask;
+  uint32_t mask;
 
   DEBUGASSERT(priority >= ESP32_MIN_PRIORITY &&
               priority <= ESP32_MAX_PRIORITY);
+  DEBUGASSERT(type == ESP32_CPUINT_LEVEL ||
+              type == ESP32_CPUINT_EDGE);
 
-  /* Check if there are any level CPU interrupts available at the requested
-   * interrupt priority.
-   */
+  if (type == ESP32_CPUINT_LEVEL)
+    {
+      /* Check if there are any level CPU interrupts available at the
+       * requested interrupt priority.
+       */
 
-  intmask = g_priority[ESP32_PRIO_INDEX(priority)] & ESP32_CPUINT_LEVELSET;
-  return esp32_alloc_cpuint(intmask);
-}
+      mask = g_priority[ESP32_PRIO_INDEX(priority)] & ESP32_CPUINT_LEVELSET;
+    }
+  else
+    {
+      /* Check if there are any edge CPU interrupts available at the
+       * requested interrupt priority.
+       */
 
-/****************************************************************************
- * Name:  esp32_alloc_edgeint
- *
- * Description:
- *   Allocate an edge CPU interrupt
- *
- * Input Parameters:
- *   priority - Priority of the CPU interrupt (1-5)
- *
- * Returned Value:
- *   On success, the allocated edge-sensitive, CPU interrupt numbr is
- *   returned.  A negated errno is returned on failure.  The only possible
- *   failure is that all edge-sensitive CPU interrupts have already been
- *   allocated.
- *
- ****************************************************************************/
+      mask = g_priority[ESP32_PRIO_INDEX(priority)] & ESP32_CPUINT_EDGESET;
+    }
 
-int esp32_alloc_edgeint(int priority)
-{
-  uint32_t intmask;
-
-  DEBUGASSERT(priority >= ESP32_MIN_PRIORITY &&
-              priority <= ESP32_MAX_PRIORITY);
-
-  /* Check if there are any edge CPU interrupts available at the requested
-   * interrupt priority.
-   */
-
-  intmask = g_priority[ESP32_PRIO_INDEX(priority)] & ESP32_CPUINT_EDGESET;
-  return esp32_alloc_cpuint(intmask);
+  return esp32_getcpuint(mask);
 }
 
 /****************************************************************************
diff --git a/arch/xtensa/src/esp32/esp32_cpuint.h b/arch/xtensa/src/esp32/esp32_cpuint.h
index 4f5baf71fa4..958de272036 100644
--- a/arch/xtensa/src/esp32/esp32_cpuint.h
+++ b/arch/xtensa/src/esp32/esp32_cpuint.h
@@ -33,7 +33,14 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-#define CPUINT_UNASSIGNED 0xff  /* No peripheral assigned to this CPU interrupt */
+/* No peripheral assigned to this CPU interrupt */
+
+#define CPUINT_UNASSIGNED    0xff
+
+/* CPU interrupt types. */
+
+#define ESP32_CPUINT_LEVEL   0
+#define ESP32_CPUINT_EDGE    1
 
 /****************************************************************************
  * Public Data
@@ -78,7 +85,7 @@ extern uint32_t g_intenable[1];
 int esp32_cpuint_initialize(void);
 
 /****************************************************************************
- * Name:  esp32_alloc_levelint
+ * Name:  esp32_alloc_cpuint
  *
  * Description:
  *   Allocate a level CPU interrupt
@@ -87,33 +94,14 @@ int esp32_cpuint_initialize(void);
  *   priority - Priority of the CPU interrupt (1-5)
  *
  * Returned Value:
- *   On success, the allocated level-sensitive, CPU interrupt numbr is
- *   returned.  A negated errno is returned on failure.  The only possible
- *   failure is that all level-sensitive CPU interrupts have already been
+ *   On success, the allocated CPU interrupt number is returned.
+ *   A negated errno is returned on failure.  The only possible failure
+ *   is that all CPU interrupts of the requested type have already been
  *   allocated.
  *
  ****************************************************************************/
 
-int esp32_alloc_levelint(int priority);
-
-/****************************************************************************
- * Name:  esp32_alloc_edgeint
- *
- * Description:
- *   Allocate an edge CPU interrupt
- *
- * Input Parameters:
- *   priority - Priority of the CPU interrupt (1-5)
- *
- * Returned Value:
- *   On success, the allocated edge-sensitive, CPU interrupt numbr is
- *   returned.  A negated errno is returned on failure.  The only possible
- *   failure is that all edge-sensitive CPU interrupts have already been
- *   allocated.
- *
- ****************************************************************************/
-
-int esp32_alloc_edgeint(int priority);
+int esp32_alloc_cpuint(int priority, int type);
 
 /****************************************************************************
  * Name:  esp32_free_cpuint
diff --git a/arch/xtensa/src/esp32/esp32_cpustart.c b/arch/xtensa/src/esp32/esp32_cpustart.c
index 83e3cd68f34..c9509f939c8 100644
--- a/arch/xtensa/src/esp32/esp32_cpustart.c
+++ b/arch/xtensa/src/esp32/esp32_cpustart.c
@@ -92,7 +92,7 @@ static inline void xtensa_attach_fromcpu0_interrupt(void)
 
   /* Allocate a level-sensitive, priority 1 CPU interrupt for the UART */
 
-  cpuint = esp32_alloc_levelint(1);
+  cpuint = esp32_alloc_cpuint(1, ESP32_CPUINT_LEVEL);
   DEBUGASSERT(cpuint >= 0);
 
   /* Connect all CPU peripheral source to allocated CPU interrupt */
diff --git a/arch/xtensa/src/esp32/esp32_emac.c b/arch/xtensa/src/esp32/esp32_emac.c
index 1bf723f021f..76fc486b993 100644
--- a/arch/xtensa/src/esp32/esp32_emac.c
+++ b/arch/xtensa/src/esp32/esp32_emac.c
@@ -2187,7 +2187,7 @@ int esp32_emac_init(void)
 
   /* Allocate and register interrupt */
 
-  priv->cpuint = esp32_alloc_levelint(1);
+  priv->cpuint = esp32_alloc_cpuint(1, ESP32_CPUINT_LEVEL);
   if (priv->cpuint < 0)
     {
       nerr("ERROR: Failed alloc interrupt\n");
diff --git a/arch/xtensa/src/esp32/esp32_gpio.c b/arch/xtensa/src/esp32/esp32_gpio.c
index af75aeabfcb..13f36ef9f0d 100644
--- a/arch/xtensa/src/esp32/esp32_gpio.c
+++ b/arch/xtensa/src/esp32/esp32_gpio.c
@@ -412,7 +412,7 @@ void esp32_gpioirqinitialize(void)
 
   /* Allocate a level-sensitive, priority 1 CPU interrupt */
 
-  g_gpio_cpuint = esp32_alloc_levelint(1);
+  g_gpio_cpuint = esp32_alloc_cpuint(1, ESP32_CPUINT_LEVEL);
   DEBUGASSERT(g_gpio_cpuint >= 0);
 
   /* Set up to receive peripheral interrupts on the current CPU */
diff --git a/arch/xtensa/src/esp32/esp32_i2c.c b/arch/xtensa/src/esp32/esp32_i2c.c
index 4c417334c59..83d9e6a712a 100644
--- a/arch/xtensa/src/esp32/esp32_i2c.c
+++ b/arch/xtensa/src/esp32/esp32_i2c.c
@@ -1554,7 +1554,7 @@ FAR struct i2c_master_s *esp32_i2cbus_initialize(int port)
 
 #ifndef CONFIG_I2C_POLLED
   config = priv->config;
-  priv->cpuint = esp32_alloc_levelint(1);
+  priv->cpuint = esp32_alloc_cpuint(1, ESP32_CPUINT_LEVEL);
   if (priv->cpuint < 0)
     {
       /* Failed to allocate a CPU interrupt of this type */
diff --git a/arch/xtensa/src/esp32/esp32_irq.c b/arch/xtensa/src/esp32/esp32_irq.c
index efe480166d6..80e46ab7bfb 100644
--- a/arch/xtensa/src/esp32/esp32_irq.c
+++ b/arch/xtensa/src/esp32/esp32_irq.c
@@ -134,7 +134,7 @@ static inline void xtensa_attach_fromcpu1_interrupt(void)
 
   /* Allocate a level-sensitive, priority 1 CPU interrupt for the UART */
 
-  cpuint = esp32_alloc_levelint(1);
+  cpuint = esp32_alloc_cpuint(1, ESP32_CPUINT_LEVEL);
   DEBUGASSERT(cpuint >= 0);
 
   /* Connect all CPU peripheral source to allocated CPU interrupt */
diff --git a/arch/xtensa/src/esp32/esp32_serial.c b/arch/xtensa/src/esp32/esp32_serial.c
index ca750228339..29b1085b38c 100644
--- a/arch/xtensa/src/esp32/esp32_serial.c
+++ b/arch/xtensa/src/esp32/esp32_serial.c
@@ -1015,7 +1015,7 @@ static int esp32_attach(struct uart_dev_s *dev)
 
   /* Allocate a level-sensitive, priority 1 CPU interrupt for the UART */
 
-  priv->cpuint = esp32_alloc_levelint(1);
+  priv->cpuint = esp32_alloc_cpuint(1, ESP32_CPUINT_LEVEL);
   if (priv->cpuint < 0)
     {
       /* Failed to allocate a CPU interrupt of this type */
diff --git a/arch/xtensa/src/esp32/esp32_spi.c b/arch/xtensa/src/esp32/esp32_spi.c
index 1637ea0b53f..1d2e30a747c 100644
--- a/arch/xtensa/src/esp32/esp32_spi.c
+++ b/arch/xtensa/src/esp32/esp32_spi.c
@@ -1464,7 +1464,7 @@ FAR struct spi_dev_s *esp32_spibus_initialize(int port)
 
   if (priv->config->use_dma)
     {
-      priv->cpuint = esp32_alloc_levelint(1);
+      priv->cpuint = esp32_alloc_cpuint(1, ESP32_CPUINT_LEVEL);
       if (priv->cpuint < 0)
         {
           leave_critical_section(flags);
diff --git a/arch/xtensa/src/esp32/esp32_spi_slave.c b/arch/xtensa/src/esp32/esp32_spi_slave.c
index a42c9a14423..b403cfcbe95 100644
--- a/arch/xtensa/src/esp32/esp32_spi_slave.c
+++ b/arch/xtensa/src/esp32/esp32_spi_slave.c
@@ -1296,7 +1296,7 @@ FAR struct spi_slave_ctrlr_s *esp32_spislv_ctrlr_initialize(int port)
                          esp32_io_interrupt,
                          priv));
 
-  priv->cpuint = esp32_alloc_levelint(1);
+  priv->cpuint = esp32_alloc_cpuint(1, ESP32_CPUINT_LEVEL);
   if (priv->cpuint < 0)
     {
       leave_critical_section(flags);
diff --git a/arch/xtensa/src/esp32/esp32_tim.c b/arch/xtensa/src/esp32/esp32_tim.c
index 85f111aa365..c60bf002ff2 100644
--- a/arch/xtensa/src/esp32/esp32_tim.c
+++ b/arch/xtensa/src/esp32/esp32_tim.c
@@ -556,7 +556,7 @@ static int esp32_tim_setisr(FAR struct esp32_tim_dev_s *dev, xcpt_t handler,
 
       /* Verify the available level CPU Interrupt */
 
-      tim->cpuint = esp32_alloc_levelint(tim->priority);
+      tim->cpuint = esp32_alloc_cpuint(tim->priority, ESP32_CPUINT_LEVEL);
       if (tim->cpuint < 0)
         {
           tmrerr("ERROR: No CPU Interrupt available");
diff --git a/arch/xtensa/src/esp32/esp32_wdt.c b/arch/xtensa/src/esp32/esp32_wdt.c
index 886b4c072ed..191a0b87f18 100644
--- a/arch/xtensa/src/esp32/esp32_wdt.c
+++ b/arch/xtensa/src/esp32/esp32_wdt.c
@@ -742,7 +742,7 @@ static int esp32_wdt_setisr(FAR struct esp32_wdt_dev_s *dev, xcpt_t handler,
     {
       /* Verify the available CPU Interrupt */
 
-      wdt->cpuint = esp32_alloc_levelint(1);
+      wdt->cpuint = esp32_alloc_cpuint(1, ESP32_CPUINT_LEVEL);
       if (wdt->cpuint < 0)
         {
           tmrerr("ERROR: No CPU Interrupt available");