mirror of
https://github.com/apache/nuttx.git
synced 2026-05-24 07:46:16 +08:00
arch/mips/src/pic32mz: Add DMA support.
This commit is contained in:
committed by
Gregory Nutt
parent
87499ba3ec
commit
ee32b449a6
@@ -52,7 +52,7 @@
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#elif defined(CHIP_PIC32MZEF)
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# include <arch/pic32mz/irq_pic32mzxxxef.h>
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#else
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# error "Unknown PIC32MZ family
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# error "Unknown PIC32MZ family"
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#endif
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/****************************************************************************
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@@ -111,3 +111,8 @@ endif
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ifeq ($(CONFIG_PIC32MZ_ETHERNET),y)
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CHIP_CSRCS += pic32mz-ethernet.c
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endif
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ifeq ($(CONFIG_PIC32MZ_DMA),y)
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CHIP_CSRCS += pic32mz-dma.c
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endif
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@@ -52,7 +52,7 @@
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********************************************************************************************/
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/* DMA Channel Offsets **********************************************************************/
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#define PIC32MZ_DMACHn_OFFSET(n) (0x0060 + 00c0 *(n))
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#define PIC32MZ_DMACHn_OFFSET(n) (0x0060 + 0xc0 *(n))
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# define PIC32MZ_DMACH0_OFFSET 0x0060
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# define PIC32MZ_DMACH1_OFFSET 0x0120
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# define PIC32MZ_DMACH2_OFFSET 0x01e0
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@@ -386,6 +386,7 @@
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# define PIC32MZ_DMACH2_DATCLR (PIC32MZ_DMACH2_K1BASE+PIC32MZ_DMACH_DATCLR_OFFSET)
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# define PIC32MZ_DMACH2_DATSET (PIC32MZ_DMACH2_K1BASE+PIC32MZ_DMACH_DATSET_OFFSET)
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# define PIC32MZ_DMACH2_DATINV (PIC32MZ_DMACH2_K1BASE+PIC32MZ_DMACH_DATINV_OFFSET)
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#endif
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#if CHIP_NDMACH > 3
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# define PIC32MZ_DMACH3_CON (PIC32MZ_DMACH3_K1BASE+PIC32MZ_DMACH_CON_OFFSET)
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@@ -658,8 +659,8 @@
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/* DMA Status Register */
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#define DMA_STAT_DMACH_SHIFT (0) /* Bits 0-1: DMA channel */
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#define DMA_STAT_DMACH_MASK (3 << DMA_STAT_DMACH_SHIFT)
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#define DMA_STAT_RDWR (1 << 3) /* Bit 3: Read/write status */
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#define DMA_STAT_DMACH_MASK (7 << DMA_STAT_DMACH_SHIFT)
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#define DMA_STAT_RDWR (1 << 31) /* Bit 31: Read/write status */
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/* DMA Address Register -- This register contains a 32-bit address value */
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@@ -737,6 +738,10 @@
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#define DMACH_INT_CHDDIE (1 << 21) /* Bit 21: Channel destination done interrupt enable */
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#define DMACH_INT_CHSHIE (1 << 22) /* Bit 22: Channel source half empty interrupt enable */
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#define DMACH_INT_CHSDIE (1 << 23) /* Bit 23: Channel source done interrupt enable */
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#define DMACH_INT_FLAGS_SHIFT (0) /* Bits 0-7: Channel Interrupt flags */
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#define DMACH_INT_FLAGS_MASK (0xff << DMACH_INT_FLAGS_SHIFT)
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#define DMACH_INT_EN_SHIFT (16) /* Bits 16-23: Channel Interrupt Enable events */
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#define DMACH_INT_EN_MASK (0xff << DMACH_INT_EN_SHIFT)
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/* DMA Channel Source Start Address Register -- This register contains a 32-bit address value */
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/* DMA Channel Destination Start Address Register -- This register contains a 32-bit address value */
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@@ -762,7 +767,7 @@
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/* DMA Channel Cell Pointer Register -- 16 bits of byte transferred data */
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#define DMACH_DPCR_MASK 0x0000ffff
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#define DMACH_CPTR_MASK 0x0000ffff
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/* DMA Channel Pattern Data Register -- 16 bits of pattern data */
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@@ -47,7 +47,7 @@
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#elif defined(CONFIG_ARCH_CHIP_PIC32MZEF)
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# include "hardware/pic32mzef-memorymap.h"
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#else
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# error Unknown PIC32MZ family
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# error "Unknown PIC32MZ family"
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#endif
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#endif /* __ARCH_MIPS_SRC_PIC32MZ_HARDWARE_PIC32MZ_MEMORYMAP_H */
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File diff suppressed because it is too large
Load Diff
+190
-102
@@ -1,7 +1,7 @@
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/************************************************************************************
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* arch/mips/src/pic32mx/pic32mx-dma.h
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* arch/mips/src/pic32mz/pic32mz-dma.h
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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* Copyright (C) 2015, 2019 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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@@ -36,6 +36,40 @@
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#ifndef __ARCH_MIPS_SRC_PIC32MZ_PIC32MZ_DMA_H
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#define __ARCH_MIPS_SRC_PIC32MZ_PIC32MZ_DMA_H
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/* General Usage:
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*
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* 1. Allocate a DMA channel
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*
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* DMA_HANDLE handle;
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* handle = pic32mz_dma_alloc(chcfg);
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*
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* where chcfg is the channel's configuration (see struct pic32mz_dma_chcfg)
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*
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* 2. Setup the transfer
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*
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* struct pic32mz_dma_xfrcfg_s xfrcfg;
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* xfrcfg.srcaddr = ...;
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* xfrcfg.destaddr = ...;
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* etc.
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*
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* pic32mz_dma_xfrsetup(handle, xfrcfg);
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*
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* 3. Start the transfer
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*
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* pic32mz_dma_start(handle, callback, arg);
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*
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* If a start irq is set this function will only enable the channel.
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* The transfer will be controlled by the start irq.
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* If no start irq is specified then the a force start is performed.
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*
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* 4. Stop and free the channel
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*
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* The DMA channel can be aborted if an abort irq is set.
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* Alternatively, call to pic32mz_dma_stop will force the abort.
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*
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* pic32mz_dma_free will free the channel and make it available.
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*/
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/************************************************************************************
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* Included Files
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************************************************************************************/
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@@ -46,49 +80,129 @@
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#include <sys/types.h>
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#include <stdint.h>
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#include "hardware/pic32mz-dma.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/************************************************************************************
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/* Interrupt type arguments for pic32mz_dma_intctrl. */
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#define PIC32MZ_DMA_INT_SRCDONE DMACH_INT_CHSDIE
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#define PIC32MZ_DMA_INT_SRCHALF DMACH_INT_CHSHIE
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#define PIC32MZ_DMA_INT_DESTDONE DMACH_INT_CHDDIE
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#define PIC32MZ_DMA_INT_DESTHALF DMACH_INT_CHDHIE
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#define PIC32MZ_DMA_INT_BLOCKDONE DMACH_INT_CHBCIE
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#define PIC32MZ_DMA_INT_CELLDONE DMACH_INT_CHCCIE
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#define PIC32MZ_DMA_INT_ABORT DMACH_INT_CHTAIE
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#define PIC32MZ_DMA_INT_ERR DMACH_INT_CHERIE
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#define PIC32MZ_DMA_INT_DISABLE (0)
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/* This is used when setting a channel with no start/abort event */
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#define PIC32MZ_DMA_NOEVENT (NR_IRQS + 1)
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/*******************************************************************************
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* Public Types
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************************************************************************************/
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*
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******************************************************************************/
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#ifndef __ASSEMBLY__
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typedef FAR void *DMA_HANDLE;
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typedef void (*dma_callback_t)(DMA_HANDLE handle, void *arg, int result);
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typedef void (*dma_callback_t)(DMA_HANDLE handle, uint8_t status, void *arg);
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/* The following is used for sampling DMA registers when CONFIG DEBUG_DMA is selected */
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enum pic32mz_dma_chmode_e
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{
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PIC32MZ_DMA_MODE_BASIC = 1 << 0U, /* Basic transfert mode */
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PIC32MZ_DMA_MODE_AUTOEN = 1 << 1U, /* Channel Auto-Enable mode */
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PIC32MZ_DMA_MODE_PMATCH = 1 << 2U, /* Pattern Match termination mode */
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PIC32MZ_DMA_MODE_CHCHAIN = 1 << 3U, /* Channel chaining mode */
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PIC32MZ_DMA_MODE_SFM = 1 << 4U /* Special Function Module mode */
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};
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/* This structure holds the channel's configuration */
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struct pic32mz_dma_chcfg_s
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{
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uint8_t priority; /* Channel's priority (0..3) */
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uint8_t startirq; /* Start event */
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uint8_t abortirq; /* Abort event */
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uint8_t event; /* Interrupt event */
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enum pic32mz_dma_chmode_e mode; /* Channel's mode of operation */
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};
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/* This structure holds a transfer's configuration */
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struct pic32mz_dma_xfrcfg_s
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{
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uint32_t srcaddr; /* Source address */
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uint32_t destaddr; /* Destination address */
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uint16_t srcsize; /* Source size */
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uint16_t destsize; /* Destination size */
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uint16_t cellsize; /* Cell size */
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};
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/* The following is used for sampling DMA registers when CONFIG_DEBUG_DMA
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* is selected
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*/
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#ifdef CONFIG_DEBUG_DMA
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struct pic32mx_dmaglobalregs_s
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{
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/* Global Registers */
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#warning "Missing definitions"
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};
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struct pic32mx_dmachanregs_s
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{
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/* Channel Registers */
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#warning "Missing definitions"
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};
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struct pic32mx_dmaregs_s
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struct pic32mz_dmagblregs_s
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{
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/* Global Registers */
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struct pic32mx_dmaglobalregs_s gbl;
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uint32_t con;
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uint32_t stat;
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uint32_t addr;
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};
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struct pic32mz_dmacrcregs_s
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{
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/* CRC Registers */
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uint32_t con;
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uint32_t data;
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uint32_t xor;
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};
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struct pic32mz_dmachanregs_s
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{
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/* Channel Registers */
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uint32_t con;
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uint32_t econ;
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uint32_t intcon;
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uint32_t ssa;
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uint32_t dsa;
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uint32_t ssiz;
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uint32_t dsiz;
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uint32_t sptr;
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uint32_t dptr;
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uint32_t csiz;
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uint32_t cptr;
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uint32_t dat;
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};
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struct pic32mz_dmaregs_s
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{
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/* Global Registers */
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struct pic32mz_dmagblregs_s gbl;
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/* CRC Registers */
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struct pic32mz_dmacrcregs_s crc;
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/* Channel Registers */
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struct pic32mx_dmachanregs_s ch;
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struct pic32mz_dmachanregs_s ch;
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};
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#endif
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/************************************************************************************
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/*******************************************************************************
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* Public Data
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************************************************************************************/
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******************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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@@ -99,129 +213,102 @@ extern "C"
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#define EXTERN extern
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#endif
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/************************************************************************************
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/*******************************************************************************
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* Public Function Prototypes
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************************************************************************************/
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******************************************************************************/
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/************************************************************************************
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* Name: pic32mx_dmainitialize
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/*******************************************************************************
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* Name: pic32mz_dma_alloc
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*
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* Description:
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* Initialize the GPDMA subsystem.
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* Allocate a DMA channel. This function sets aside a DMA channel and gives
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* the caller exclusive access to the DMA channel.
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*
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* Returned Value:
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* On success, this function returns a non-NULL, void* DMA channel handle.
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* NULL is returned on any failure.
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* This function can fail only if no DMA channel is available.
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*
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******************************************************************************/
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DMA_HANDLE pic32mz_dma_alloc(const struct pic32mz_dma_chcfg_s *cfg);
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/*******************************************************************************
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* Name: pic32mz_dma_free
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*
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* Description:
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* Release a DMA channel.
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* NOTE: The 'handle' used in this argument must NEVER be used again until
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* pic32mz_dmachannel() is called again to re-gain a valid handle.
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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******************************************************************************/
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#ifdef CONFIG_PIC32MX_DMA
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void pic32mx_dmainitilaize(void);
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#endif
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void pic32mz_dma_free(DMA_HANDLE handle);
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/************************************************************************************
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* Name: pic32mx_dmachannel
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*
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* Description:
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* Allocate a DMA channel. This function sets aside a DMA channel and gives the
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* caller exclusive access to the DMA channel.
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*
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* Returned Value:
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* One success, this function returns a non-NULL, void* DMA channel handle. NULL
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* is returned on any failure. This function can fail only if no DMA channel is
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* available.
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*
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************************************************************************************/
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#ifdef CONFIG_PIC32MX_DMA
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DMA_HANDLE pic32mx_dmachannel(void);
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#endif
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/************************************************************************************
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* Name: pic32mx_dmafree
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*
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* Description:
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* Release a DMA channel. NOTE: The 'handle' used in this argument must NEVER be
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* used again until pic32mx_dmachannel() is called again to re-gain a valid handle.
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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#ifdef CONFIG_PIC32MX_DMA
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void pic32mx_dmafree(DMA_HANDLE handle);
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#endif
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/************************************************************************************
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* Name: pic32mx_dmasetup
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/*******************************************************************************
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* Name: pic32mz_dma_xfrsetup
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*
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* Description:
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* Configure DMA for one transfer.
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*
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************************************************************************************/
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******************************************************************************/
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#ifdef CONFIG_PIC32MX_DMA
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int pic32mx_dmarxsetup(DMA_HANDLE handle, uint32_t control, uint32_t config,
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uint32_t srcaddr, uint32_t destaddr, size_t nbytes);
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#endif
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int pic32mz_dma_xfrsetup(DMA_HANDLE handle,
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FAR const struct pic32mz_dma_xfrcfg_s *cfg);
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/************************************************************************************
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* Name: pic32mx_dmastart
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/*******************************************************************************
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* Name: pic32mz_dma_start
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*
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* Description:
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* Start the DMA transfer
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*
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************************************************************************************/
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******************************************************************************/
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#ifdef CONFIG_PIC32MX_DMA
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int pic32mx_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg);
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#endif
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int pic32mz_dma_start(DMA_HANDLE handle, dma_callback_t callback, void *arg);
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/************************************************************************************
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* Name: pic32mx_dmastop
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/*******************************************************************************
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* Name: pic32mz_dma_stop
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*
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* Description:
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* Cancel the DMA. After pic32mx_dmastop() is called, the DMA channel is reset
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* and pic32mx_dmasetup() must be called before pic32mx_dmastart() can be called
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* again
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* Cancel the DMA.
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* After pic32mz_dma_stop() is called, the DMA channel is reset
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* and pic32mz_dma_xfrsetup() must be called before pic32mz_dma_start()
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* can be called again.
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*
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************************************************************************************/
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******************************************************************************/
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#ifdef CONFIG_PIC32MX_DMA
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void pic32mx_dmastop(DMA_HANDLE handle);
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#endif
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void pic32mz_dma_stop(DMA_HANDLE handle);
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/************************************************************************************
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* Name: pic32mx_dmasample
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/*******************************************************************************
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* Name: pic32mz_dma_sample
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*
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* Description:
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* Sample DMA register contents
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*
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************************************************************************************/
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******************************************************************************/
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#ifdef CONFIG_PIC32MX_DMA
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#ifdef CONFIG_DEBUG_DMA
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void pic32mx_dmasample(DMA_HANDLE handle, struct pic32mx_dmaregs_s *regs);
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void pic32mz_dma_sample(DMA_HANDLE handle, struct pic32mz_dmaregs_s *regs);
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#else
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# define pic32mx_dmasample(handle,regs)
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#endif
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# define pic32mz_dma_sample(handle,regs)
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#endif
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/************************************************************************************
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* Name: pic32mx_dmadump
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/*******************************************************************************
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* Name: pic32mz_dma_dump
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*
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* Description:
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* Dump previously sampled DMA register contents
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*
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************************************************************************************/
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******************************************************************************/
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#ifdef CONFIG_PIC32MX_DMA
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#ifdef CONFIG_DEBUG_DMA
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void pic32mx_dmadump(DMA_HANDLE handle, const struct pic32mx_dmaregs_s *regs,
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void pic32mz_dma_dump(DMA_HANDLE handle, const struct pic32mz_dmaregs_s *regs,
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const char *msg);
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#else
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# define pic32mx_dmadump(handle,regs,msg)
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#endif
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# define pic32mz_dma_dump(handle,regs,msg)
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#endif
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#if defined(__cplusplus)
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@@ -231,3 +318,4 @@ void pic32mx_dmadump(DMA_HANDLE handle, const struct pic32mx_dmaregs_s *regs,
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_MIPS_SRC_PIC32MZ_PIC32MZ_DMA_H */
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