diff --git a/arch/risc-v/src/common/espressif/Bootloader.cmake b/arch/risc-v/src/common/espressif/Bootloader.cmake
new file mode 100644
index 00000000000..e9d7d397407
--- /dev/null
+++ b/arch/risc-v/src/common/espressif/Bootloader.cmake
@@ -0,0 +1,318 @@
+# ##############################################################################
+# arch/risc-v/src/common/espressif/Bootloader.cmake
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+# ##############################################################################
+# Bootloader Configuration Variables
+# ##############################################################################
+
+set(TOOLSDIR ${NUTTX_DIR}/tools/espressif)
+set(BOOTLOADER_SRCDIR ${CMAKE_CURRENT_SOURCE_DIR}/bootloader)
+set(BOOTLOADER_OUTDIR ${BOOTLOADER_SRCDIR}/out)
+set(BOOTLOADER_CONFIG ${BOOTLOADER_SRCDIR}/bootloader.conf)
+
+# MCUboot
+
+set(MCUBOOT_SRCDIR ${BOOTLOADER_SRCDIR}/mcuboot)
+set(MCUBOOT_ESPDIR ${MCUBOOT_SRCDIR}/boot/espressif)
+set(MCUBOOT_TOOLCHAIN ${TOOLSDIR}/mcuboot_toolchain_espressif.cmake)
+set(HALDIR ${BOOTLOADER_SRCDIR}/esp-hal-3rdparty-mcuboot)
+
+if(DEFINED ENV{MCUBOOT_VERSION})
+  set(MCUBOOT_VERSION $ENV{MCUBOOT_VERSION})
+elseif(DEFINED CONFIG_ESPRESSIF_MCUBOOT_VERSION)
+  set(MCUBOOT_VERSION ${CONFIG_ESPRESSIF_MCUBOOT_VERSION})
+else()
+  message(
+    WARNING
+      "CONFIG_ESPRESSIF_MCUBOOT_VERSION is not defined; MCUBOOT_VERSION will be empty."
+  )
+  set(MCUBOOT_VERSION "")
+endif()
+
+if(DEFINED ENV{MCUBOOT_URL})
+  set(MCUBOOT_URL $ENV{MCUBOOT_URL})
+else()
+  set(MCUBOOT_URL "https://github.com/mcu-tools/mcuboot")
+endif()
+
+if(NOT DEFINED ESP_HAL_3RDPARTY_VERSION_FOR_MCUBOOT)
+  set(ESP_HAL_3RDPARTY_VERSION_FOR_MCUBOOT
+      911dbec8e4a92e70056b58a3d2b0d965b8b7bcc9)
+endif()
+
+# ##############################################################################
+# Bootloader Configuration File Generation
+# ##############################################################################
+
+function(generate_bootloader_config)
+  # Create bootloader source directory if it doesn't exist
+  file(MAKE_DIRECTORY ${BOOTLOADER_SRCDIR})
+
+  # Start with base configuration
+  set(CONFIG_CONTENT "")
+
+  # NON_OS_BUILD is always enabled
+  string(APPEND CONFIG_CONTENT "NON_OS_BUILD=1\n")
+
+  # Flash size configuration
+  if(CONFIG_ESPRESSIF_FLASH_2M)
+    string(APPEND CONFIG_CONTENT "CONFIG_ESPTOOLPY_FLASHSIZE_2MB=1\n")
+  endif()
+  if(CONFIG_ESPRESSIF_FLASH_4M)
+    string(APPEND CONFIG_CONTENT "CONFIG_ESPTOOLPY_FLASHSIZE_4MB=1\n")
+  endif()
+
+  # Flash mode configuration
+  if(CONFIG_ESPRESSIF_FLASH_MODE_DIO)
+    string(APPEND CONFIG_CONTENT "CONFIG_ESPTOOLPY_FLASHMODE_DIO=1\n")
+  endif()
+  if(CONFIG_ESPRESSIF_FLASH_MODE_DOUT)
+    string(APPEND CONFIG_CONTENT "CONFIG_ESPTOOLPY_FLASHMODE_DOUT=1\n")
+  endif()
+  if(CONFIG_ESPRESSIF_FLASH_MODE_QIO)
+    string(APPEND CONFIG_CONTENT "CONFIG_ESPTOOLPY_FLASHMODE_QIO=1\n")
+  endif()
+  if(CONFIG_ESPRESSIF_FLASH_MODE_QOUT)
+    string(APPEND CONFIG_CONTENT "CONFIG_ESPTOOLPY_FLASHMODE_QOUT=1\n")
+  endif()
+
+  # Flash frequency configuration
+  if(CONFIG_ESPRESSIF_FLASH_FREQ_80M)
+    string(APPEND CONFIG_CONTENT "CONFIG_ESPTOOLPY_FLASHFREQ_80M=1\n")
+  endif()
+  if(CONFIG_ESPRESSIF_FLASH_FREQ_64M)
+    string(APPEND CONFIG_CONTENT "CONFIG_ESPTOOLPY_FLASHFREQ_64M=1\n")
+  endif()
+  if(CONFIG_ESPRESSIF_FLASH_FREQ_48M)
+    string(APPEND CONFIG_CONTENT "CONFIG_ESPTOOLPY_FLASHFREQ_48M=1\n")
+  endif()
+  if(CONFIG_ESPRESSIF_FLASH_FREQ_40M)
+    string(APPEND CONFIG_CONTENT "CONFIG_ESPTOOLPY_FLASHFREQ_40M=1\n")
+  endif()
+  if(CONFIG_ESPRESSIF_FLASH_FREQ_26M)
+    string(APPEND CONFIG_CONTENT "CONFIG_ESPTOOLPY_FLASHFREQ_26M=1\n")
+  endif()
+  if(CONFIG_ESPRESSIF_FLASH_FREQ_20M)
+    string(APPEND CONFIG_CONTENT "CONFIG_ESPTOOLPY_FLASHFREQ_20M=1\n")
+  endif()
+  if(DEFINED CONFIG_ESPRESSIF_FLASH_FREQ)
+    string(APPEND CONFIG_CONTENT
+           "CONFIG_ESPTOOLPY_FLASHFREQ=${CONFIG_ESPRESSIF_FLASH_FREQ}\n")
+  endif()
+
+  # MCUboot specific configuration
+  if(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT)
+    string(APPEND CONFIG_CONTENT "CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT=1\n")
+    string(APPEND CONFIG_CONTENT "CONFIG_ESP_BOOTLOADER_OFFSET=0x0000\n")
+    string(APPEND CONFIG_CONTENT "CONFIG_ESP_BOOTLOADER_SIZE=0xF000\n")
+    string(
+      APPEND
+      CONFIG_CONTENT
+      "CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS=${CONFIG_ESPRESSIF_OTA_PRIMARY_SLOT_OFFSET}\n"
+    )
+    string(APPEND CONFIG_CONTENT
+           "CONFIG_ESP_APPLICATION_SIZE=${CONFIG_ESPRESSIF_OTA_SLOT_SIZE}\n")
+    string(
+      APPEND
+      CONFIG_CONTENT
+      "CONFIG_ESP_IMAGE0_SECONDARY_START_ADDRESS=${CONFIG_ESPRESSIF_OTA_SECONDARY_SLOT_OFFSET}\n"
+    )
+    string(APPEND CONFIG_CONTENT "CONFIG_ESP_MCUBOOT_WDT_ENABLE=1\n")
+    string(APPEND CONFIG_CONTENT "CONFIG_LIBC_NEWLIB=1\n")
+    string(APPEND CONFIG_CONTENT
+           "CONFIG_ESP_SCRATCH_OFFSET=${CONFIG_ESPRESSIF_OTA_SCRATCH_OFFSET}\n")
+    string(APPEND CONFIG_CONTENT
+           "CONFIG_ESP_SCRATCH_SIZE=${CONFIG_ESPRESSIF_OTA_SCRATCH_SIZE}\n")
+    string(APPEND CONFIG_CONTENT "CONFIG_ESP_CONSOLE_UART=1\n")
+
+    # UART console configuration
+    if(CONFIG_UART0_SERIAL_CONSOLE)
+      string(APPEND CONFIG_CONTENT "CONFIG_ESP_CONSOLE_UART_NUM=0\n")
+      string(APPEND CONFIG_CONTENT "CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM=0\n")
+    endif()
+    if(CONFIG_UART1_SERIAL_CONSOLE)
+      string(APPEND CONFIG_CONTENT "CONFIG_ESP_CONSOLE_UART_NUM=1\n")
+      string(APPEND CONFIG_CONTENT "CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM=1\n")
+    endif()
+    if(CONFIG_ESPRESSIF_USBSERIAL)
+      string(APPEND CONFIG_CONTENT "CONFIG_ESP_CONSOLE_UART_NUM=0\n")
+    endif()
+
+    # Secure flash encryption configuration
+    if(CONFIG_ESPRESSIF_SECURE_FLASH_ENC_ENABLED)
+      string(APPEND CONFIG_CONTENT "CONFIG_SECURE_FLASH_ENC_ENABLED=1\n")
+    endif()
+    if(CONFIG_ESPRESSIF_SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT)
+      string(APPEND CONFIG_CONTENT
+             "CONFIG_SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT=1\n")
+    endif()
+    if(CONFIG_ESPRESSIF_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC)
+      string(APPEND CONFIG_CONTENT
+             "CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=1\n")
+    endif()
+    if(CONFIG_ESPRESSIF_SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC)
+      string(APPEND CONFIG_CONTENT
+             "CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC=1\n")
+    endif()
+    if(CONFIG_ESPRESSIF_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE)
+      string(APPEND CONFIG_CONTENT
+             "CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE=1\n")
+    endif()
+
+    string(APPEND CONFIG_CONTENT "CONFIG_BOOTLOADER_LOG_LEVEL=3\n")
+
+    # EFUSE virtual configuration
+    if(CONFIG_ESPRESSIF_EFUSE_VIRTUAL_KEEP_IN_FLASH)
+      string(APPEND CONFIG_CONTENT "CONFIG_EFUSE_VIRTUAL=1\n")
+      string(APPEND CONFIG_CONTENT "CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH=1\n")
+      string(
+        APPEND
+        CONFIG_CONTENT
+        "CONFIG_EFUSE_VIRTUAL_OFFSET=${CONFIG_ESPRESSIF_EFUSE_VIRTUAL_KEEP_IN_FLASH_OFFSET}\n"
+      )
+      string(
+        APPEND
+        CONFIG_CONTENT
+        "CONFIG_EFUSE_VIRTUAL_SIZE=${CONFIG_ESPRESSIF_EFUSE_VIRTUAL_KEEP_IN_FLASH_SIZE}\n"
+      )
+    endif()
+  endif()
+
+  # Write configuration file
+  file(WRITE ${BOOTLOADER_CONFIG} ${CONFIG_CONTENT})
+endfunction()
+
+# ##############################################################################
+# Bootloader Build Configuration
+# ##############################################################################
+
+set(BOOTLOADER_BIN ${NUTTX_DIR}/mcuboot-${CHIP_SERIES}.bin)
+
+# Generate bootloader configuration file
+generate_bootloader_config()
+
+# Clone ESP HAL for MCUboot
+if(NOT EXISTS ${HALDIR})
+  message(
+    STATUS "Cloning Espressif HAL for 3rd Party Platforms (MCUBoot build)")
+  FetchContent_Declare(
+    esp_hal_3rdparty_mcuboot
+    GIT_REPOSITORY ${ESP_HAL_3RDPARTY_URL}
+    GIT_TAG ${ESP_HAL_3RDPARTY_VERSION_FOR_MCUBOOT}
+    GIT_SUBMODULES "" SOURCE_DIR ${HALDIR})
+
+  FetchContent_MakeAvailable(esp_hal_3rdparty_mcuboot)
+endif()
+
+# Parse flash parameters from config file (matching build_mcuboot.sh logic)
+set(MCUBOOT_BUILD_DIR "${NUTTX_DIR}/build-${CHIP_SERIES}-bootloader")
+set(MCUBOOT_SOURCE_DIR "${MCUBOOT_SRCDIR}/boot/espressif")
+
+# Determine flash size (default: 4MB)
+if(CONFIG_ESPRESSIF_FLASH_2M)
+  set(MCUBOOT_FLASH_SIZE "2MB")
+elseif(CONFIG_ESPRESSIF_FLASH_4M)
+  set(MCUBOOT_FLASH_SIZE "4MB")
+else()
+  set(MCUBOOT_FLASH_SIZE "4MB")
+endif()
+
+# Determine flash mode (default: dio)
+if(CONFIG_ESPRESSIF_FLASH_MODE_DIO)
+  set(MCUBOOT_FLASH_MODE "dio")
+elseif(CONFIG_ESPRESSIF_FLASH_MODE_DOUT)
+  set(MCUBOOT_FLASH_MODE "dout")
+elseif(CONFIG_ESPRESSIF_FLASH_MODE_QIO)
+  set(MCUBOOT_FLASH_MODE "qio")
+elseif(CONFIG_ESPRESSIF_FLASH_MODE_QOUT)
+  set(MCUBOOT_FLASH_MODE "qout")
+else()
+  set(MCUBOOT_FLASH_MODE "dio")
+endif()
+
+# Flash frequency for esptool (must match CONFIG_ESPTOOLPY_FLASHFREQ in
+# bootloader.conf / build_mcuboot.sh). Kconfig maps some choices to different
+# strings (e.g. ESP32-H2 64 MHz -> CONFIG_ESPRESSIF_FLASH_FREQ is 48m; esptool
+# v5 has no 64m).
+if(DEFINED CONFIG_ESPRESSIF_FLASH_FREQ AND NOT "${CONFIG_ESPRESSIF_FLASH_FREQ}"
+                                           STREQUAL "")
+  string(REPLACE "\"" "" MCUBOOT_FLASH_FREQ "${CONFIG_ESPRESSIF_FLASH_FREQ}")
+elseif(CONFIG_ESPRESSIF_FLASH_FREQ_80M)
+  set(MCUBOOT_FLASH_FREQ "80m")
+elseif(CONFIG_ESPRESSIF_FLASH_FREQ_64M)
+  set(MCUBOOT_FLASH_FREQ "48m")
+elseif(CONFIG_ESPRESSIF_FLASH_FREQ_48M)
+  set(MCUBOOT_FLASH_FREQ "48m")
+elseif(CONFIG_ESPRESSIF_FLASH_FREQ_40M)
+  set(MCUBOOT_FLASH_FREQ "40m")
+elseif(CONFIG_ESPRESSIF_FLASH_FREQ_26M)
+  set(MCUBOOT_FLASH_FREQ "26m")
+elseif(CONFIG_ESPRESSIF_FLASH_FREQ_20M)
+  set(MCUBOOT_FLASH_FREQ "20m")
+else()
+  set(MCUBOOT_FLASH_FREQ "40m")
+endif()
+
+# Check if ninja is available for generator
+find_program(NINJA_EXE NAMES ninja)
+if(NINJA_EXE)
+  set(MCUBOOT_GENERATOR "-GNinja")
+else()
+  set(MCUBOOT_GENERATOR "")
+endif()
+
+ExternalProject_Add(
+  bootloader
+  GIT_REPOSITORY ${MCUBOOT_URL}
+  GIT_TAG ${MCUBOOT_VERSION}
+  SOURCE_DIR ${MCUBOOT_SRCDIR}
+  PATCH_COMMAND
+  COMMAND git submodule --quiet update --init --recursive ext/mbedtls
+          WORKING_DIRECTORY ${MCUBOOT_ESPDIR}
+  CONFIGURE_COMMAND
+  CMAKE_ARGS -DCMAKE_TOOLCHAIN_FILE=${MCUBOOT_TOOLCHAIN}
+             -DMCUBOOT_TARGET=${CHIP_SERIES}
+             -DMCUBOOT_CONFIG_FILE=${BOOTLOADER_CONFIG}
+             -DESP_HAL_PATH=${HALDIR}
+             -DCONFIG_ESP_FLASH_SIZE=${MCUBOOT_FLASH_SIZE}
+             -DESP_FLASH_MODE=${MCUBOOT_FLASH_MODE}
+             -DESP_FLASH_FREQ=${MCUBOOT_FLASH_FREQ}
+             -B
+             ${MCUBOOT_BUILD_DIR}
+             ${MCUBOOT_GENERATOR}
+             ${MCUBOOT_SOURCE_DIR}
+             WORKING_DIRECTORY
+             ${MCUBOOT_ESPDIR}
+  BUILD_COMMAND ${CMAKE_COMMAND} --build ${MCUBOOT_BUILD_DIR} WORKING_DIRECTORY
+                ${MCUBOOT_ESPDIR}
+  INSTALL_COMMAND
+  COMMAND
+    ${CMAKE_COMMAND} -E copy ${MCUBOOT_BUILD_DIR}/mcuboot_${CHIP_SERIES}.bin
+    ${NUTTX_DIR}/mcuboot-${CHIP_SERIES}.bin WORKING_DIRECTORY ${MCUBOOT_ESPDIR}
+  BUILD_BYPRODUCTS ${MCUBOOT_BUILD_DIR}/mcuboot_${CHIP_SERIES}.bin)
+
+# Add bootloader files to clean list
+set_property(
+  DIRECTORY ${CMAKE_SOURCE_DIR}
+  APPEND
+  PROPERTY ADDITIONAL_CLEAN_FILES ${HALDIR} ${BOOTLOADER_SRCDIR}
+           ${BOOTLOADER_BIN})
diff --git a/arch/risc-v/src/common/espressif/CMakeLists.txt b/arch/risc-v/src/common/espressif/CMakeLists.txt
new file mode 100644
index 00000000000..3f78bdd5c8b
--- /dev/null
+++ b/arch/risc-v/src/common/espressif/CMakeLists.txt
@@ -0,0 +1,447 @@
+# ##############################################################################
+# arch/risc-v/src/common/espressif/CMakeLists.txt
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+set(SRCS)
+
+# Head/startup file
+list(APPEND SRCS esp_head.S)
+
+# Custom vector table (skip common RISC-V vector table)
+list(APPEND SRCS esp_vectors.S)
+
+# Required common source files
+list(APPEND SRCS esp_allocateheap.c esp_start.c esp_idle.c)
+list(APPEND SRCS esp_irq.c esp_gpio.c esp_rtc_gpio.c esp_libc_stubs.c)
+list(APPEND SRCS esp_lowputc.c esp_serial.c)
+list(APPEND SRCS esp_systemreset.c)
+
+if(CONFIG_SCHED_TICKLESS)
+  list(APPEND SRCS esp_tickless.c)
+else()
+  list(APPEND SRCS esp_timerisr.c)
+endif()
+
+if(CONFIG_ESPRESSIF_WDT)
+  list(APPEND SRCS esp_wdt.c)
+endif()
+
+if(CONFIG_DEV_RANDOM OR CONFIG_DEV_URANDOM_ARCH)
+  list(APPEND SRCS esp_random.c)
+endif()
+
+if(CONFIG_TIMER)
+  list(APPEND SRCS esp_timer.c)
+endif()
+
+if(CONFIG_ONESHOT)
+  list(APPEND SRCS esp_oneshot.c)
+endif()
+
+if(CONFIG_RTC)
+  list(APPEND SRCS esp_rtc.c)
+endif()
+
+if(CONFIG_ESPRESSIF_HR_TIMER)
+  list(APPEND SRCS esp_hr_timer.c esp_ets_timer_legacy.c)
+endif()
+
+if(CONFIG_ESPRESSIF_EFUSE)
+  if(CONFIG_ESPRESSIF_SECURE_FLASH_ENC_ENABLED)
+    message(
+      WARNING
+        "Flash Encryption is not supported on CMake. Use Make to build the image instead."
+    )
+  endif()
+  list(APPEND SRCS esp_efuse.c)
+endif()
+
+if(CONFIG_ESPRESSIF_TWAI)
+  list(APPEND SRCS esp_twai.c)
+endif()
+
+if(CONFIG_ESPRESSIF_LEDC)
+  list(APPEND SRCS esp_ledc.c)
+endif()
+
+if(CONFIG_ESP_PCNT)
+  list(APPEND SRCS esp_pcnt.c)
+  if(CONFIG_ESP_PCNT_AS_QE)
+    list(APPEND SRCS esp_qencoder.c)
+  endif()
+endif()
+
+if(CONFIG_ESPRESSIF_USBSERIAL)
+  list(APPEND SRCS esp_usbserial.c)
+endif()
+
+if(CONFIG_ESP_RMT)
+  list(APPEND SRCS esp_rmt.c)
+  if(CONFIG_WS2812_NON_SPI_DRIVER)
+    list(APPEND SRCS esp_ws2812.c)
+  endif()
+endif()
+
+if(CONFIG_ESP_SDM)
+  list(APPEND SRCS esp_sdm.c)
+endif()
+
+if(CONFIG_ESPRESSIF_DEDICATED_GPIO)
+  list(APPEND SRCS esp_dedic_gpio.c)
+endif()
+
+if(CONFIG_ESPRESSIF_TEMP)
+  list(APPEND SRCS esp_temperature_sensor.c)
+endif()
+
+if(CONFIG_ESPRESSIF_I2C)
+  if(CONFIG_ESPRESSIF_I2C_PERIPH_MASTER_MODE)
+    list(APPEND SRCS esp_i2c.c)
+  endif()
+  if(CONFIG_ESPRESSIF_I2C_BITBANG)
+    list(APPEND SRCS esp_i2c_bitbang.c)
+  endif()
+  if(CONFIG_ESPRESSIF_I2C_PERIPH_SLAVE_MODE)
+    list(APPEND SRCS esp_i2c_slave.c)
+  endif()
+endif()
+
+if(CONFIG_ESPRESSIF_I2S)
+  list(APPEND SRCS esp_i2s.c)
+endif()
+
+if(CONFIG_ESPRESSIF_SPI)
+  if(CONFIG_ESPRESSIF_SPI_PERIPH)
+    list(APPEND SRCS esp_spi.c)
+  endif()
+  if(CONFIG_SPI_SLAVE)
+    list(APPEND SRCS esp_spi_slave.c)
+  endif()
+  if(CONFIG_ESPRESSIF_SPI_BITBANG)
+    list(APPEND SRCS esp_spi_bitbang.c)
+  endif()
+endif()
+
+if(CONFIG_ESPRESSIF_SPIFLASH)
+  list(APPEND SRCS esp_spiflash.c)
+  if(CONFIG_ESPRESSIF_MTD)
+    list(APPEND SRCS esp_spiflash_mtd.c)
+  endif()
+endif()
+
+if(CONFIG_ESPRESSIF_WIRELESS)
+  if(CONFIG_ESPRESSIF_WIFI)
+    list(APPEND SRCS esp_wifi_event_handler.c)
+    list(APPEND SRCS esp_wifi_api.c)
+    list(APPEND SRCS esp_wlan_netdev.c)
+  endif()
+  list(APPEND SRCS esp_wifi_utils.c)
+endif()
+
+if(CONFIG_ESP_MCPWM)
+  list(APPEND SRCS esp_mcpwm.c)
+endif()
+
+if(CONFIG_SYSTEM_NXDIAG_ESPRESSIF_CHIP_WO_TOOL)
+  list(APPEND SRCS esp_nxdiag.c)
+endif()
+
+if(CONFIG_ESPRESSIF_ADC)
+  list(APPEND SRCS esp_adc.c)
+endif()
+
+if(CONFIG_ESPRESSIF_SHA_ACCELERATOR)
+  list(APPEND SRCS esp_sha.c)
+endif()
+
+if(CONFIG_ESPRESSIF_AES_ACCELERATOR)
+  list(APPEND SRCS esp_aes.c)
+endif()
+
+if(CONFIG_CRYPTO_CRYPTODEV_HARDWARE)
+  list(APPEND SRCS esp_crypto.c)
+endif()
+
+if(CONFIG_ESPRESSIF_USE_LP_CORE)
+  message(
+    WARNING
+      "LP Core is not supported on CMake. Use Make to build the image instead.")
+endif()
+
+if(CONFIG_PM)
+  if(NOT CONFIG_ARCH_CUSTOM_PMINIT)
+    list(APPEND SRCS esp_pm_initialize.c)
+  endif()
+  list(APPEND SRCS esp_pm.c)
+endif()
+
+# ##############################################################################
+# ESP HAL 3rd Party Repository
+# ##############################################################################
+
+set(ESP_HAL_3RDPARTY_REPO_NAME esp-hal-3rdparty)
+
+if(DEFINED ENV{ESP_HAL_3RDPARTY_VERSION})
+  set(ESP_HAL_3RDPARTY_VERSION
+      $ENV{ESP_HAL_3RDPARTY_VERSION}
+      CACHE STRING "ESP HAL 3rdparty version")
+else()
+  set(ESP_HAL_3RDPARTY_VERSION
+      41b8c5f12063f6cce5796ce50b5eb4bd2ceeeb12
+      CACHE STRING "ESP HAL 3rdparty version")
+endif()
+
+if(DEFINED ENV{ESP_HAL_3RDPARTY_URL})
+  set(ESP_HAL_3RDPARTY_URL
+      $ENV{ESP_HAL_3RDPARTY_URL}
+      CACHE STRING "ESP HAL 3rdparty URL")
+else()
+  set(ESP_HAL_3RDPARTY_URL
+      https://github.com/espressif/esp-hal-3rdparty.git
+      CACHE STRING "ESP HAL 3rdparty URL")
+endif()
+
+option(
+  NXTMPDIR
+  "Enable and use a persistent ESP third-party HAL cache directory under nuttx/../nxtmpdir"
+  OFF)
+
+get_filename_component(
+  ESP_HAL_3RDPARTY_CHIP_DIR
+  "${CMAKE_BINARY_DIR}/arch/risc-v/src/common/espressif/${ESP_HAL_3RDPARTY_REPO_NAME}"
+  REALPATH)
+
+set(EXECUTE_CLONE_ESP_HAL_3RDPARTY_REPO TRUE)
+set(ESP_HAL_3RDPARTY_REPO "${ESP_HAL_3RDPARTY_CHIP_DIR}")
+string(REPLACE "\"" "" CHIP_SERIES "${CONFIG_ESPRESSIF_CHIP_SERIES}")
+
+# Here we initialize the esp-hal-3rdparty repository and its submodules. Should
+# be done only once, when CMake is configured.
+if(NOT IS_DIRECTORY "${ESP_HAL_3RDPARTY_REPO}")
+  # NXTMPDIR contains a cached version of the esp-hal-3rdparty repository, which
+  # is located on nuttx/../nxtmpdir/esp-hal-3rdparty if it exists.
+  if(NXTMPDIR)
+    include(${NUTTX_DIR}/cmake/nuttx_3rdparty.cmake)
+    nuttx_make_nxtmpdir()
+    set(ESP_HAL_NXTMPDIR_CACHE "${NXTMPDIR_PATH}/${ESP_HAL_3RDPARTY_REPO_NAME}")
+    get_filename_component(ESP_HAL_NXTMPDIR_CACHE "${ESP_HAL_NXTMPDIR_CACHE}"
+                           REALPATH)
+    nuttx_check_git_hash(
+      "${ESP_HAL_NXTMPDIR_CACHE}" "${ESP_HAL_3RDPARTY_VERSION}"
+      ESP_HAL_3RDPARTY_REVISION_OK)
+    if(NOT ESP_HAL_3RDPARTY_REVISION_OK)
+      if(EXISTS "${ESP_HAL_NXTMPDIR_CACHE}")
+        message(
+          STATUS
+            "Removing esp-hal-3rdparty at ${ESP_HAL_NXTMPDIR_CACHE} (revision mismatch)"
+        )
+        file(REMOVE_RECURSE "${ESP_HAL_NXTMPDIR_CACHE}")
+      endif()
+    else()
+      set(EXECUTE_CLONE_ESP_HAL_3RDPARTY_REPO FALSE)
+    endif()
+    set(ESP_HAL_3RDPARTY_FETCH_SOURCE_DIR "${ESP_HAL_NXTMPDIR_CACHE}")
+  else()
+    set(ESP_HAL_3RDPARTY_FETCH_SOURCE_DIR "${ESP_HAL_3RDPARTY_CHIP_DIR}")
+  endif()
+
+  # Only clone the esp-hal-3rdparty repository if it does not exist
+  if(EXECUTE_CLONE_ESP_HAL_3RDPARTY_REPO
+     AND NOT EXISTS "${ESP_HAL_3RDPARTY_FETCH_SOURCE_DIR}")
+    message(STATUS "Cloning Espressif HAL for 3rd Party Platforms")
+    FetchContent_Declare(
+      esp_hal_3rdparty
+      GIT_REPOSITORY ${ESP_HAL_3RDPARTY_URL}
+      GIT_TAG ${ESP_HAL_3RDPARTY_VERSION}
+      SOURCE_DIR ${ESP_HAL_3RDPARTY_FETCH_SOURCE_DIR}
+      GIT_SUBMODULES "")
+    FetchContent_MakeAvailable(esp_hal_3rdparty)
+  endif()
+  # cmake-format: off
+
+  # Patch mbedtls
+  execute_process(COMMAND git submodule --quiet update --init components/mbedtls/mbedtls
+                  WORKING_DIRECTORY ${ESP_HAL_3RDPARTY_FETCH_SOURCE_DIR})
+  execute_process(COMMAND git -C components/mbedtls/mbedtls reset --hard
+                  WORKING_DIRECTORY ${ESP_HAL_3RDPARTY_FETCH_SOURCE_DIR})
+  execute_process(COMMAND git apply --directory components/mbedtls/mbedtls nuttx/patches/components/mbedtls/mbedtls/0001-mbedtls_add_prefix.patch
+                  WORKING_DIRECTORY ${ESP_HAL_3RDPARTY_FETCH_SOURCE_DIR})
+  execute_process(COMMAND git apply --directory components/mbedtls/mbedtls nuttx/patches/components/mbedtls/mbedtls/0002-mbedtls_add_prefix_to_macro.patch
+                  WORKING_DIRECTORY ${ESP_HAL_3RDPARTY_FETCH_SOURCE_DIR})
+
+  if(NXTMPDIR AND NOT EXISTS "${ESP_HAL_3RDPARTY_CHIP_DIR}")
+    message(STATUS
+      "Copying from ${ESP_HAL_NXTMPDIR_CACHE} to ${ESP_HAL_3RDPARTY_CHIP_DIR}")
+    file(COPY "${ESP_HAL_NXTMPDIR_CACHE}" DESTINATION "${ESP_HAL_3RDPARTY_CHIP_DIR}/..")
+  endif()
+
+  # Copy gpio_sig_map.h and irq.h from the esp-hal-3rdparty repository to the NuttX directory
+  file(COPY ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/include/soc/gpio_sig_map.h
+       DESTINATION ${CMAKE_BINARY_DIR}/include/arch/chip/)
+
+  file(COPY ${ESP_HAL_3RDPARTY_REPO}/nuttx/${CHIP_SERIES}/include/irq.h
+       DESTINATION ${CMAKE_BINARY_DIR}/include/arch/chip/)
+
+  if(CONFIG_ESPRESSIF_WIRELESS)
+    message(
+      STATUS "Espressif HAL for 3rd Party Platforms: initializing submodules...")
+    execute_process(
+      COMMAND
+        git submodule --quiet update --init --depth=1 components/esp_phy/lib
+        components/esp_wifi/lib components/bt/controller/lib_esp32c3_family
+        components/esp_coex/lib
+      WORKING_DIRECTORY ${ESP_HAL_3RDPARTY_REPO}
+      RESULT_VARIABLE GIT_SUBMODULE_RESULT)
+    if(NOT GIT_SUBMODULE_RESULT EQUAL 0)
+      message(
+        FATAL_ERROR
+          "Failed to initialize Wi-Fi submodules. Check if the arch/risc-v/src/common/chip/ is populated and delete its contents."
+      )
+    endif()
+  endif()
+endif()
+# cmake-format: on
+
+# This is done previously on configure time but must be done again if a 'clean'
+# is executed.
+set(_gpio_sig_map ${CMAKE_BINARY_DIR}/include/arch/chip/gpio_sig_map.h)
+set(_irq ${CMAKE_BINARY_DIR}/include/arch/chip/irq.h)
+
+add_custom_command(
+  OUTPUT ${_gpio_sig_map} ${_irq}
+  COMMAND
+    ${CMAKE_COMMAND} -E copy
+    ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/include/soc/gpio_sig_map.h
+    ${_gpio_sig_map}
+  COMMAND ${CMAKE_COMMAND} -E copy
+          ${ESP_HAL_3RDPARTY_REPO}/nuttx/${CHIP_SERIES}/include/irq.h ${_irq}
+  COMMENT "Copy esp-hal-3rdparty gpio_sig_map.h and irq.h to nuttx arch include"
+  VERBATIM)
+
+add_custom_target(copy_esp3rdparty_headers DEPENDS ${_gpio_sig_map} ${_irq})
+
+add_dependencies(arch copy_esp3rdparty_headers)
+
+# ##############################################################################
+# Compiler and Linker Flags
+# ##############################################################################
+
+# Silent preprocessor warnings
+target_compile_options(
+  arch PRIVATE -Wno-shadow -Wno-undef -Wno-unused-variable -fno-jump-tables
+               -fno-tree-switch-conversion -Wno-deprecated-declarations)
+
+# Linker flags for initialization hooks. CMake deduplicates plain -u options
+# (same leading '-'), collapsing multiple -u into one; use SHELL: so each
+# --undefined survives (otherwise ld sees the second symbol as an input file).
+set(_esp_startup_u_opts "SHELL:-u esp_system_include_startup_funcs")
+
+if(CONFIG_PM)
+  list(APPEND _esp_startup_u_opts "SHELL:-u esp_timer_init_include_func")
+endif()
+
+if(CONFIG_ESPRESSIF_EFUSE)
+  list(APPEND _esp_startup_u_opts "SHELL:-u esp_efuse_startup_include_func")
+endif()
+
+target_link_options(nuttx PRIVATE ${_esp_startup_u_opts})
+
+# ##############################################################################
+# Include chip-specific HAL configuration
+# ##############################################################################
+
+# NOTE: HAL includes MUST come before espressif includes to avoid conflicts
+include(${NUTTX_CHIP_ABS_DIR}/hal_${CHIP_SERIES}.cmake)
+
+# ##############################################################################
+# Include Paths (must come AFTER HAL includes)
+# ##############################################################################
+
+target_include_directories(
+  arch PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}
+               ${CMAKE_CURRENT_SOURCE_DIR}/platform_include)
+
+# ##############################################################################
+# Include Bootloader configuration
+# ##############################################################################
+
+if(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT)
+  include(${CMAKE_CURRENT_SOURCE_DIR}/Bootloader.cmake)
+else()
+  add_custom_target(bootloader COMMAND ${CMAKE_COMMAND} -E echo
+                                       "Using direct bootloader to boot NuttX.")
+endif()
+
+# ##############################################################################
+# Include Wireless configuration (if enabled)
+# ##############################################################################
+
+if(CONFIG_ESPRESSIF_WIRELESS)
+  include(${CMAKE_CURRENT_SOURCE_DIR}/Wireless.cmake)
+endif()
+
+# ##############################################################################
+# Add sources to arch target
+# ##############################################################################
+
+target_sources(arch PRIVATE ${SRCS})
+
+# ##############################################################################
+# Post-build operations (ESP binary generation)
+# ##############################################################################
+
+# Create post-build target for ESP binary generation
+if(NOT TARGET nuttx_post_build)
+  add_custom_target(nuttx_post_build)
+endif()
+
+add_custom_command(
+  TARGET nuttx_post_build
+  POST_BUILD
+  COMMAND
+    ${CMAKE_COMMAND} -DBINARY_DIR=${CMAKE_BINARY_DIR}
+    -DSOURCE_DIR=${CMAKE_SOURCE_DIR} -P
+    ${NUTTX_DIR}/tools/espressif/espressif_mkimage.cmake
+  WORKING_DIRECTORY ${CMAKE_BINARY_DIR}
+  COMMENT "Generating ESP-compatible binary"
+  VERBATIM)
+
+# ##############################################################################
+# ULP Support (TODO)
+# ##############################################################################
+
+if(CONFIG_ESPRESSIF_USE_LP_CORE)
+  list(APPEND ESP_CLEAN_FILES ${CMAKE_CURRENT_SOURCE_DIR}/../chip/ulp)
+endif()
+
+# ##############################################################################
+# Clean hook - replicate Make.defs distclean behavior
+# ##############################################################################
+
+set(ESP_CLEAN_FILES
+    ${NUTTX_DIR}/arch/${CONFIG_ARCH}/include/${CONFIG_ARCH_CHIP}/gpio_sig_map.h
+    ${NUTTX_DIR}/arch/${CONFIG_ARCH}/include/${CONFIG_ARCH_CHIP}/irq.h
+    ${NUTTX_DIR}/vefuse.bin)
+
+set_property(
+  DIRECTORY ${CMAKE_SOURCE_DIR}
+  APPEND
+  PROPERTY ADDITIONAL_CLEAN_FILES ${ESP_CLEAN_FILES})
diff --git a/arch/risc-v/src/common/espressif/Wireless.cmake b/arch/risc-v/src/common/espressif/Wireless.cmake
new file mode 100644
index 00000000000..8dea4127bc9
--- /dev/null
+++ b/arch/risc-v/src/common/espressif/Wireless.cmake
@@ -0,0 +1,344 @@
+# ##############################################################################
+# arch/risc-v/src/common/espressif/Wireless.cmake
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+# ##############################################################################
+# Include Paths for Wireless
+# ##############################################################################
+
+target_include_directories(
+  arch
+  PRIVATE
+    ${ESP_HAL_3RDPARTY_REPO}/components/bt/include/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_coex/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_wifi/wifi_apps/roaming_app/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/nuttx/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/nuttx/include/esp_wifi)
+
+# ##############################################################################
+# Link Libraries
+# ##############################################################################
+
+nuttx_add_extra_library(
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/lib/${CHIP_SERIES}/libphy.a
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_coex/lib/${CHIP_SERIES}/libcoexist.a
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_wifi/lib/${CHIP_SERIES}/libmesh.a)
+
+if(CONFIG_ESPRESSIF_BLE)
+  nuttx_add_extra_library(
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/lib/${CHIP_SERIES}/libbtbb.a)
+  if(CONFIG_ARCH_CHIP_ESP32C3)
+    nuttx_add_extra_library(
+      ${ESP_HAL_3RDPARTY_REPO}/components/bt/controller/lib_esp32c3_family/esp32c3/libbtdm_app.a
+    )
+  endif()
+endif()
+
+if(CONFIG_ESPRESSIF_WIFI)
+  nuttx_add_extra_library(
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_wifi/lib/${CHIP_SERIES}/libcore.a
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_wifi/lib/${CHIP_SERIES}/libnet80211.a
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_wifi/lib/${CHIP_SERIES}/libpp.a
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_wifi/lib/${CHIP_SERIES}/libespnow.a)
+  if(CONFIG_WPA_WAPI_PSK)
+    nuttx_add_extra_library(
+      ${ESP_HAL_3RDPARTY_REPO}/components/esp_wifi/lib/${CHIP_SERIES}/libwapi.a)
+  endif()
+
+  # ############################################################################
+  # ESP-IDF's mbedTLS
+  # ############################################################################
+
+  set(MBEDTLS_DIR ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls)
+
+  # Include directories for mbedTLS Use BEFORE so port/include and
+  # builtin/include come before hal's mbedtls paths; then #include_next
+  # "mbedtls/private/*.h" from port bignum.h finds builtin/include.
+  target_include_directories(
+    arch BEFORE
+    PRIVATE ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/include
+            ${MBEDTLS_DIR}/tf-psa-crypto/drivers/builtin/include
+            ${MBEDTLS_DIR}/tf-psa-crypto/drivers/builtin/src
+            ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/include/aes
+            ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/psa_driver/include
+            ${MBEDTLS_DIR}/include
+            ${MBEDTLS_DIR}/library
+            ${ESP_HAL_3RDPARTY_REPO}/nuttx/include/mbedtls)
+
+  # Define Espressif's configs for mbedTLS
+  target_compile_definitions(arch
+                             PUBLIC MBEDTLS_CONFIG_FILE="mbedtls/esp_config.h")
+  target_compile_definitions(
+    arch PRIVATE TF_PSA_CRYPTO_USER_CONFIG_FILE=\"mbedtls/esp_config.h\")
+
+  # Ensure PSA crypto initialization is included in the build
+  target_link_options(arch PRIVATE -u mbedtls_psa_crypto_init_include_impl)
+
+  # mbedTLS sources: exact match to Wireless.mk (lines 59–103). All from
+  # tf-psa-crypto/drivers/builtin/src (VPATH in mk).
+  set(MBEDTLS_BUILTIN_DIR ${MBEDTLS_DIR}/tf-psa-crypto/drivers/builtin/src)
+  set(MBEDTLS_SRCS
+      ${MBEDTLS_BUILTIN_DIR}/aes.c
+      ${MBEDTLS_BUILTIN_DIR}/aria.c
+      ${MBEDTLS_BUILTIN_DIR}/bignum_core.c
+      ${MBEDTLS_BUILTIN_DIR}/bignum.c
+      ${MBEDTLS_BUILTIN_DIR}/ccm.c
+      ${MBEDTLS_BUILTIN_DIR}/cipher_wrap.c
+      ${MBEDTLS_BUILTIN_DIR}/cipher.c
+      ${MBEDTLS_BUILTIN_DIR}/cmac.c
+      ${MBEDTLS_BUILTIN_DIR}/constant_time.c
+      ${MBEDTLS_BUILTIN_DIR}/ctr_drbg.c
+      ${MBEDTLS_BUILTIN_DIR}/ecp_curves.c
+      ${MBEDTLS_BUILTIN_DIR}/ecp.c
+      ${MBEDTLS_BUILTIN_DIR}/entropy.c
+      ${MBEDTLS_BUILTIN_DIR}/gcm.c
+      ${MBEDTLS_BUILTIN_DIR}/md.c
+      ${MBEDTLS_BUILTIN_DIR}/pkcs5.c
+      ${MBEDTLS_BUILTIN_DIR}/platform_util.c
+      ${MBEDTLS_BUILTIN_DIR}/platform.c
+      ${MBEDTLS_BUILTIN_DIR}/sha1.c
+      ${MBEDTLS_BUILTIN_DIR}/sha3.c
+      ${MBEDTLS_BUILTIN_DIR}/sha256.c
+      ${MBEDTLS_BUILTIN_DIR}/sha512.c
+      ${MBEDTLS_BUILTIN_DIR}/pk.c
+      ${MBEDTLS_BUILTIN_DIR}/pk_wrap.c
+      ${MBEDTLS_BUILTIN_DIR}/pkparse.c
+      ${MBEDTLS_BUILTIN_DIR}/ecdsa.c
+      ${MBEDTLS_BUILTIN_DIR}/asn1parse.c
+      ${MBEDTLS_BUILTIN_DIR}/asn1write.c
+      ${MBEDTLS_BUILTIN_DIR}/rsa.c
+      ${MBEDTLS_BUILTIN_DIR}/md5.c
+      ${MBEDTLS_BUILTIN_DIR}/oid.c
+      ${MBEDTLS_BUILTIN_DIR}/pem.c
+      ${MBEDTLS_BUILTIN_DIR}/hmac_drbg.c
+      ${MBEDTLS_BUILTIN_DIR}/rsa_alt_helpers.c
+      ${MBEDTLS_BUILTIN_DIR}/ecdh.c
+      ${MBEDTLS_BUILTIN_DIR}/pk_ecc.c
+      ${MBEDTLS_BUILTIN_DIR}/pk_rsa.c
+      # Required by pem.c (esp_mbedtls_base64_decode); in same builtin tree, not
+      # in Wireless.mk mbedtls list
+      ${MBEDTLS_BUILTIN_DIR}/base64.c
+      ${MBEDTLS_BUILTIN_DIR}/psa_util.c
+      ${MBEDTLS_BUILTIN_DIR}/psa_crypto_ffdh.c
+      ${MBEDTLS_BUILTIN_DIR}/psa_crypto_ecp.c
+      ${MBEDTLS_BUILTIN_DIR}/psa_crypto_rsa.c
+      ${MBEDTLS_BUILTIN_DIR}/psa_crypto_cipher.c
+      ${MBEDTLS_BUILTIN_DIR}/psa_crypto_mac.c
+      ${MBEDTLS_BUILTIN_DIR}/psa_crypto_hash.c)
+
+  # TF-PSA crypto core (Wireless.mk lines 105–114)
+  set(TF_PSA_CORE_SRCS
+      ${MBEDTLS_DIR}/tf-psa-crypto/core/psa_crypto_client.c
+      ${MBEDTLS_DIR}/tf-psa-crypto/core/psa_crypto_driver_wrappers_no_static.c
+      ${MBEDTLS_DIR}/tf-psa-crypto/core/psa_crypto_slot_management.c
+      ${MBEDTLS_DIR}/tf-psa-crypto/core/psa_crypto_storage.c
+      ${MBEDTLS_DIR}/tf-psa-crypto/core/psa_crypto.c
+      ${MBEDTLS_DIR}/tf-psa-crypto/core/psa_its_file.c
+      ${MBEDTLS_DIR}/tf-psa-crypto/core/tf_psa_crypto_config.c
+      ${MBEDTLS_DIR}/tf-psa-crypto/core/tf_psa_crypto_version.c)
+
+  # mbedTLS port (Wireless.mk lines 116–127)
+  set(MBEDTLS_PORT_SRCS
+      ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/esp_psa_crypto_init.c
+      ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/esp_hardware.c
+      ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/esp_mem.c
+      ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/esp_timing.c
+      ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/psa_driver/esp_mac/psa_crypto_driver_esp_hmac_opaque.c
+      ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/psa_driver/esp_md/psa_crypto_driver_esp_md5.c
+  )
+
+  target_sources(arch PRIVATE ${MBEDTLS_SRCS} ${TF_PSA_CORE_SRCS}
+                              ${MBEDTLS_PORT_SRCS})
+
+  # ############################################################################
+  # WPA Supplicant
+  # ############################################################################
+
+  set(WPA_SUPPLICANT_DIR ${ESP_HAL_3RDPARTY_REPO}/components/wpa_supplicant)
+
+  target_compile_definitions(
+    arch
+    PRIVATE __ets__
+            CONFIG_CRYPTO_MBEDTLS
+            CONFIG_ECC
+            CONFIG_IEEE80211W
+            CONFIG_WPA3_SAE
+            EAP_PEER_METHOD
+            ESP_PLATFORM=1
+            ESP_SUPPLICANT
+            ESPRESSIF_USE
+            IEEE8021X_EAPOL
+            USE_WPA2_TASK
+            CONFIG_SHA256
+            USE_WPS_TASK)
+
+  if(CONFIG_ESPRESSIF_WIFI_SOFTAP_SAE_SUPPORT)
+    target_compile_definitions(arch PRIVATE CONFIG_SAE)
+  endif()
+
+  if(CONFIG_ESPRESSIF_WIFI_ENABLE_SAE_PK)
+    target_compile_definitions(arch PRIVATE CONFIG_SAE_PK)
+  endif()
+
+  if(CONFIG_ESPRESSIF_WIFI_ENABLE_SAE_H2E)
+    target_compile_definitions(arch PRIVATE CONFIG_SAE_H2E)
+  endif()
+
+  if(CONFIG_ESPRESSIF_WIFI_ENABLE_WPA3_OWE_STA)
+    target_compile_definitions(arch PRIVATE CONFIG_OWE_STA)
+  endif()
+
+  if(CONFIG_ESPRESSIF_WIFI_GCMP_SUPPORT)
+    target_compile_definitions(arch PRIVATE CONFIG_GCMP)
+  endif()
+
+  if(CONFIG_ESPRESSIF_WIFI_GMAC_SUPPORT)
+    target_compile_definitions(arch PRIVATE CONFIG_GMAC)
+  endif()
+
+  target_include_directories(
+    arch
+    PRIVATE ${WPA_SUPPLICANT_DIR}/include ${WPA_SUPPLICANT_DIR}/src
+            ${WPA_SUPPLICANT_DIR}/src/ap ${WPA_SUPPLICANT_DIR}/src/common
+            ${WPA_SUPPLICANT_DIR}/src/utils)
+
+  # WPA Supplicant AP sources
+  set(WPA_AP_SRCS
+      ${WPA_SUPPLICANT_DIR}/src/ap/ap_config.c
+      ${WPA_SUPPLICANT_DIR}/src/ap/ieee802_11.c
+      ${WPA_SUPPLICANT_DIR}/src/ap/comeback_token.c
+      ${WPA_SUPPLICANT_DIR}/src/ap/pmksa_cache_auth.c
+      ${WPA_SUPPLICANT_DIR}/src/ap/sta_info.c
+      ${WPA_SUPPLICANT_DIR}/src/ap/wpa_auth_ie.c
+      ${WPA_SUPPLICANT_DIR}/src/ap/wpa_auth.c)
+
+  # WPA Supplicant common sources
+  set(WPA_COMMON_SRCS
+      ${WPA_SUPPLICANT_DIR}/src/common/dragonfly.c
+      ${WPA_SUPPLICANT_DIR}/src/common/sae.c
+      ${WPA_SUPPLICANT_DIR}/src/common/wpa_common.c
+      ${WPA_SUPPLICANT_DIR}/src/common/bss.c
+      ${WPA_SUPPLICANT_DIR}/src/common/scan.c
+      ${WPA_SUPPLICANT_DIR}/src/common/ieee802_11_common.c)
+
+  if(CONFIG_ESPRESSIF_WIFI_ENABLE_SAE_PK)
+    list(APPEND WPA_COMMON_SRCS ${WPA_SUPPLICANT_DIR}/src/common/sae_pk.c)
+  endif()
+
+  # WPA Supplicant crypto sources (wpa_supplicant/src/crypto; aes-siv.c is in
+  # esp_supplicant)
+  set(WPA_CRYPTO_SRCS
+      ${WPA_SUPPLICANT_DIR}/src/crypto/aes-ccm.c
+      ${WPA_SUPPLICANT_DIR}/src/crypto/aes-gcm.c
+      ${WPA_SUPPLICANT_DIR}/src/crypto/aes-unwrap.c
+      ${WPA_SUPPLICANT_DIR}/src/crypto/aes-wrap.c
+      ${WPA_SUPPLICANT_DIR}/src/crypto/ccmp.c
+      ${WPA_SUPPLICANT_DIR}/src/crypto/crypto_ops.c
+      ${WPA_SUPPLICANT_DIR}/src/crypto/des-internal.c
+      ${WPA_SUPPLICANT_DIR}/src/crypto/dh_groups.c
+      ${WPA_SUPPLICANT_DIR}/src/crypto/rc4.c
+      ${WPA_SUPPLICANT_DIR}/src/crypto/sha1-prf.c
+      ${WPA_SUPPLICANT_DIR}/src/crypto/sha256-kdf.c
+      ${WPA_SUPPLICANT_DIR}/src/crypto/sha256-prf.c)
+
+  # WPA Supplicant EAP peer sources
+  set(WPA_EAP_SRCS
+      ${WPA_SUPPLICANT_DIR}/src/eap_peer/chap.c
+      ${WPA_SUPPLICANT_DIR}/src/eap_peer/eap_common.c
+      ${WPA_SUPPLICANT_DIR}/src/eap_peer/eap_mschapv2.c
+      ${WPA_SUPPLICANT_DIR}/src/eap_peer/eap_peap_common.c
+      ${WPA_SUPPLICANT_DIR}/src/eap_peer/eap_peap.c
+      ${WPA_SUPPLICANT_DIR}/src/eap_peer/eap_tls_common.c
+      ${WPA_SUPPLICANT_DIR}/src/eap_peer/eap_tls.c
+      ${WPA_SUPPLICANT_DIR}/src/eap_peer/eap_ttls.c
+      ${WPA_SUPPLICANT_DIR}/src/eap_peer/eap.c
+      ${WPA_SUPPLICANT_DIR}/src/eap_peer/mschapv2.c)
+
+  # WPA Supplicant RSN sources
+  set(WPA_RSN_SRCS
+      ${WPA_SUPPLICANT_DIR}/src/rsn_supp/pmksa_cache.c
+      ${WPA_SUPPLICANT_DIR}/src/rsn_supp/wpa_ie.c
+      ${WPA_SUPPLICANT_DIR}/src/rsn_supp/wpa.c)
+
+  # WPA Supplicant utils sources
+  target_include_directories(arch PRIVATE ${WPA_SUPPLICANT_DIR}/src/utils)
+
+  set(WPA_UTILS_SRCS
+      ${WPA_SUPPLICANT_DIR}/src/utils/base64.c
+      ${WPA_SUPPLICANT_DIR}/src/utils/bitfield.c
+      ${WPA_SUPPLICANT_DIR}/src/utils/common.c
+      ${WPA_SUPPLICANT_DIR}/src/utils/ext_password.c
+      ${WPA_SUPPLICANT_DIR}/src/utils/json.c
+      ${WPA_SUPPLICANT_DIR}/src/utils/uuid.c
+      ${WPA_SUPPLICANT_DIR}/src/utils/wpa_debug.c
+      ${WPA_SUPPLICANT_DIR}/src/utils/wpabuf.c)
+
+  # WPA Supplicant port sources
+  target_include_directories(arch PRIVATE ${WPA_SUPPLICANT_DIR}/port/include)
+
+  set(WPA_PORT_SRCS ${WPA_SUPPLICANT_DIR}/port/eloop.c
+                    ${WPA_SUPPLICANT_DIR}/port/os_xtensa.c)
+
+  # ESP Supplicant sources
+  target_include_directories(
+    arch
+    PRIVATE ${WPA_SUPPLICANT_DIR}/esp_supplicant/include
+            ${WPA_SUPPLICANT_DIR}/esp_supplicant/src
+            ${WPA_SUPPLICANT_DIR}/src/crypto)
+
+  set(ESP_SUPPLICANT_SRCS
+      ${WPA_SUPPLICANT_DIR}/esp_supplicant/src/esp_common.c
+      ${WPA_SUPPLICANT_DIR}/esp_supplicant/src/esp_hostap.c
+      ${WPA_SUPPLICANT_DIR}/esp_supplicant/src/esp_wpa_main.c
+      ${WPA_SUPPLICANT_DIR}/esp_supplicant/src/esp_wpa3.c
+      ${WPA_SUPPLICANT_DIR}/esp_supplicant/src/esp_wpas_glue.c
+      ${WPA_SUPPLICANT_DIR}/esp_supplicant/src/esp_owe.c
+      ${WPA_SUPPLICANT_DIR}/esp_supplicant/src/esp_scan.c
+      ${WPA_SUPPLICANT_DIR}/esp_supplicant/src/esp_wps.c
+      ${WPA_SUPPLICANT_DIR}/esp_supplicant/src/crypto/crypto_mbedtls-bignum.c
+      ${WPA_SUPPLICANT_DIR}/esp_supplicant/src/crypto/crypto_mbedtls-ec.c
+      ${WPA_SUPPLICANT_DIR}/esp_supplicant/src/crypto/crypto_mbedtls-rsa.c
+      ${WPA_SUPPLICANT_DIR}/esp_supplicant/src/crypto/crypto_mbedtls.c
+      ${WPA_SUPPLICANT_DIR}/esp_supplicant/src/crypto/tls_mbedtls.c
+      ${WPA_SUPPLICANT_DIR}/src/crypto/aes-siv.c)
+
+  # ESP WiFi sources
+  set(ESP_WIFI_SRCS
+      ${ESP_HAL_3RDPARTY_REPO}/components/esp_wifi/src/wifi_init.c
+      ${ESP_HAL_3RDPARTY_REPO}/components/esp_wifi/src/lib_printf.c
+      ${ESP_HAL_3RDPARTY_REPO}/components/esp_wifi/regulatory/esp_wifi_regulatory.c
+  )
+
+  # Add all WPA supplicant sources
+  target_sources(
+    arch
+    PRIVATE ${WPA_AP_SRCS}
+            ${WPA_COMMON_SRCS}
+            ${WPA_CRYPTO_SRCS}
+            ${WPA_EAP_SRCS}
+            ${WPA_RSN_SRCS}
+            ${WPA_UTILS_SRCS}
+            ${WPA_PORT_SRCS}
+            ${ESP_SUPPLICANT_SRCS}
+            ${ESP_WIFI_SRCS})
+
+endif() # CONFIG_ESPRESSIF_WIFI
diff --git a/arch/risc-v/src/esp32c3/CMakeLists.txt b/arch/risc-v/src/esp32c3/CMakeLists.txt
new file mode 100644
index 00000000000..e9489d6f761
--- /dev/null
+++ b/arch/risc-v/src/esp32c3/CMakeLists.txt
@@ -0,0 +1,40 @@
+# ##############################################################################
+# arch/risc-v/src/esp32c3/CMakeLists.txt
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+# Include common espressif CMake configuration
+add_subdirectory(${CMAKE_CURRENT_SOURCE_DIR}/../common/espressif espressif)
+
+set(SRCS esp_chip_rev.c)
+
+if(CONFIG_ESPRESSIF_WIFI)
+  list(APPEND SRCS esp_coex_adapter.c esp_wifi_adapter.c)
+endif()
+
+if(CONFIG_ESPRESSIF_BLE)
+  list(APPEND SRCS esp_ble.c esp_ble_adapter.c esp_wireless.c)
+endif()
+
+target_compile_definitions(arch PRIVATE _RETARGETABLE_LOCKING)
+
+if(SRCS)
+  target_sources(arch PRIVATE ${SRCS})
+endif()
diff --git a/arch/risc-v/src/esp32c3/hal_esp32c3.cmake b/arch/risc-v/src/esp32c3/hal_esp32c3.cmake
new file mode 100644
index 00000000000..398232de84d
--- /dev/null
+++ b/arch/risc-v/src/esp32c3/hal_esp32c3.cmake
@@ -0,0 +1,520 @@
+# ##############################################################################
+# arch/risc-v/src/esp32c3/hal_esp32c3.cmake
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+# ##############################################################################
+# Include Paths
+# ##############################################################################
+
+if(NOT EXISTS ${ESP_HAL_3RDPARTY_REPO})
+  message(
+    FATAL_ERROR
+      "ESP_HAL_3RDPARTY_REPO does not exist: ${ESP_HAL_3RDPARTY_REPO}. Please ensure the HAL 3rd party repository is cloned correctly."
+  )
+endif()
+
+target_include_directories(
+  arch
+  PRIVATE
+    # NuttX specific includes
+    ${ESP_HAL_3RDPARTY_REPO}/nuttx/include
+    ${ESP_HAL_3RDPARTY_REPO}/nuttx/include/mbedtls
+    ${ESP_HAL_3RDPARTY_REPO}/nuttx/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/components/esp_driver_uart/include
+    # Bootloader support
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/private_include
+    # Driver components
+    ${ESP_HAL_3RDPARTY_REPO}/components/driver/twai/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/driver/spi/include
+    # EFUSE
+    ${ESP_HAL_3RDPARTY_REPO}/components/efuse/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/efuse/private_include
+    ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/private_include
+    # ESP ADC
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/interface
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/${CHIP_SERIES}/include
+    # ESP Common
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_common/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_event/include
+    # ESP HAL components (upper HAL and per-chip)
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/src
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_gpio/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src
+    # ESP HAL RMT (hal/rmt_hal.h)
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rmt/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rmt/${CHIP_SERIES}/include
+    # ESP HW Support
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/dma/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include/esp_private
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include/soc
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include/soc/${CHIP_SERIES}
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/ldo/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi/mspi_intr/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi/mspi_timing_tuning/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/private_include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/power_supply/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi_timing_tuning/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/etm/include
+    # ESP MM
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/include
+    # ESP PHY
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/include
+    # ESP PM
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_pm/include
+    # ESP ROM
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}/include/${CHIP_SERIES}
+    # ESP System
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/include/private
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/public_compat
+    # ESP Timer
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_timer/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_timer/private_include
+    # ESP Wi-Fi
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_wifi/include
+    # ESP Security
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_security/include
+    # HAL
+    ${ESP_HAL_3RDPARTY_REPO}/components/hal/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/hal/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/hal/platform_port/include
+    # HAL sub-components (hal/*.h)
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_clock/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_clock/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/${CHIP_SERIES}/include
+    # ESP HAL I2C, I2S, LEDC, Security, TWAI (for HAL headers)
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2s/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2s/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_twai/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_twai/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/${CHIP_SERIES}/include
+    # ESP HAL PMU (for sleep_cpu: hal/rtc_hal.h)
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rtc_timer/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rtc_timer/${CHIP_SERIES}/include
+    # ESP HAL TIMG (for wdt: hal/timg_ll.h)
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/${CHIP_SERIES}/include
+    # ESP HAL UART (for sleep_uart: hal/uart_hal.h)
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/${CHIP_SERIES}/include
+    # ESP HAL USB (for sleep_console: hal/usb_serial_jtag_ll.h)
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_usb/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_usb/${CHIP_SERIES}/include
+    # ESP HAL WDT (for bootloader: hal/wdt_hal.h)
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_wdt/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_wdt/${CHIP_SERIES}/include
+    # Heap
+    ${ESP_HAL_3RDPARTY_REPO}/components/heap/include
+    # Log
+    ${ESP_HAL_3RDPARTY_REPO}/components/log
+    ${ESP_HAL_3RDPARTY_REPO}/components/log/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/tag_log_level
+    # mbedTLS (tf-psa-crypto builtin must come before mbedtls/include so
+    # mbedtls/private/* are found)
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/include/aes
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/psa_driver/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/tf-psa-crypto/drivers/builtin/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/tf-psa-crypto/core
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/tf-psa-crypto/include
+    # Newlib / esp_libc
+    ${ESP_HAL_3RDPARTY_REPO}/components/newlib/priv_include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_libc/priv_include
+    ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/components/esp_libc/platform_include
+    # RISC-V
+    ${ESP_HAL_3RDPARTY_REPO}/components/riscv/include
+    # SOC
+    ${ESP_HAL_3RDPARTY_REPO}/components/soc/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/register
+    # SPI Flash
+    ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/include/spi_flash
+    ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/include/esp_flash_chips
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_blockdev/include)
+
+# Additional includes for simple boot
+if(CONFIG_ESPRESSIF_SIMPLE_BOOT)
+  target_include_directories(
+    arch PRIVATE ${ESP_HAL_3RDPARTY_REPO}/components/esp_app_format/include)
+endif()
+
+# ##############################################################################
+# Linker Scripts
+# ##############################################################################
+
+set(ESP_ROM_LD_DIR
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}/ld)
+set(ESP_SOC_LD_DIR ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/ld)
+set(ESP_RISCV_LD_DIR ${ESP_HAL_3RDPARTY_REPO}/components/riscv/ld)
+
+target_link_options(
+  nuttx
+  PRIVATE
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.api.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.bt_funcs.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.eco3_bt_funcs.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.eco3.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.libc.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.libc-suboptimal_for_misaligned_mem.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.libgcc.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.newlib.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.version.ld
+  -T${ESP_SOC_LD_DIR}/${CHIP_SERIES}.peripherals.ld
+  -T${ESP_RISCV_LD_DIR}/rom.api.ld)
+
+# ##############################################################################
+# HAL Source Files
+# ##############################################################################
+
+set(HAL_SRCS)
+
+# ESP ADC sources
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/adc_cali_curve_fitting.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/adc_cali.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/${CHIP_SERIES}/curve_fitting_coefficients.c
+)
+
+# Bootloader support sources
+list(
+  APPEND HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_init.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_efuse.c)
+
+# EFUSE sources
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/esp_efuse_api.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/esp_efuse_utility.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/esp_efuse_fields.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/esp_efuse_startup.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_fields.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_rtc_calib.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_table.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_utility.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c
+)
+
+# ESP Common sources
+list(APPEND HAL_SRCS
+     ${ESP_HAL_3RDPARTY_REPO}/components/esp_common/src/esp_err_to_name.c)
+
+# ESP HW Support sources
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/adc_share_hw_ctrl.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/clk_ctrl_os.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/clk_utils.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/cpu.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/src/gdma.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/esp_clk.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/esp_gpio_reserve.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/esp_memory_utils.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/hw_random.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/intr_alloc.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/lowpower/port/${CHIP_SERIES}/sleep_cpu.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mac_addr.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/periph_ctrl.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/regi2c_ctrl.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/rtc_module.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_modes.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_uart.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_modem.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/esp_clk_tree_common.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/adc2_init_cal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/esp_clk_tree.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/esp_cpu_intr.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/cpu_region_protect.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_clk.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_clk_init.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_init.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_sleep.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_time.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/sar_periph_ctrl.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/systimer.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/power_supply/brownout.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_console.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_event.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_gpio.c)
+
+# ESP MM sources
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/esp_cache_msync.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/esp_mmu_map.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/esp_cache_utils.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/port/${CHIP_SERIES}/ext_mem_layout.c
+)
+
+# ESP PHY sources
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/src/lib_printf.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/src/phy_common.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/src/phy_init.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/${CHIP_SERIES}/phy_init_data.c)
+
+# ESP ROM sources
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_sys.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_print.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_crc.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_serial_output.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_spiflash.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_efuse.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_gpio.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_systimer.c)
+
+# ESP System sources
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/esp_err.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/esp_system.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/startup.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/startup_funcs.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/system_time.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/soc/${CHIP_SERIES}/clk.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/soc/${CHIP_SERIES}/system_internal.c
+)
+
+# ESP Timer sources (not in CHIP_CSRCS in hal_esp32c3.mk - removed to match
+# Make) HAL sources (paths from hal_esp32c3.mk: esp_hal_* and hal components)
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/adc_hal_common.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/adc_oneshot_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/brownout_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/${CHIP_SERIES}/rtc_cntl_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/hmac_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/aes_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/cache_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/efuse_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/gpio_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/gdma_hal_ahb_v1.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/gdma_hal_top.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/hal_utils.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/ledc_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/ledc_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/systimer_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/timer_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/mmu_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rmt/rmt_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/sdm_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/i2c_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2s/i2s_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/sha_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/spi_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/spi_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_twai/twai_hal_v1.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/uart_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/uart_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_wdt/wdt_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_hal_gpspi.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_encrypt_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_wdt/xt_wdt_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_clock/${CHIP_SERIES}/clk_tree_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/${CHIP_SERIES}/efuse_hal.c)
+
+# Log sources
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/log_level.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/tag_log_level/tag_log_level.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/tag_log_level/linked_list/log_linked_list.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/noos/log_lock.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/noos/log_timestamp.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/os/log_write.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/os/util.c)
+
+# RISC-V sources
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/riscv/instruction_decode.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/riscv/interrupt.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/riscv/interrupt_intc.c)
+
+# SPI Flash sources
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_os_func_noos.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_os_func_app.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_generic.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_boya.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_gd.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_winbond.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_issi.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_mxic_opi.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_mxic.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_th.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/esp_flash_api.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/flash_ops.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_drivers.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/memspi_host_driver.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/esp_flash_spi_init.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/flash_mmap.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/flash_brownout_hook.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/cache_utils.c)
+
+# SOC sources (paths from hal_esp32c3.mk: esp_hal_* periph and soc)
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/soc/lldesc.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/${CHIP_SERIES}/adc_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/${CHIP_SERIES}/dedic_gpio_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/${CHIP_SERIES}/gdma_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/gpio_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/${CHIP_SERIES}/ledc_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rmt/${CHIP_SERIES}/rmt_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/${CHIP_SERIES}/sdm_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/${CHIP_SERIES}/i2c_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2s/${CHIP_SERIES}/i2s_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/interrupts.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/${CHIP_SERIES}/spi_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/${CHIP_SERIES}/temperature_sensor_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/${CHIP_SERIES}/timer_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_twai/${CHIP_SERIES}/twai_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/${CHIP_SERIES}/uart_periph.c)
+
+# ESP Security sources
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_security/src/esp_hmac.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_security/src/esp_crypto_lock.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_security/src/esp_crypto_periph_clk.c)
+
+# NuttX platform sources (upper_hal_gpio, upper_hal_rmt, os, heap_caps, newlib
+# init)
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/platform/os.c
+  ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/heap_caps.c
+  ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/components/newlib/newlib/libc/misc/init.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_gpio/src/gpio.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_gpio/src/rtc_io.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_common.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_encoder.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_encoder_bytes.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_encoder_copy.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_encoder_simple.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_rx.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_tx.c)
+
+# Bootloader flash encrypt source
+list(APPEND HAL_SRCS
+     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/flash_encrypt.c)
+
+# ##############################################################################
+# Simple Boot Sources
+# ##############################################################################
+
+if(CONFIG_ESPRESSIF_SIMPLE_BOOT)
+  list(
+    APPEND
+    HAL_SRCS
+    ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/bootloader_banner_wrap.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_console.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_console_loader.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/${CHIP_SERIES}/bootloader_${CHIP_SERIES}.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_common.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_common_loader.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_${CHIP_SERIES}.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/flash_qio_mode.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_clock_init.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_mem.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_random.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_random_${CHIP_SERIES}.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/esp_image_format.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_sha.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/${CHIP_SERIES}/bootloader_soc.c
+  )
+
+  target_link_options(nuttx PRIVATE -Wl,--wrap=bootloader_print_banner)
+
+elseif(CONFIG_ESPRESSIF_EFUSE_VIRTUAL_KEEP_IN_FLASH)
+  # Special case for bootloader_flash when using efuse virtual mode
+  list(
+    APPEND
+    HAL_SRCS
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_${CHIP_SERIES}.c
+  )
+endif()
+
+# ##############################################################################
+# Add HAL sources to arch target
+# ##############################################################################
+
+target_sources(arch PRIVATE ${HAL_SRCS})
diff --git a/arch/risc-v/src/esp32c6/CMakeLists.txt b/arch/risc-v/src/esp32c6/CMakeLists.txt
new file mode 100644
index 00000000000..877cf78ae45
--- /dev/null
+++ b/arch/risc-v/src/esp32c6/CMakeLists.txt
@@ -0,0 +1,36 @@
+# ##############################################################################
+# arch/risc-v/src/esp32c6/CMakeLists.txt
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+# Include common espressif CMake configuration
+add_subdirectory(${CMAKE_CURRENT_SOURCE_DIR}/../common/espressif espressif)
+
+set(SRCS esp_chip_rev.c)
+
+if(CONFIG_ESPRESSIF_WIFI)
+  list(APPEND SRCS esp_coex_adapter.c esp_wifi_adapter.c)
+endif()
+
+target_compile_definitions(arch PRIVATE _RETARGETABLE_LOCKING)
+
+if(SRCS)
+  target_sources(arch PRIVATE ${SRCS})
+endif()
diff --git a/arch/risc-v/src/esp32c6/hal_esp32c6.cmake b/arch/risc-v/src/esp32c6/hal_esp32c6.cmake
new file mode 100644
index 00000000000..337642cedce
--- /dev/null
+++ b/arch/risc-v/src/esp32c6/hal_esp32c6.cmake
@@ -0,0 +1,548 @@
+# ##############################################################################
+# arch/risc-v/src/esp32c6/hal_esp32c6.cmake
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+# ##############################################################################
+# Include Paths (from hal_esp32c6.mk)
+# ##############################################################################
+
+if(NOT EXISTS ${ESP_HAL_3RDPARTY_REPO})
+  message(
+    FATAL_ERROR
+      "ESP_HAL_3RDPARTY_REPO does not exist: ${ESP_HAL_3RDPARTY_REPO}. Please ensure the HAL 3rd party repository is cloned correctly."
+  )
+endif()
+
+target_include_directories(
+  arch
+  PRIVATE
+    ${ESP_HAL_3RDPARTY_REPO}/nuttx/include
+    ${ESP_HAL_3RDPARTY_REPO}/nuttx/include/mbedtls
+    ${ESP_HAL_3RDPARTY_REPO}/nuttx/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/private_include
+    ${ESP_HAL_3RDPARTY_REPO}/components/driver/twai/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/driver/spi/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/efuse/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/efuse/private_include
+    ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/private_include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/interface
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_blockdev/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_common/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_event/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_clock/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_clock/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2s/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2s/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mcpwm/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mcpwm/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_parlio/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_parlio/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pcnt/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pcnt/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rmt/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rmt/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rtc_timer/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rtc_timer/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_touch_sens/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_touch_sens/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_twai/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_twai/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_usb/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_usb/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_wdt/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_wdt/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/dma/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/etm/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include/esp_private
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include/soc
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include/soc/${CHIP_SERIES}
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi/mspi_intr/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi/mspi_timing_tuning/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/ldo/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/private_include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/power_supply/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_pm/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}/include/${CHIP_SERIES}
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_security/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/include/private
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/public_compat
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_timer/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_wifi/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/hal/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/hal/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/hal/platform_port/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/heap/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/log
+    ${ESP_HAL_3RDPARTY_REPO}/components/log/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/tag_log_level
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/include/aes
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/psa_driver/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/tf-psa-crypto/core
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/tf-psa-crypto/drivers/builtin/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/tf-psa-crypto/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_libc/priv_include
+    ${ESP_HAL_3RDPARTY_REPO}/components/riscv/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/soc/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/register
+    ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/include/esp_flash_chips
+    ${ESP_HAL_3RDPARTY_REPO}/components/ulp
+    ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core
+    ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/shared
+    ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/shared/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/ulp/ulp_common
+    ${ESP_HAL_3RDPARTY_REPO}/components/ulp/ulp_common/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/src
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_gpio/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_uart/include
+    ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/components/esp_libc/platform_include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi_timing_tuning/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_timer/private_include
+    ${ESP_HAL_3RDPARTY_REPO}/components/heap/private_include)
+
+if(CONFIG_ESPRESSIF_SIMPLE_BOOT)
+  target_include_directories(
+    arch PRIVATE ${ESP_HAL_3RDPARTY_REPO}/components/esp_app_format/include)
+endif()
+
+# ##############################################################################
+# Linker Scripts (from hal_esp32c6.mk)
+# ##############################################################################
+
+set(ESP_ROM_LD_DIR
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}/ld)
+set(ESP_SOC_LD_DIR ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/ld)
+set(ESP_RISCV_LD_DIR ${ESP_HAL_3RDPARTY_REPO}/components/riscv/ld)
+set(ESP_WDT_LD_DIR
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_wdt/${CHIP_SERIES})
+
+target_link_options(
+  nuttx
+  PRIVATE
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.api.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.coexist.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.libc.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.libc-suboptimal_for_misaligned_mem.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.libgcc.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.net80211.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.newlib.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.phy.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.pp.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.version.ld
+  -T${ESP_WDT_LD_DIR}/rom.wdt.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.heap.ld
+  -T${ESP_RISCV_LD_DIR}/rom.api.ld
+  -T${ESP_SOC_LD_DIR}/${CHIP_SERIES}.peripherals.ld)
+
+if(CONFIG_ESPRESSIF_USE_LP_CORE)
+  target_link_options(
+    nuttx PRIVATE
+    -T${NUTTX_DIR}/arch/${CONFIG_ARCH}/src/board/scripts/ulp_aliases.ld)
+endif()
+
+if(CONFIG_ESPRESSIF_SPI_FLASH_USE_ROM_CODE)
+  target_link_options(nuttx PRIVATE
+                      -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.spiflash.ld)
+endif()
+
+# ##############################################################################
+# HAL Source Files (from hal_esp32c6.mk CHIP_CSRCS and CHIP_ASRCS)
+# ##############################################################################
+
+set(HAL_SRCS)
+
+# ESP ADC
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/adc_cali_curve_fitting.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/adc_cali.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/${CHIP_SERIES}/curve_fitting_coefficients.c
+)
+
+# Bootloader support
+list(
+  APPEND HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_init.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_efuse.c)
+
+# EFUSE
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/esp_efuse_api.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/esp_efuse_utility.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/esp_efuse_startup.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_fields.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_rtc_calib.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_table.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_utility.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c
+)
+
+# ESP Common
+list(APPEND HAL_SRCS
+     ${ESP_HAL_3RDPARTY_REPO}/components/esp_common/src/esp_err_to_name.c)
+
+# ESP HW Support
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/adc_share_hw_ctrl.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/clk_ctrl_os.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/clk_utils.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/cpu.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/src/gdma.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/esp_clk.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/esp_gpio_reserve.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/esp_memory_utils.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/hw_random.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/intr_alloc.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mac_addr.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/modem_clock.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/periph_ctrl.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/regi2c_ctrl.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/rtc_module.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_console.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_event.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_gpio.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_modes.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_modem.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_uart.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_retention.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_system_peripheral.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/lowpower/port/${CHIP_SERIES}/sleep_cpu.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/lowpower/port/${CHIP_SERIES}/sleep_clock.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/esp_clk_tree_common.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/pau_regdma.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/regdma_link.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/esp_clk_tree.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/esp_cpu_intr.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/cpu_region_protect.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/io_mux.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/ocode_init.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/peripheral_domain_pd.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/pmu_init.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/pmu_param.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/pmu_sleep.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_clk.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_clk_init.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_time.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/sar_periph_ctrl.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/systimer.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/power_supply/brownout.c)
+
+# ESP MM
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/esp_cache_msync.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/esp_mmu_map.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/esp_cache_utils.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/port/${CHIP_SERIES}/ext_mem_layout.c
+)
+
+# ESP PHY
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/src/lib_printf.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/src/phy_common.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/src/phy_init.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/${CHIP_SERIES}/phy_init_data.c)
+
+# ESP PM
+list(APPEND HAL_SRCS ${ESP_HAL_3RDPARTY_REPO}/components/esp_pm/pm_impl.c)
+
+# ESP ROM
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_sys.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_print.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_crc.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_serial_output.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_spiflash.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_efuse.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_gpio.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_hp_regi2c_${CHIP_SERIES}.c
+)
+
+# ESP System
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/esp_err.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/esp_system.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/startup.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/startup_funcs.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/system_time.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/soc/${CHIP_SERIES}/clk.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/soc/${CHIP_SERIES}/system_internal.c
+)
+
+# HAL components
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/adc_hal_common.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/adc_oneshot_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/aes_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/apm_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/hmac_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/brownout_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/efuse_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/gpio_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/gdma_hal_ahb_v1.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/gdma_hal_top.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/hal_utils.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/ledc_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/ledc_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pcnt/pcnt_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rmt/rmt_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/sdm_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/i2c_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2s/i2s_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/sha_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/spi_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/spi_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/timer_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_twai/twai_hal_v1.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/cache_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/mmu_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mcpwm/mcpwm_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/uart_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/uart_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_wdt/wdt_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_hal_gpspi.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_encrypt_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/systimer_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/rtc_io_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/spi_slave_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/spi_slave_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_clock/${CHIP_SERIES}/clk_tree_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/${CHIP_SERIES}/efuse_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/${CHIP_SERIES}/modem_clock_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/${CHIP_SERIES}/pau_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/${CHIP_SERIES}/pmu_hal.c)
+
+# Log
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/log_level.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/tag_log_level/tag_log_level.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/tag_log_level/linked_list/log_linked_list.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/noos/log_lock.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/noos/log_timestamp.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/os/log_write.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/os/util.c)
+
+# RISC-V (C6 uses interrupt_plic)
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/riscv/instruction_decode.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/riscv/interrupt.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/riscv/interrupt_plic.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/riscv/rv_utils.c)
+
+# SOC / periph
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/soc/lldesc.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/${CHIP_SERIES}/adc_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/${CHIP_SERIES}/dedic_gpio_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/${CHIP_SERIES}/gdma_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/interrupts.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/gpio_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/${CHIP_SERIES}/ledc_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pcnt/${CHIP_SERIES}/pcnt_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rmt/${CHIP_SERIES}/rmt_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/${CHIP_SERIES}/sdm_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/${CHIP_SERIES}/i2c_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2s/${CHIP_SERIES}/i2s_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mcpwm/${CHIP_SERIES}/mcpwm_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/${CHIP_SERIES}/rtc_io_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/${CHIP_SERIES}/spi_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/${CHIP_SERIES}/temperature_sensor_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/${CHIP_SERIES}/timer_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_twai/${CHIP_SERIES}/twai_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/${CHIP_SERIES}/uart_periph.c)
+
+# ESP Security
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_security/src/esp_hmac.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_security/src/esp_crypto_lock.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_security/src/esp_crypto_periph_clk.c)
+
+# SPI Flash (C6: generic, gd, winbond only)
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_os_func_noos.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_os_func_app.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_generic.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_gd.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_winbond.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/esp_flash_api.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/flash_ops.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_drivers.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/memspi_host_driver.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/esp_flash_spi_init.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/flash_mmap.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/flash_brownout_hook.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/cache_utils.c)
+
+# ULP lp_core
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/lp_core_i2c.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/lp_core.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/shared/ulp_lp_core_memory_shared.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/shared/ulp_lp_core_lp_timer_shared.c
+)
+
+# Upper HAL RMT / GPIO
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_common.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_encoder.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_encoder_bytes.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_encoder_copy.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_encoder_simple.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_rx.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_tx.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_gpio/src/gpio.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_gpio/src/rtc_io.c)
+
+# Sleep ASM
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/lowpower/port/esp32c6/sleep_cpu_asm.S
+)
+
+# NuttX platform
+list(
+  APPEND HAL_SRCS ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/platform/os.c
+  ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/heap_caps.c
+  ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/components/newlib/newlib/libc/misc/init.c)
+
+# Bootloader flash encrypt
+list(APPEND HAL_SRCS
+     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/flash_encrypt.c)
+
+# ##############################################################################
+# Simple Boot
+# ##############################################################################
+
+if(CONFIG_ESPRESSIF_SIMPLE_BOOT)
+  list(
+    APPEND
+    HAL_SRCS
+    ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/bootloader_banner_wrap.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_console.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_console_loader.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/${CHIP_SERIES}/bootloader_${CHIP_SERIES}.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_common.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_common_loader.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_${CHIP_SERIES}.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/flash_qio_mode.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_clock_init.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_mem.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_random.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_random_${CHIP_SERIES}.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/esp_image_format.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_sha.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/${CHIP_SERIES}/bootloader_soc.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/esp_efuse_fields.c)
+  target_link_options(nuttx PRIVATE -Wl,--wrap=bootloader_print_banner)
+elseif(CONFIG_ESPRESSIF_EFUSE_VIRTUAL_KEEP_IN_FLASH)
+  list(
+    APPEND
+    HAL_SRCS
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_${CHIP_SERIES}.c
+  )
+endif()
+
+# ##############################################################################
+# Add HAL sources to arch target
+# ##############################################################################
+
+target_sources(arch PRIVATE ${HAL_SRCS})
diff --git a/arch/risc-v/src/esp32h2/CMakeLists.txt b/arch/risc-v/src/esp32h2/CMakeLists.txt
new file mode 100644
index 00000000000..fa39d89da07
--- /dev/null
+++ b/arch/risc-v/src/esp32h2/CMakeLists.txt
@@ -0,0 +1,32 @@
+# ##############################################################################
+# arch/risc-v/src/esp32h2/CMakeLists.txt
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+# Include common espressif CMake configuration
+add_subdirectory(${CMAKE_CURRENT_SOURCE_DIR}/../common/espressif espressif)
+
+set(SRCS esp_chip_rev.c)
+
+target_compile_definitions(arch PRIVATE _RETARGETABLE_LOCKING)
+
+if(SRCS)
+  target_sources(arch PRIVATE ${SRCS})
+endif()
diff --git a/arch/risc-v/src/esp32h2/hal_esp32h2.cmake b/arch/risc-v/src/esp32h2/hal_esp32h2.cmake
new file mode 100644
index 00000000000..b7049a238d1
--- /dev/null
+++ b/arch/risc-v/src/esp32h2/hal_esp32h2.cmake
@@ -0,0 +1,574 @@
+# ##############################################################################
+# arch/risc-v/src/esp32h2/hal_esp32h2.cmake
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+# ##############################################################################
+# Include Paths (from hal_esp32h2.mk)
+# ##############################################################################
+
+if(NOT EXISTS ${ESP_HAL_3RDPARTY_REPO})
+  message(
+    FATAL_ERROR
+      "ESP_HAL_3RDPARTY_REPO does not exist: ${ESP_HAL_3RDPARTY_REPO}. Please ensure the HAL 3rd party repository is cloned correctly."
+  )
+endif()
+
+target_include_directories(
+  arch
+  PRIVATE
+    ${ESP_HAL_3RDPARTY_REPO}/nuttx/include
+    ${ESP_HAL_3RDPARTY_REPO}/nuttx/include/mbedtls
+    ${ESP_HAL_3RDPARTY_REPO}/nuttx/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/private_include
+    ${ESP_HAL_3RDPARTY_REPO}/components/driver/twai/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/driver/spi/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/efuse/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/efuse/private_include
+    ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/private_include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/interface
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_blockdev/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_common/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_clock/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_clock/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2s/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2s/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mcpwm/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mcpwm/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_parlio/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_parlio/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pcnt/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pcnt/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rmt/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rmt/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rtc_timer/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rtc_timer/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_touch_sens/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_touch_sens/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_twai/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_twai/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_usb/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_usb/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_wdt/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_wdt/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/dma/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/etm/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include/esp_private
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include/soc
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include/soc/${CHIP_SERIES}
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi/mspi_intr/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi/mspi_timing_tuning/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi/mspi_timing_tuning/port/${CHIP_SERIES}
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi/mspi_timing_tuning/tuning_scheme_impl/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/ldo/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/private_include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/power_supply/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_pm/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}/include/${CHIP_SERIES}
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_security/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/include/private
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/public_compat
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_timer/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/hal/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/hal/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/hal/platform_port/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/heap/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/log
+    ${ESP_HAL_3RDPARTY_REPO}/components/log/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/tag_log_level
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/include/aes
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/psa_driver/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/tf-psa-crypto/core
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/tf-psa-crypto/drivers/builtin/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/tf-psa-crypto/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_libc/priv_include
+    ${ESP_HAL_3RDPARTY_REPO}/components/riscv/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/soc/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/register
+    ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/include/esp_flash_chips
+    ${ESP_HAL_3RDPARTY_REPO}/components/ulp
+    ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core
+    ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/shared
+    ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/shared/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/ulp/ulp_common
+    ${ESP_HAL_3RDPARTY_REPO}/components/ulp/ulp_common/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/src
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_gpio/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_uart/include
+    ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/components/esp_libc/platform_include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi_timing_tuning/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_timer/private_include
+    ${ESP_HAL_3RDPARTY_REPO}/components/heap/private_include)
+
+if(CONFIG_ESPRESSIF_SIMPLE_BOOT)
+  target_include_directories(
+    arch PRIVATE ${ESP_HAL_3RDPARTY_REPO}/components/esp_app_format/include)
+endif()
+
+# ##############################################################################
+# Linker Scripts (from hal_esp32h2.mk)
+# ##############################################################################
+
+set(ESP_ROM_LD_DIR
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}/ld)
+set(ESP_SOC_LD_DIR ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/ld)
+set(ESP_RISCV_LD_DIR ${ESP_HAL_3RDPARTY_REPO}/components/riscv/ld)
+set(ESP_WDT_LD_DIR
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_wdt/${CHIP_SERIES})
+
+target_link_options(
+  nuttx
+  PRIVATE
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.api.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.libc.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.libc-suboptimal_for_misaligned_mem.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.libgcc.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.newlib.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.version.ld
+  -T${ESP_WDT_LD_DIR}/rom.wdt.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.heap.ld
+  -T${ESP_RISCV_LD_DIR}/rom.api.ld
+  -T${ESP_SOC_LD_DIR}/${CHIP_SERIES}.peripherals.ld)
+
+if(CONFIG_ESPRESSIF_USE_LP_CORE)
+  target_link_options(
+    nuttx PRIVATE
+    -T${NUTTX_DIR}/arch/${CONFIG_ARCH}/src/board/scripts/ulp_aliases.ld)
+endif()
+
+if(CONFIG_ESPRESSIF_SPI_FLASH_USE_ROM_CODE)
+  target_link_options(nuttx PRIVATE
+                      -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.spiflash.ld)
+endif()
+
+# ##############################################################################
+# HAL Source Files (from hal_esp32h2.mk CHIP_CSRCS and CHIP_ASRCS)
+# ##############################################################################
+
+set(HAL_SRCS)
+
+# ESP ADC
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/adc_cali_curve_fitting.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/adc_cali.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/${CHIP_SERIES}/curve_fitting_coefficients.c
+)
+
+# Bootloader support
+list(
+  APPEND HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_init.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_efuse.c)
+
+# EFUSE
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/esp_efuse_api.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/esp_efuse_utility.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/esp_efuse_startup.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_fields.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_rtc_calib.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_table.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_table_v0.0_v1.1.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_utility.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c
+)
+
+# ESP Common
+list(APPEND HAL_SRCS
+     ${ESP_HAL_3RDPARTY_REPO}/components/esp_common/src/esp_err_to_name.c)
+
+# ESP HW Support
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/adc_share_hw_ctrl.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/clk_ctrl_os.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/clk_utils.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/cpu.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/src/gdma.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/esp_clk.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/esp_gpio_reserve.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/esp_memory_utils.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/hw_random.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/intr_alloc.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mac_addr.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/modem_clock.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/periph_ctrl.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/regi2c_ctrl.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/rtc_module.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_console.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_event.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_gpio.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_modes.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_modem.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_uart.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_retention.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_system_peripheral.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/lowpower/port/${CHIP_SERIES}/sleep_cpu.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/lowpower/port/${CHIP_SERIES}/sleep_clock.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/esp_clk_tree_common.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/pau_regdma.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/regdma_link.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/esp_clk_tree.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/esp_cpu_intr.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/cpu_region_protect.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/peripheral_domain_pd.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/pmu_init.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/pmu_param.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/pmu_sleep.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_clk.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_clk_init.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_time.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/sar_periph_ctrl.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/systimer.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/power_supply/brownout.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/power_supply/vbat.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi/mspi_timing_tuning/mspi_timing_tuning.c
+)
+
+# ESP MM
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/esp_cache_msync.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/esp_mmu_map.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/esp_cache_utils.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/port/${CHIP_SERIES}/ext_mem_layout.c
+)
+
+# ESP PM
+list(APPEND HAL_SRCS ${ESP_HAL_3RDPARTY_REPO}/components/esp_pm/pm_impl.c)
+
+# ESP ROM
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_sys.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_print.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_crc.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_serial_output.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_spiflash.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_efuse.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_gpio.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_regi2c_${CHIP_SERIES}.c
+)
+
+# ESP System
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/esp_err.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/esp_system.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/startup.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/startup_funcs.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/system_time.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/soc/${CHIP_SERIES}/clk.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/soc/${CHIP_SERIES}/system_internal.c
+)
+
+# HAL components
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/adc_hal_common.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/adc_oneshot_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/apm_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/aes_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/hmac_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/brownout_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/efuse_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/gpio_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/gdma_hal_ahb_v1.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/gdma_hal_top.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/hal_utils.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/ledc_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/ledc_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pcnt/pcnt_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rmt/rmt_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/sdm_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/i2c_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2s/i2s_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/sha_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/spi_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/spi_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/timer_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_twai/twai_hal_v1.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/cache_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/mmu_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mcpwm/mcpwm_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/uart_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/uart_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_wdt/wdt_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_hal_gpspi.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_encrypt_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/systimer_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/rtc_io_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/spi_slave_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/spi_slave_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_clock/${CHIP_SERIES}/clk_tree_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/${CHIP_SERIES}/efuse_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/${CHIP_SERIES}/modem_clock_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/${CHIP_SERIES}/pau_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/${CHIP_SERIES}/pmu_hal.c)
+
+# Log
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/log_level.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/tag_log_level/tag_log_level.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/tag_log_level/linked_list/log_linked_list.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/noos/log_lock.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/noos/log_timestamp.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/os/log_write.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/os/util.c)
+
+# RISC-V (C6 uses interrupt_plic)
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/riscv/instruction_decode.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/riscv/interrupt.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/riscv/interrupt_plic.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/riscv/rv_utils.c)
+
+# SOC / periph
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/soc/lldesc.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/${CHIP_SERIES}/adc_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/${CHIP_SERIES}/dedic_gpio_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/${CHIP_SERIES}/gdma_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/interrupts.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/gpio_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/${CHIP_SERIES}/ledc_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pcnt/${CHIP_SERIES}/pcnt_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rmt/${CHIP_SERIES}/rmt_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/${CHIP_SERIES}/sdm_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/${CHIP_SERIES}/i2c_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2s/${CHIP_SERIES}/i2s_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mcpwm/${CHIP_SERIES}/mcpwm_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/${CHIP_SERIES}/rtc_io_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/${CHIP_SERIES}/spi_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/${CHIP_SERIES}/temperature_sensor_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/${CHIP_SERIES}/timer_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_twai/${CHIP_SERIES}/twai_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/${CHIP_SERIES}/uart_periph.c)
+
+# ESP Security
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_security/src/esp_hmac.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_security/src/esp_crypto_lock.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_security/src/esp_crypto_periph_clk.c)
+
+# SPI Flash (C6: generic, gd, winbond only)
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_os_func_noos.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_os_func_app.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_generic.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_gd.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_winbond.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/esp_flash_api.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/flash_ops.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_drivers.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/memspi_host_driver.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/esp_flash_spi_init.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/flash_mmap.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/flash_brownout_hook.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/cache_utils.c)
+
+# Upper HAL RMT / GPIO
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_common.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_encoder.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_encoder_bytes.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_encoder_copy.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_encoder_simple.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_rx.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_tx.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_gpio/src/gpio.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_gpio/src/rtc_io.c)
+
+# Sleep ASM
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/lowpower/port/esp32h2/sleep_cpu_asm.S
+)
+
+# NuttX platform
+list(
+  APPEND HAL_SRCS ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/platform/os.c
+  ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/heap_caps.c
+  ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/components/newlib/newlib/libc/misc/init.c)
+
+# Bootloader flash encrypt
+list(APPEND HAL_SRCS
+     ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/flash_encrypt.c)
+
+# ##############################################################################
+# Simple Boot
+# ##############################################################################
+
+if(CONFIG_ESPRESSIF_SIMPLE_BOOT)
+  list(
+    APPEND
+    HAL_SRCS
+    ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/bootloader_banner_wrap.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_console.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_console_loader.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/${CHIP_SERIES}/bootloader_${CHIP_SERIES}.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_common.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_common_loader.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_${CHIP_SERIES}.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/flash_qio_mode.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_clock_init.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_mem.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_random.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_random_${CHIP_SERIES}.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/esp_image_format.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_sha.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/${CHIP_SERIES}/bootloader_soc.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/esp_efuse_fields.c)
+  target_link_options(nuttx PRIVATE -Wl,--wrap=bootloader_print_banner)
+elseif(CONFIG_ESPRESSIF_EFUSE_VIRTUAL_KEEP_IN_FLASH)
+  list(
+    APPEND
+    HAL_SRCS
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_${CHIP_SERIES}.c
+  )
+endif()
+
+# ##############################################################################
+# Add HAL sources to arch target
+# ##############################################################################
+
+target_sources(arch PRIVATE ${HAL_SRCS})
+
+# ##############################################################################
+# This override is required to allow linker script to include "sdkconfig.h" and
+# "ld.common". Store path in a GLOBAL property (scope when hal runs); the
+# overridden function runs later from top-level and reads it.
+# ##############################################################################
+
+set_property(
+  GLOBAL PROPERTY LD_SCRIPT_ESPRESSIF_HAL_INCLUDE_DIR
+                  ${ESP_HAL_3RDPARTY_REPO}/nuttx/${CHIP_SERIES}/include)
+
+set_property(GLOBAL PROPERTY LD_SCRIPT_ESPRESSIF_ADDITIONAL_INCLUDE_DIR
+                             ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/ld)
+
+function(nuttx_generate_preprocess_target)
+  nuttx_parse_function_args(
+    FUNC
+    nuttx_generate_preprocess_target
+    ONE_VALUE
+    SOURCE_FILE
+    TARGET_FILE
+    MULTI_VALUE
+    DEPENDS
+    REQUIRED
+    SOURCE_FILE
+    TARGET_FILE
+    ARGN
+    ${ARGN})
+
+  get_property(LD_SCRIPT_HAL_DIR GLOBAL
+               PROPERTY LD_SCRIPT_ESPRESSIF_HAL_INCLUDE_DIR)
+  get_property(LD_SCRIPT_ADDITIONAL_DIR GLOBAL
+               PROPERTY LD_SCRIPT_ESPRESSIF_ADDITIONAL_INCLUDE_DIR)
+  set(LD_SCRIPT_HAL_INCLUDE)
+  set(LD_SCRIPT_ADDITIONAL_INCLUDE)
+  if(LD_SCRIPT_HAL_DIR)
+    set(LD_SCRIPT_HAL_INCLUDE -I${LD_SCRIPT_HAL_DIR})
+  endif()
+  if(LD_SCRIPT_ADDITIONAL_DIR)
+    set(LD_SCRIPT_ADDITIONAL_INCLUDE -I${LD_SCRIPT_ADDITIONAL_DIR})
+  endif()
+  add_custom_command(
+    OUTPUT ${TARGET_FILE}
+    COMMAND
+      ${PREPROCESS} -I${CMAKE_BINARY_DIR}/include -I${NUTTX_DIR}/include
+      -I${NUTTX_CHIP_ABS_DIR} ${LD_SCRIPT_HAL_INCLUDE}
+      ${LD_SCRIPT_ADDITIONAL_INCLUDE} ${SOURCE_FILE} > ${TARGET_FILE}
+    DEPENDS ${SOURCE_FILE} ${DEPENDS})
+endfunction()
diff --git a/arch/risc-v/src/esp32p4/CMakeLists.txt b/arch/risc-v/src/esp32p4/CMakeLists.txt
new file mode 100644
index 00000000000..3866899dd47
--- /dev/null
+++ b/arch/risc-v/src/esp32p4/CMakeLists.txt
@@ -0,0 +1,33 @@
+# ##############################################################################
+# arch/risc-v/src/esp32p4/CMakeLists.txt
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+# Include common espressif CMake configuration
+add_subdirectory(${CMAKE_CURRENT_SOURCE_DIR}/../common/espressif espressif)
+
+set(SRCS esp_chip_rev.c)
+
+target_compile_definitions(arch PRIVATE _RETARGETABLE_LOCKING)
+target_compile_options(arch PRIVATE -Wno-array-bounds -Wno-stringop-overflow)
+
+if(SRCS)
+  target_sources(arch PRIVATE ${SRCS})
+endif()
diff --git a/arch/risc-v/src/esp32p4/hal_esp32p4.cmake b/arch/risc-v/src/esp32p4/hal_esp32p4.cmake
new file mode 100644
index 00000000000..7b4e5dd0c9c
--- /dev/null
+++ b/arch/risc-v/src/esp32p4/hal_esp32p4.cmake
@@ -0,0 +1,482 @@
+# ##############################################################################
+# arch/risc-v/src/esp32p4/hal_esp32p4.cmake
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+# ##############################################################################
+# Include Paths (from hal_esp32p4.mk)
+# ##############################################################################
+
+if(NOT EXISTS ${ESP_HAL_3RDPARTY_REPO})
+  message(
+    FATAL_ERROR
+      "ESP_HAL_3RDPARTY_REPO does not exist: ${ESP_HAL_3RDPARTY_REPO}. Please ensure the HAL 3rd party repository is cloned correctly."
+  )
+endif()
+
+set(ESP32P4_INCLUDES
+    ${ESP_HAL_3RDPARTY_REPO}/nuttx/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/nuttx/include
+    ${ESP_HAL_3RDPARTY_REPO}/nuttx/include/mbedtls
+    ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/components/esp_libc/platform_include
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/private_include
+    ${ESP_HAL_3RDPARTY_REPO}/components/efuse/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/efuse/private_include
+    ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/private_include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/interface
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_app_format/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_blockdev/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_common/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_cam/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_cam/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_clock/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_clock/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_emac/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_emac/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2s/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2s/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_lcd/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_lcd/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mcpwm/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mcpwm/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_parlio/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_parlio/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pcnt/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pcnt/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rmt/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rmt/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rtc_timer/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rtc_timer/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_touch_sens/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_touch_sens/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_twai/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_twai/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_usb/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_usb/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_wdt/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_wdt/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/dma/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/etm/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include/esp_private
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include/soc
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include/soc/${CHIP_SERIES}
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/ldo/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi/mspi_intr/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi/mspi_timing_tuning/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi/mspi_timing_tuning/port/${CHIP_SERIES}
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi/mspi_timing_tuning/tuning_scheme_impl/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/private_include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/power_supply/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_libc/priv_include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_pm/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}/include/${CHIP_SERIES}
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_security/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/ld
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/include/private
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/public_compat
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_timer/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/hal/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/hal/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/hal/platform_port/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/heap/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/log
+    ${ESP_HAL_3RDPARTY_REPO}/components/log/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/tag_log_level
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/tf-psa-crypto/core
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/tf-psa-crypto/drivers/builtin/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/tf-psa-crypto/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/include/aes
+    ${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/psa_driver/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/riscv/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/soc/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/include/esp_flash_chips
+    ${ESP_HAL_3RDPARTY_REPO}/components/ulp
+    ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core
+    ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/shared
+    ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/shared/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/ulp/ulp_common
+    ${ESP_HAL_3RDPARTY_REPO}/components/ulp/ulp_common/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/src
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_gpio/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/include
+    ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src)
+
+if(CONFIG_ESP32P4_SELECTS_REV_LESS_V3)
+  list(APPEND ESP32P4_INCLUDES
+       ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/register/hw_ver1)
+else()
+  list(APPEND ESP32P4_INCLUDES
+       ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/register/hw_ver3)
+endif()
+
+target_include_directories(arch PRIVATE ${ESP32P4_INCLUDES})
+
+# ##############################################################################
+# Linker Scripts (from hal_esp32p4.mk)
+# ##############################################################################
+
+set(ESP_ROM_LD_DIR
+    ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}/ld)
+set(ESP_SOC_LD_DIR ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/ld)
+set(ESP_RISCV_LD_DIR ${ESP_HAL_3RDPARTY_REPO}/components/riscv/ld)
+
+if(CONFIG_ESP32P4_REV_MIN_300)
+  target_link_options(
+    nuttx
+    PRIVATE
+    -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.eco5.ld
+    -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.eco5.libc.ld
+    -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.eco5.libgcc.ld
+    -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.eco5.newlib.ld)
+else()
+  target_link_options(
+    nuttx
+    PRIVATE
+    -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.ld
+    -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.libc.ld
+    -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.libgcc.ld
+    -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.newlib.ld)
+endif()
+
+target_link_options(
+  nuttx
+  PRIVATE
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.api.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.version.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.libc-suboptimal_for_misaligned_mem.ld
+  -T${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.systimer.ld
+  -T${ESP_SOC_LD_DIR}/${CHIP_SERIES}.peripherals.ld
+  -T${ESP_RISCV_LD_DIR}/rom.api.ld)
+
+# Review the path below when ULP core is implemented on CMake
+if(CONFIG_ESPRESSIF_USE_LP_CORE)
+  target_link_options(
+    nuttx PRIVATE
+    -T${TOPDIR}/arch/${CONFIG_ARCH}/src/board/scripts/ulp_aliases.ld)
+endif()
+
+# ##############################################################################
+# HAL Source Files (from hal_esp32p4.mk CHIP_CSRCS)
+# ##############################################################################
+
+set(HAL_SRCS)
+
+list(
+  APPEND
+  HAL_SRCS
+  ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_efuse.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_init.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/esp_image_format.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/flash_encrypt.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_fields.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_rtc_calib.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_table.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_utility.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/esp_efuse_api.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/esp_efuse_utility.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/${CHIP_SERIES}/curve_fitting_coefficients.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/adc_cali_curve_fitting.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/adc_cali.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/${CHIP_SERIES}/adc_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/${CHIP_SERIES}/temperature_sensor_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/adc_hal_common.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/adc_oneshot_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/aes_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_clock/${CHIP_SERIES}/clk_tree_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/${CHIP_SERIES}/gdma_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/gdma_hal_ahb_v2.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/gdma_hal_axi.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/gdma_hal_crc_gen.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/gdma_hal_top.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/${CHIP_SERIES}/dedic_gpio_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/${CHIP_SERIES}/sdm_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/gpio_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/rtc_io_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/sdm_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/${CHIP_SERIES}/rtc_io_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/${CHIP_SERIES}/spi_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/spi_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/spi_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/spi_slave_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/spi_slave_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/${CHIP_SERIES}/i2c_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/i2c_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2s/${CHIP_SERIES}/i2s_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2s/i2s_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/${CHIP_SERIES}/ledc_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/ledc_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/ledc_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mcpwm/${CHIP_SERIES}/mcpwm_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mcpwm/mcpwm_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_encrypt_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_hal_gpspi.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pcnt/${CHIP_SERIES}/pcnt_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pcnt/pcnt_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/brownout_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rmt/${CHIP_SERIES}/rmt_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rmt/rmt_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/hmac_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/sha_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/${CHIP_SERIES}/timer_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/timer_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_twai/${CHIP_SERIES}/twai_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_twai/twai_hal_v1.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/${CHIP_SERIES}/uart_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/uart_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/uart_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_wdt/wdt_hal_iram.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/adc_share_hw_ctrl.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/clk_ctrl_os.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/cpu.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/esp_clk.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/esp_gpio_reserve.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/esp_memory_utils.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/hw_random.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/intr_alloc.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mac_addr.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi/mspi_timing_tuning/mspi_timing_tuning.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/periph_ctrl.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/cpu_region_protect.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/esp_clk_tree.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/esp_cpu_intr.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/io_mux.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/peripheral_domain_pd.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/pmu_init.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/pmu_param.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/pmu_pvt.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_clk_init.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_clk.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_time.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/sar_periph_ctrl.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/systimer.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/esp_clk_tree_common.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/power_supply/brownout.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/regi2c_ctrl.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/rtc_module.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_modes.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_uart.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/esp_cache_msync.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/esp_cache_utils.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/esp_mmu_map.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/port/${CHIP_SERIES}/ext_mem_layout.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_clic.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_crc.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_efuse.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_gpio.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_print.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_regi2c_${CHIP_SERIES}.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_serial_output.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_spiflash.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_sys.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_systimer.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_security/src/esp_crypto_lock.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_security/src/esp_crypto_periph_clk.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_security/src/esp_hmac.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/esp_err.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/esp_system.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/soc/${CHIP_SERIES}/clk.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/soc/${CHIP_SERIES}/reset_reason.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/soc/${CHIP_SERIES}/system_internal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/startup_funcs.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/startup.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/system_time.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/${CHIP_SERIES}/efuse_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/cache_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/efuse_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/hal_utils.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/hal/mmu_hal.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/log_level.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/tag_log_level/linked_list/log_linked_list.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/tag_log_level/tag_log_level.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/log.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/noos/log_lock.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/noos/log_timestamp.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/os/log_write.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/log/src/os/util.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/riscv/instruction_decode.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/riscv/interrupt_clic.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/riscv/interrupt.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/riscv/rv_utils.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/gpio_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/interrupts.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/power_supply_periph.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/soc/lldesc.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/cache_utils.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/esp_flash_api.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/esp_flash_spi_init.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/flash_brownout_hook.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/flash_mmap.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/flash_ops.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/memspi_host_driver.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_drivers.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_gd.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_generic.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_winbond.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_hpm_enable.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_os_func_app.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_os_func_noos.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/lp_core_i2c.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/lp_core.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/shared/ulp_lp_core_memory_shared.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/ulp/lp_core/shared/ulp_lp_core_lp_timer_shared.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/src/esp_dma_utils.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/src/gdma_link.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/src/gdma.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_gpio/src/gpio.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_gpio/src/rtc_io.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_common.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_encoder_bytes.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_encoder_copy.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_encoder_simple.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_encoder.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_rx.c
+  ${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_rmt/src/rmt_tx.c
+  ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/components/newlib/newlib/libc/misc/init.c
+  ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/heap_caps.c
+  ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/platform/os.c)
+
+if(CONFIG_ESPRESSIF_SIMPLE_BOOT)
+  list(
+    APPEND
+    HAL_SRCS
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_${CHIP_SERIES}.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/flash_qio_mode.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/${CHIP_SERIES}/bootloader_${CHIP_SERIES}.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/${CHIP_SERIES}/bootloader_soc.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_clock_init.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_clock_loader.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_common_loader.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_common.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_console_loader.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_console.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_mem.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_random_${CHIP_SERIES}.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_random.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_sha.c
+    ${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/esp_efuse_fields.c
+    ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/bootloader_banner_wrap.c)
+  target_link_options(nuttx PRIVATE -Wl,--wrap=bootloader_print_banner)
+endif()
+
+if(CONFIG_ESPRESSIF_IDF_ENV_FPGA)
+  list(APPEND HAL_SRCS
+       ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/fpga_overrides_clk.c
+       ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/fpga_overrides_rng.c)
+  target_link_options(nuttx PRIVATE -u esp_common_include_fpga_overrides_clk -u
+                      esp_common_include_fpga_overrides_rng)
+endif()
+
+target_sources(arch PRIVATE ${HAL_SRCS})
+
+# ##############################################################################
+# This override is required to allow linker script to include "sdkconfig.h" and
+# "ld.common". Store path in a GLOBAL property (scope when hal runs); the
+# overridden function runs later from top-level and reads it.
+# ##############################################################################
+
+set_property(
+  GLOBAL PROPERTY LD_SCRIPT_ESPRESSIF_HAL_INCLUDE_DIR
+                  ${ESP_HAL_3RDPARTY_REPO}/nuttx/${CHIP_SERIES}/include)
+
+set_property(GLOBAL PROPERTY LD_SCRIPT_ESPRESSIF_ADDITIONAL_INCLUDE_DIR
+                             ${ESP_HAL_3RDPARTY_REPO}/components/esp_system/ld)
+
+function(nuttx_generate_preprocess_target)
+  nuttx_parse_function_args(
+    FUNC
+    nuttx_generate_preprocess_target
+    ONE_VALUE
+    SOURCE_FILE
+    TARGET_FILE
+    MULTI_VALUE
+    DEPENDS
+    REQUIRED
+    SOURCE_FILE
+    TARGET_FILE
+    ARGN
+    ${ARGN})
+
+  get_property(LD_SCRIPT_HAL_DIR GLOBAL
+               PROPERTY LD_SCRIPT_ESPRESSIF_HAL_INCLUDE_DIR)
+  get_property(LD_SCRIPT_ADDITIONAL_DIR GLOBAL
+               PROPERTY LD_SCRIPT_ESPRESSIF_ADDITIONAL_INCLUDE_DIR)
+  set(LD_SCRIPT_HAL_INCLUDE)
+  set(LD_SCRIPT_ADDITIONAL_INCLUDE)
+  if(LD_SCRIPT_HAL_DIR)
+    set(LD_SCRIPT_HAL_INCLUDE -I${LD_SCRIPT_HAL_DIR})
+  endif()
+  if(LD_SCRIPT_ADDITIONAL_DIR)
+    set(LD_SCRIPT_ADDITIONAL_INCLUDE -I${LD_SCRIPT_ADDITIONAL_DIR})
+  endif()
+
+  add_custom_command(
+    OUTPUT ${TARGET_FILE}
+    COMMAND
+      ${PREPROCESS} -I${CMAKE_BINARY_DIR}/include -I${NUTTX_DIR}/include
+      -I${NUTTX_CHIP_ABS_DIR} ${LD_SCRIPT_HAL_INCLUDE}
+      ${LD_SCRIPT_ADDITIONAL_INCLUDE} ${SOURCE_FILE} > ${TARGET_FILE}
+    DEPENDS ${SOURCE_FILE} ${DEPENDS})
+endfunction()
diff --git a/boards/risc-v/esp32c3/common/CMakeLists.txt b/boards/risc-v/esp32c3/common/CMakeLists.txt
new file mode 100644
index 00000000000..7d7d7e72baf
--- /dev/null
+++ b/boards/risc-v/esp32c3/common/CMakeLists.txt
@@ -0,0 +1,24 @@
+# ##############################################################################
+# boards/risc-v/esp32c3/common/CMakeLists.txt
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+add_subdirectory(src)
+target_include_directories(board PRIVATE include)
diff --git a/boards/risc-v/esp32c3/common/src/CMakeLists.txt b/boards/risc-v/esp32c3/common/src/CMakeLists.txt
new file mode 100644
index 00000000000..d8b1323adb3
--- /dev/null
+++ b/boards/risc-v/esp32c3/common/src/CMakeLists.txt
@@ -0,0 +1,101 @@
+# ##############################################################################
+# boards/risc-v/esp32c3/common/src/CMakeLists.txt
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+set(SRCS)
+
+if(CONFIG_ARCH_BOARD_COMMON)
+
+  if(CONFIG_ESPRESSIF_ADC)
+    list(APPEND SRCS esp_board_adc.c)
+  endif()
+
+  if(CONFIG_ESPRESSIF_LEDC)
+    list(APPEND SRCS esp_board_ledc.c)
+  endif()
+
+  if(CONFIG_ESP_RMT)
+    list(APPEND SRCS esp_board_rmt.c)
+  endif()
+
+  if(CONFIG_ESPRESSIF_SPI)
+    list(APPEND SRCS esp_board_spi.c)
+  endif()
+
+  if(CONFIG_SPI)
+    list(APPEND SRCS esp_board_spidev.c)
+  endif()
+
+  if(CONFIG_SPI_SLAVE)
+    list(APPEND SRCS esp_board_spislavedev.c)
+  endif()
+
+  if(CONFIG_I2C)
+    list(APPEND SRCS esp_board_i2c.c)
+  endif()
+
+  if(CONFIG_ESPRESSIF_I2S)
+    list(APPEND SRCS esp_board_i2s.c)
+  endif()
+
+  if(CONFIG_ESPRESSIF_SPIFLASH)
+    list(APPEND SRCS esp_board_spiflash.c)
+  endif()
+
+  if(CONFIG_ESPRESSIF_TWAI)
+    list(APPEND SRCS esp_board_twai.c)
+  endif()
+
+  if(CONFIG_ESPRESSIF_WIFI)
+    list(APPEND SRCS esp_board_wlan.c)
+  endif()
+
+  if(CONFIG_SENSORS_BMP180)
+    list(APPEND SRCS esp_board_bmp180.c)
+  endif()
+
+  if(CONFIG_SENSORS_BMP280)
+    list(APPEND SRCS esp_board_bmp280.c)
+  endif()
+
+  if(CONFIG_MMCSD_SPI)
+    list(APPEND SRCS esp_board_mmcsd.c)
+  endif()
+
+  # Handle ROMFS init scripts
+  if(CONFIG_ETC_ROMFS)
+    nuttx_add_romfs(
+      NAME
+      etc
+      MOUNTPOINT
+      etc
+      RCSRCS
+      etc/init.d/rcS
+      etc/init.d/rc.sysinit
+      PATH
+      ${CMAKE_CURRENT_BINARY_DIR}/etc)
+
+    target_link_libraries(board PRIVATE romfs_etc)
+  endif()
+
+endif()
+
+target_sources(board PRIVATE ${SRCS})
diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/CMakeLists.txt b/boards/risc-v/esp32c3/esp32c3-devkit/CMakeLists.txt
new file mode 100644
index 00000000000..64b6da81d27
--- /dev/null
+++ b/boards/risc-v/esp32c3/esp32c3-devkit/CMakeLists.txt
@@ -0,0 +1,23 @@
+# ##############################################################################
+# boards/risc-v/esp32c3/esp32c3-devkit/CMakeLists.txt
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+add_subdirectory(src)
diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/src/CMakeLists.txt b/boards/risc-v/esp32c3/esp32c3-devkit/src/CMakeLists.txt
new file mode 100644
index 00000000000..e4db5a7c0d5
--- /dev/null
+++ b/boards/risc-v/esp32c3/esp32c3-devkit/src/CMakeLists.txt
@@ -0,0 +1,66 @@
+# ##############################################################################
+# boards/risc-v/esp32c3/esp32c3-devkit/src/CMakeLists.txt
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+set(SRCS esp32c3_boot.c esp32c3_bringup.c)
+
+if(CONFIG_BOARDCTL)
+  list(APPEND SRCS esp32c3_appinit.c)
+
+  if(CONFIG_BOARDCTL_RESET)
+    list(APPEND SRCS esp32c3_reset.c)
+  endif()
+endif()
+
+if(CONFIG_DEV_GPIO)
+  list(APPEND SRCS esp32c3_gpio.c)
+endif()
+
+if(CONFIG_ARCH_BUTTONS)
+  list(APPEND SRCS esp32c3_buttons.c)
+endif()
+
+target_sources(board PRIVATE ${SRCS})
+
+# ##############################################################################
+# Linker scripts
+# ##############################################################################
+
+# Get the chip series (remove quotes)
+string(REPLACE "\"" "" CHIP_SERIES "${CONFIG_ESPRESSIF_CHIP_SERIES}")
+
+# Board common scripts directory
+set(BOARD_COMMON_DIR "${NUTTX_BOARD_DIR}/../common")
+
+# Always include aliases and flat memory linker scripts
+set(LDSCRIPTS "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_aliases.ld"
+              "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_flat_memory.ld")
+
+# Select sections linker script based on boot configuration
+if(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT OR CONFIG_ESPRESSIF_SIMPLE_BOOT)
+  list(APPEND LDSCRIPTS
+       "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_sections.ld")
+else()
+  list(APPEND LDSCRIPTS
+       "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_legacy_sections.ld")
+endif()
+
+set_property(GLOBAL PROPERTY LD_SCRIPT ${LDSCRIPTS})
diff --git a/boards/risc-v/esp32c6/common/CMakeLists.txt b/boards/risc-v/esp32c6/common/CMakeLists.txt
new file mode 100644
index 00000000000..619113a76d7
--- /dev/null
+++ b/boards/risc-v/esp32c6/common/CMakeLists.txt
@@ -0,0 +1,24 @@
+# ##############################################################################
+# boards/risc-v/esp32c6/common/CMakeLists.txt
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+add_subdirectory(src)
+target_include_directories(board PRIVATE include)
diff --git a/boards/risc-v/esp32c6/common/src/CMakeLists.txt b/boards/risc-v/esp32c6/common/src/CMakeLists.txt
new file mode 100644
index 00000000000..4eaaf07d419
--- /dev/null
+++ b/boards/risc-v/esp32c6/common/src/CMakeLists.txt
@@ -0,0 +1,117 @@
+# ##############################################################################
+# boards/risc-v/esp32c6/common/src/CMakeLists.txt
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+set(SRCS)
+
+if(CONFIG_ARCH_BOARD_COMMON)
+
+  if(CONFIG_ESPRESSIF_ADC)
+    list(APPEND SRCS esp_board_adc.c)
+  endif()
+
+  if(CONFIG_ESPRESSIF_LEDC)
+    list(APPEND SRCS esp_board_ledc.c)
+  endif()
+
+  if(CONFIG_ESP_RMT)
+    list(APPEND SRCS esp_board_rmt.c)
+  endif()
+
+  if(CONFIG_ESPRESSIF_SPI)
+    list(APPEND SRCS esp_board_spi.c)
+  endif()
+
+  if(CONFIG_SPI)
+    list(APPEND SRCS esp_board_spidev.c)
+  endif()
+
+  if(CONFIG_SPI_SLAVE)
+    list(APPEND SRCS esp_board_spislavedev.c)
+  endif()
+
+  if(CONFIG_I2C)
+    list(APPEND SRCS esp_board_i2c.c)
+  endif()
+
+  if(CONFIG_ESPRESSIF_I2S)
+    list(APPEND SRCS esp_board_i2s.c)
+  endif()
+
+  if(CONFIG_ESPRESSIF_SPIFLASH)
+    list(APPEND SRCS esp_board_spiflash.c)
+  endif()
+
+  if(CONFIG_ESPRESSIF_TWAI)
+    list(APPEND SRCS esp_board_twai.c)
+  endif()
+
+  if(CONFIG_ESPRESSIF_WIFI)
+    list(APPEND SRCS esp_board_wlan.c)
+  endif()
+
+  if(CONFIG_SENSORS_BMP180)
+    list(APPEND SRCS esp_board_bmp180.c)
+  endif()
+
+  if(CONFIG_ESP_MCPWM)
+    list(APPEND SRCS esp_board_mcpwm.c)
+  endif()
+
+  if(CONFIG_CL_MFRC522)
+    list(APPEND SRCS esp_board_mfrc522.c)
+  endif()
+
+  if(CONFIG_ESP_PCNT)
+    list(APPEND SRCS esp_board_pcnt.c)
+  endif()
+
+  if(CONFIG_SENSORS_MPU60X0)
+    list(APPEND SRCS esp_board_mpu60x0.c)
+  endif()
+
+  if(CONFIG_NET_OA_TC6)
+    list(APPEND SRCS esp_board_oa_tc6.c)
+  endif()
+
+  if(CONFIG_MMCSD_SPI)
+    list(APPEND SRCS esp_board_mmcsd.c)
+  endif()
+
+  # Handle ROMFS init scripts
+  if(CONFIG_ETC_ROMFS)
+    nuttx_add_romfs(
+      NAME
+      etc
+      MOUNTPOINT
+      etc
+      RCSRCS
+      etc/init.d/rcS
+      etc/init.d/rc.sysinit
+      PATH
+      ${CMAKE_CURRENT_BINARY_DIR}/etc)
+
+    target_link_libraries(board PRIVATE romfs_etc)
+  endif()
+
+endif()
+
+target_sources(board PRIVATE ${SRCS})
diff --git a/boards/risc-v/esp32c6/esp32c6-devkitc/CMakeLists.txt b/boards/risc-v/esp32c6/esp32c6-devkitc/CMakeLists.txt
new file mode 100644
index 00000000000..73eb1f2af31
--- /dev/null
+++ b/boards/risc-v/esp32c6/esp32c6-devkitc/CMakeLists.txt
@@ -0,0 +1,23 @@
+# ##############################################################################
+# boards/risc-v/esp32c6/esp32c6-devkitc/CMakeLists.txt
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+add_subdirectory(src)
diff --git a/boards/risc-v/esp32c6/esp32c6-devkitc/src/CMakeLists.txt b/boards/risc-v/esp32c6/esp32c6-devkitc/src/CMakeLists.txt
new file mode 100644
index 00000000000..f29d24ac270
--- /dev/null
+++ b/boards/risc-v/esp32c6/esp32c6-devkitc/src/CMakeLists.txt
@@ -0,0 +1,62 @@
+# ##############################################################################
+# boards/risc-v/esp32c6/esp32c6-devkitc/src/CMakeLists.txt
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+set(SRCS esp32c6_boot.c esp32c6_bringup.c)
+
+if(CONFIG_BOARDCTL)
+  list(APPEND SRCS esp32c6_appinit.c)
+
+  if(CONFIG_BOARDCTL_RESET)
+    list(APPEND SRCS esp32c6_reset.c)
+  endif()
+endif()
+
+if(CONFIG_DEV_GPIO)
+  list(APPEND SRCS esp32c6_gpio.c)
+endif()
+
+if(CONFIG_ARCH_BUTTONS)
+  list(APPEND SRCS esp32c6_buttons.c)
+endif()
+
+target_sources(board PRIVATE ${SRCS})
+
+# ##############################################################################
+# Linker scripts
+# ##############################################################################
+
+string(REPLACE "\"" "" CHIP_SERIES "${CONFIG_ESPRESSIF_CHIP_SERIES}")
+
+set(BOARD_COMMON_DIR "${NUTTX_BOARD_DIR}/../common")
+
+set(LDSCRIPTS "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_aliases.ld"
+              "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_flat_memory.ld")
+
+if(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT OR CONFIG_ESPRESSIF_SIMPLE_BOOT)
+  list(APPEND LDSCRIPTS
+       "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_sections.ld")
+else()
+  list(APPEND LDSCRIPTS
+       "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_legacy_sections.ld")
+endif()
+
+set_property(GLOBAL PROPERTY LD_SCRIPT ${LDSCRIPTS})
diff --git a/boards/risc-v/esp32c6/esp32c6-devkitm/CMakeLists.txt b/boards/risc-v/esp32c6/esp32c6-devkitm/CMakeLists.txt
new file mode 100644
index 00000000000..e1286847bd2
--- /dev/null
+++ b/boards/risc-v/esp32c6/esp32c6-devkitm/CMakeLists.txt
@@ -0,0 +1,23 @@
+# ##############################################################################
+# boards/risc-v/esp32c6/esp32c6-devkitm/CMakeLists.txt
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+add_subdirectory(src)
diff --git a/boards/risc-v/esp32c6/esp32c6-devkitm/src/CMakeLists.txt b/boards/risc-v/esp32c6/esp32c6-devkitm/src/CMakeLists.txt
new file mode 100644
index 00000000000..f25cfebcbed
--- /dev/null
+++ b/boards/risc-v/esp32c6/esp32c6-devkitm/src/CMakeLists.txt
@@ -0,0 +1,62 @@
+# ##############################################################################
+# boards/risc-v/esp32c6/esp32c6-devkitm/src/CMakeLists.txt
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+set(SRCS esp32c6_boot.c esp32c6_bringup.c)
+
+if(CONFIG_BOARDCTL)
+  list(APPEND SRCS esp32c6_appinit.c)
+
+  if(CONFIG_BOARDCTL_RESET)
+    list(APPEND SRCS esp32c6_reset.c)
+  endif()
+endif()
+
+if(CONFIG_DEV_GPIO)
+  list(APPEND SRCS esp32c6_gpio.c)
+endif()
+
+if(CONFIG_ARCH_BUTTONS)
+  list(APPEND SRCS esp32c6_buttons.c)
+endif()
+
+target_sources(board PRIVATE ${SRCS})
+
+# ##############################################################################
+# Linker scripts
+# ##############################################################################
+
+string(REPLACE "\"" "" CHIP_SERIES "${CONFIG_ESPRESSIF_CHIP_SERIES}")
+
+set(BOARD_COMMON_DIR "${NUTTX_BOARD_DIR}/../common")
+
+set(LDSCRIPTS "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_aliases.ld"
+              "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_flat_memory.ld")
+
+if(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT OR CONFIG_ESPRESSIF_SIMPLE_BOOT)
+  list(APPEND LDSCRIPTS
+       "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_sections.ld")
+else()
+  list(APPEND LDSCRIPTS
+       "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_legacy_sections.ld")
+endif()
+
+set_property(GLOBAL PROPERTY LD_SCRIPT ${LDSCRIPTS})
diff --git a/boards/risc-v/esp32h2/common/CMakeLists.txt b/boards/risc-v/esp32h2/common/CMakeLists.txt
new file mode 100644
index 00000000000..abdc5be3533
--- /dev/null
+++ b/boards/risc-v/esp32h2/common/CMakeLists.txt
@@ -0,0 +1,24 @@
+# ##############################################################################
+# boards/risc-v/esp32h2/common/CMakeLists.txt
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+add_subdirectory(src)
+target_include_directories(board PRIVATE include)
diff --git a/boards/risc-v/esp32h2/common/src/CMakeLists.txt b/boards/risc-v/esp32h2/common/src/CMakeLists.txt
new file mode 100644
index 00000000000..ff82bb8b081
--- /dev/null
+++ b/boards/risc-v/esp32h2/common/src/CMakeLists.txt
@@ -0,0 +1,100 @@
+# ##############################################################################
+# boards/risc-v/esp32h2/common/src/CMakeLists.txt
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+set(SRCS)
+
+if(CONFIG_ARCH_BOARD_COMMON)
+
+  if(CONFIG_ESPRESSIF_ADC)
+    list(APPEND SRCS esp_board_adc.c)
+  endif()
+
+  if(CONFIG_ESPRESSIF_LEDC)
+    list(APPEND SRCS esp_board_ledc.c)
+  endif()
+
+  if(CONFIG_ESP_RMT)
+    list(APPEND SRCS esp_board_rmt.c)
+  endif()
+
+  if(CONFIG_ESPRESSIF_SPI)
+    list(APPEND SRCS esp_board_spi.c)
+  endif()
+
+  if(CONFIG_SPI)
+    list(APPEND SRCS esp_board_spidev.c)
+  endif()
+
+  if(CONFIG_SPI_SLAVE)
+    list(APPEND SRCS esp_board_spislavedev.c)
+  endif()
+
+  if(CONFIG_I2C)
+    list(APPEND SRCS esp_board_i2c.c)
+  endif()
+
+  if(CONFIG_ESPRESSIF_I2S)
+    list(APPEND SRCS esp_board_i2s.c)
+  endif()
+
+  if(CONFIG_ESPRESSIF_SPIFLASH)
+    list(APPEND SRCS esp_board_spiflash.c)
+  endif()
+
+  if(CONFIG_ESPRESSIF_TWAI)
+    list(APPEND SRCS esp_board_twai.c)
+  endif()
+
+  if(CONFIG_SENSORS_BMP180)
+    list(APPEND SRCS esp_board_bmp180.c)
+  endif()
+
+  if(CONFIG_ESP_MCPWM)
+    list(APPEND SRCS esp_board_mcpwm.c)
+  endif()
+
+  if(CONFIG_ESP_PCNT)
+    list(APPEND SRCS esp_board_pcnt.c)
+  endif()
+
+  if(CONFIG_MMCSD_SPI)
+    list(APPEND SRCS esp_board_mmcsd.c)
+  endif()
+
+  if(CONFIG_ETC_ROMFS)
+    nuttx_add_romfs(
+      NAME
+      etc
+      MOUNTPOINT
+      etc
+      RCSRCS
+      etc/init.d/rcS
+      etc/init.d/rc.sysinit
+      PATH
+      ${CMAKE_CURRENT_BINARY_DIR}/etc)
+
+    target_link_libraries(board PRIVATE romfs_etc)
+  endif()
+
+endif()
+
+target_sources(board PRIVATE ${SRCS})
diff --git a/boards/risc-v/esp32h2/esp32h2-devkit/CMakeLists.txt b/boards/risc-v/esp32h2/esp32h2-devkit/CMakeLists.txt
new file mode 100644
index 00000000000..76c47a8aadc
--- /dev/null
+++ b/boards/risc-v/esp32h2/esp32h2-devkit/CMakeLists.txt
@@ -0,0 +1,23 @@
+# ##############################################################################
+# boards/risc-v/esp32h2/esp32h2-devkit/CMakeLists.txt
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+add_subdirectory(src)
diff --git a/boards/risc-v/esp32h2/esp32h2-devkit/src/CMakeLists.txt b/boards/risc-v/esp32h2/esp32h2-devkit/src/CMakeLists.txt
new file mode 100644
index 00000000000..b2c9ed76ebd
--- /dev/null
+++ b/boards/risc-v/esp32h2/esp32h2-devkit/src/CMakeLists.txt
@@ -0,0 +1,62 @@
+# ##############################################################################
+# boards/risc-v/esp32h2/esp32h2-devkit/src/CMakeLists.txt
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+set(SRCS esp32h2_boot.c esp32h2_bringup.c)
+
+if(CONFIG_BOARDCTL)
+  list(APPEND SRCS esp32h2_appinit.c)
+
+  if(CONFIG_BOARDCTL_RESET)
+    list(APPEND SRCS esp32h2_reset.c)
+  endif()
+endif()
+
+if(CONFIG_DEV_GPIO)
+  list(APPEND SRCS esp32h2_gpio.c)
+endif()
+
+if(CONFIG_ARCH_BUTTONS)
+  list(APPEND SRCS esp32h2_buttons.c)
+endif()
+
+target_sources(board PRIVATE ${SRCS})
+
+# ##############################################################################
+# Linker scripts (H2: sections or legacy_sections like C6)
+# ##############################################################################
+
+string(REPLACE "\"" "" CHIP_SERIES "${CONFIG_ESPRESSIF_CHIP_SERIES}")
+
+set(BOARD_COMMON_DIR "${NUTTX_BOARD_DIR}/../common")
+
+set(LDSCRIPTS "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_aliases.ld"
+              "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_flat_memory.ld")
+
+if(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT OR CONFIG_ESPRESSIF_SIMPLE_BOOT)
+  list(APPEND LDSCRIPTS
+       "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_sections.ld")
+else()
+  list(APPEND LDSCRIPTS
+       "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_legacy_sections.ld")
+endif()
+
+set_property(GLOBAL PROPERTY LD_SCRIPT ${LDSCRIPTS})
diff --git a/boards/risc-v/esp32p4/common/CMakeLists.txt b/boards/risc-v/esp32p4/common/CMakeLists.txt
new file mode 100644
index 00000000000..d553d618ac4
--- /dev/null
+++ b/boards/risc-v/esp32p4/common/CMakeLists.txt
@@ -0,0 +1,24 @@
+# ##############################################################################
+# boards/risc-v/esp32p4/common/CMakeLists.txt
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+add_subdirectory(src)
+target_include_directories(board PRIVATE include)
diff --git a/boards/risc-v/esp32p4/common/src/CMakeLists.txt b/boards/risc-v/esp32p4/common/src/CMakeLists.txt
new file mode 100644
index 00000000000..a70fb04f17b
--- /dev/null
+++ b/boards/risc-v/esp32p4/common/src/CMakeLists.txt
@@ -0,0 +1,81 @@
+# ##############################################################################
+# boards/risc-v/esp32p4/common/src/CMakeLists.txt
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+set(SRCS)
+
+if(CONFIG_ARCH_BOARD_COMMON)
+
+  if(CONFIG_ESPRESSIF_ADC)
+    list(APPEND SRCS esp_board_adc.c)
+  endif()
+
+  if(CONFIG_ESPRESSIF_LEDC)
+    list(APPEND SRCS esp_board_ledc.c)
+  endif()
+
+  if(CONFIG_ESP_RMT)
+    list(APPEND SRCS esp_board_rmt.c)
+  endif()
+
+  if(CONFIG_ESPRESSIF_SPI)
+    list(APPEND SRCS esp_board_spi.c)
+  endif()
+
+  if(CONFIG_SPI_DRIVER)
+    list(APPEND SRCS esp_board_spidev.c)
+  endif()
+
+  if(CONFIG_ESPRESSIF_SPI AND CONFIG_SPI_SLAVE_DRIVER)
+    list(APPEND SRCS esp_board_spislavedev.c)
+  endif()
+
+  if(CONFIG_I2C_DRIVER)
+    list(APPEND SRCS esp_board_i2c.c)
+  endif()
+
+  if(CONFIG_ESPRESSIF_I2S)
+    list(APPEND SRCS esp_board_i2s.c)
+  endif()
+
+  if(CONFIG_ESPRESSIF_SPIFLASH)
+    list(APPEND SRCS esp_board_spiflash.c)
+  endif()
+
+  if(CONFIG_ESPRESSIF_TWAI)
+    list(APPEND SRCS esp_board_twai.c)
+  endif()
+
+  if(CONFIG_SENSORS_BMP180)
+    list(APPEND SRCS esp_board_bmp180.c)
+  endif()
+
+  if(CONFIG_ESP_MCPWM)
+    list(APPEND SRCS esp_board_mcpwm.c)
+  endif()
+
+  if(CONFIG_ESP_PCNT)
+    list(APPEND SRCS esp_board_pcnt.c)
+  endif()
+
+endif()
+
+target_sources(board PRIVATE ${SRCS})
diff --git a/boards/risc-v/esp32p4/esp32p4-function-ev-board/CMakeLists.txt b/boards/risc-v/esp32p4/esp32p4-function-ev-board/CMakeLists.txt
new file mode 100644
index 00000000000..ab1ab6c2f1d
--- /dev/null
+++ b/boards/risc-v/esp32p4/esp32p4-function-ev-board/CMakeLists.txt
@@ -0,0 +1,23 @@
+# ##############################################################################
+# boards/risc-v/esp32p4/esp32p4-function-ev-board/CMakeLists.txt
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+add_subdirectory(src)
diff --git a/boards/risc-v/esp32p4/esp32p4-function-ev-board/src/CMakeLists.txt b/boards/risc-v/esp32p4/esp32p4-function-ev-board/src/CMakeLists.txt
new file mode 100644
index 00000000000..35bfaa2ed47
--- /dev/null
+++ b/boards/risc-v/esp32p4/esp32p4-function-ev-board/src/CMakeLists.txt
@@ -0,0 +1,64 @@
+# ##############################################################################
+# boards/risc-v/esp32p4/esp32p4-function-ev-board/src/CMakeLists.txt
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+set(SRCS esp32p4_boot.c esp32p4_bringup.c)
+
+if(CONFIG_BOARDCTL)
+  list(APPEND SRCS esp32p4_appinit.c)
+
+  if(CONFIG_BOARDCTL_RESET)
+    list(APPEND SRCS esp32p4_reset.c)
+  endif()
+endif()
+
+if(CONFIG_DEV_GPIO)
+  list(APPEND SRCS esp32p4_gpio.c)
+endif()
+
+if(CONFIG_ARCH_BUTTONS)
+  list(APPEND SRCS esp32p4_buttons.c)
+endif()
+
+target_sources(board PRIVATE ${SRCS})
+
+# ##############################################################################
+# Linker scripts (P4: sections or sections.rev3 when REV_MIN_300)
+# ##############################################################################
+
+string(REPLACE "\"" "" CHIP_SERIES "${CONFIG_ESPRESSIF_CHIP_SERIES}")
+
+set(BOARD_COMMON_DIR "${NUTTX_BOARD_DIR}/../common")
+
+set(LDSCRIPTS "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_aliases.ld"
+              "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_flat_memory.ld")
+
+if(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT OR CONFIG_ESPRESSIF_SIMPLE_BOOT)
+  if(CONFIG_ESP32P4_REV_MIN_300)
+    list(APPEND LDSCRIPTS
+         "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_sections.rev3.ld")
+  else()
+    list(APPEND LDSCRIPTS
+         "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_sections.ld")
+  endif()
+endif()
+
+set_property(GLOBAL PROPERTY LD_SCRIPT ${LDSCRIPTS})
diff --git a/tools/espressif/espressif_esptool_common.cmake b/tools/espressif/espressif_esptool_common.cmake
new file mode 100644
index 00000000000..c16dcba335f
--- /dev/null
+++ b/tools/espressif/espressif_esptool_common.cmake
@@ -0,0 +1,111 @@
+# ##############################################################################
+# tools/espressif/espressif_esptool_common.cmake
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+# cmake-format: off
+# ##############################################################################
+# Shared Espressif + esptool layout and flash parameters for CMake scripts.
+#
+# Prerequisites (callers must do this first): - include(nuttx_kconfig.cmake) -
+# nuttx_export_kconfig(${BINARY_DIR}/.config)
+#
+# Defines set by including this file:
+#   CHIP_SERIES        - Chip string for esptool -c (from CONFIG_ESPRESSIF_CHIP_SERIES)
+#   BL_OFFSET          - Bootloader/app base offset for MCUboot & simple boot
+#   EFUSE_FLASH_OFFSET - Virtual eFuse blob offset in flash (from Config.mk EFUSE_FLASH_OFFSET)
+#   EFUSE_OFFSET       - Alias for EFUSE_FLASH_OFFSET (for mkimage.cmake compatibility)
+#   MCUBOOT_APP_OFFSET - NuttX signed image offset (primary or secondary OTA slot)
+#   FLASH_SIZE         - Flash size (e.g. 2MB, 4MB), for merge_bin/elf2image -fs
+#   FLASH_MODE         - Flash mode (dio, dout, qio, qout), for elf2image -fm only
+#   FLASH_FREQ         - Flash speed (e.g. 40m), for elf2image -ff/write_flash -ff
+#
+# ##############################################################################
+# cmake-format: on
+
+if(NOT DEFINED CHIP_SERIES)
+  if(NOT DEFINED CONFIG_ESPRESSIF_CHIP_SERIES)
+    message(
+      FATAL_ERROR
+        "espressif_esptool_common.cmake: CONFIG_ESPRESSIF_CHIP_SERIES not in .config"
+    )
+  endif()
+  string(REPLACE "\"" "" CHIP_SERIES "${CONFIG_ESPRESSIF_CHIP_SERIES}")
+endif()
+
+# Bootloader base (MCUboot placement; simple boot app start on ESP32-P4)
+if(CONFIG_ARCH_CHIP_ESP32P4)
+  set(BL_OFFSET 0x2000)
+else()
+  set(BL_OFFSET 0x0000)
+endif()
+
+# Virtual eFuse sector offset (tools/espressif/Config.mk EFUSE_FLASH_OFFSET)
+if(CONFIG_ESPRESSIF_EFUSE_VIRTUAL_KEEP_IN_FLASH
+   AND DEFINED CONFIG_ESPRESSIF_EFUSE_VIRTUAL_KEEP_IN_FLASH_OFFSET)
+  set(EFUSE_FLASH_OFFSET ${CONFIG_ESPRESSIF_EFUSE_VIRTUAL_KEEP_IN_FLASH_OFFSET})
+else()
+  set(EFUSE_FLASH_OFFSET 0x10000)
+endif()
+set(EFUSE_OFFSET ${EFUSE_FLASH_OFFSET})
+
+# MCUboot application slot (Config.mk APP_OFFSET)
+if(CONFIG_ESPRESSIF_ESPTOOL_TARGET_PRIMARY)
+  set(MCUBOOT_APP_OFFSET ${CONFIG_ESPRESSIF_OTA_PRIMARY_SLOT_OFFSET})
+elseif(CONFIG_ESPRESSIF_ESPTOOL_TARGET_SECONDARY)
+  set(MCUBOOT_APP_OFFSET ${CONFIG_ESPRESSIF_OTA_SECONDARY_SLOT_OFFSET})
+else()
+  message(FATAL_ERROR "Missing MCUBoot slot target: PRIMARY or SECONDARY")
+endif()
+
+# Flash capacity (merge_bin --fill-flash-size, elf2image -fs)
+if(CONFIG_ESPRESSIF_FLASH_2M)
+  set(FLASH_SIZE "2MB")
+elseif(CONFIG_ESPRESSIF_FLASH_4M)
+  set(FLASH_SIZE "4MB")
+elseif(CONFIG_ESPRESSIF_FLASH_8M)
+  set(FLASH_SIZE "8MB")
+elseif(CONFIG_ESPRESSIF_FLASH_16M)
+  set(FLASH_SIZE "16MB")
+elseif(CONFIG_ESPRESSIF_FLASH_32M)
+  set(FLASH_SIZE "32MB")
+else()
+  set(FLASH_SIZE "4MB")
+endif()
+
+# SPI mode for elf2image (Config.mk ELF2IMAGE -fm; write_flash uses -fm dio in
+# Config.mk)
+if(CONFIG_ESPRESSIF_FLASH_MODE_DIO)
+  set(FLASH_MODE "dio")
+elseif(CONFIG_ESPRESSIF_FLASH_MODE_DOUT)
+  set(FLASH_MODE "dout")
+elseif(CONFIG_ESPRESSIF_FLASH_MODE_QIO)
+  set(FLASH_MODE "qio")
+elseif(CONFIG_ESPRESSIF_FLASH_MODE_QOUT)
+  set(FLASH_MODE "qout")
+else()
+  set(FLASH_MODE "dio")
+endif()
+
+if(DEFINED CONFIG_ESPRESSIF_FLASH_FREQ)
+  string(REPLACE "\"" "" FLASH_FREQ "${CONFIG_ESPRESSIF_FLASH_FREQ}")
+else()
+  set(FLASH_FREQ "40m")
+endif()
diff --git a/tools/espressif/espressif_mkimage.cmake b/tools/espressif/espressif_mkimage.cmake
new file mode 100644
index 00000000000..66797c48363
--- /dev/null
+++ b/tools/espressif/espressif_mkimage.cmake
@@ -0,0 +1,251 @@
+# ##############################################################################
+# tools/espressif/espressif_mkimage.cmake
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more contributor
+# license agreements.  See the NOTICE file distributed with this work for
+# additional information regarding copyright ownership.  The ASF licenses this
+# file to you under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License.  You may obtain a copy of
+# the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations under
+# the License.
+#
+# ##############################################################################
+
+# This script is executed as a post-build step to generate ESP-compatible
+# binaries from the NuttX ELF file.
+#
+# Required variables (passed via -D): BINARY_DIR       - CMake binary directory
+# (contains .config and nuttx ELF) SOURCE_DIR       - CMake source directory
+# (NuttX root)
+#
+# All CONFIG_* variables are automatically loaded from .config file.
+
+# ##############################################################################
+# Validate required variables
+# ##############################################################################
+
+if(NOT DEFINED BINARY_DIR)
+  message(FATAL_ERROR "BINARY_DIR not defined")
+endif()
+
+if(NOT DEFINED SOURCE_DIR)
+  message(FATAL_ERROR "SOURCE_DIR not defined")
+endif()
+
+# ##############################################################################
+# Load Kconfig values from .config file
+# ##############################################################################
+
+# Include NuttX kconfig module
+include(${SOURCE_DIR}/cmake/nuttx_kconfig.cmake)
+
+# Load all CONFIG_* variables from .config
+set(DOTCONFIG "${BINARY_DIR}/.config")
+if(NOT EXISTS ${DOTCONFIG})
+  message(FATAL_ERROR ".config not found at ${DOTCONFIG}")
+endif()
+
+nuttx_export_kconfig(${DOTCONFIG})
+
+include(${SOURCE_DIR}/tools/espressif/espressif_esptool_common.cmake)
+
+# ##############################################################################
+# Find required tools for the post build process
+# ##############################################################################
+
+find_program(ESPTOOL esptool esptool.py)
+find_program(IMGTOOL imgtool)
+find_program(PYTHON3 python3)
+
+# ##############################################################################
+# Check esptool version. Older versions will fail to build a proper image.
+# ##############################################################################
+
+if(ESPTOOL
+   AND PYTHON3
+   AND EXISTS "${SOURCE_DIR}/tools/espressif/check_esptool.py")
+  execute_process(
+    COMMAND ${PYTHON3} ${SOURCE_DIR}/tools/espressif/check_esptool.py -v 4.8.0
+    RESULT_VARIABLE ESPTOOL_CHECK_RESULT
+    OUTPUT_QUIET ERROR_QUIET)
+  if(NOT ESPTOOL_CHECK_RESULT EQUAL 0)
+    message(WARNING "esptool.py version 4.8.0 or higher recommended")
+  endif()
+endif()
+
+# ##############################################################################
+# Generate binary
+# ##############################################################################
+
+if(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT)
+  # MCUboot: Use imgtool to sign the image
+  message(STATUS "Generate NuttX signed image")
+
+  # Check if nuttx.hex exists
+  if(NOT EXISTS "${BINARY_DIR}/nuttx.hex")
+    message(FATAL_ERROR "nuttx.hex not found in ${BINARY_DIR}")
+  endif()
+
+  # Get imgtool arguments from config
+  if(CONFIG_ESPRESSIF_SECURE_FLASH_ENC_ENABLED)
+    set(IMGTOOL_ALIGN_ARGS --align 32 --max-align 32)
+  else()
+    set(IMGTOOL_ALIGN_ARGS --align 4)
+  endif()
+
+  if(DEFINED CONFIG_ESPRESSIF_MCUBOOT_SIGN_IMAGE_VERSION)
+    set(MCUBOOT_VERSION "${CONFIG_ESPRESSIF_MCUBOOT_SIGN_IMAGE_VERSION}")
+  else()
+    set(MCUBOOT_VERSION "0.0.0")
+  endif()
+
+  if(DEFINED CONFIG_ESPRESSIF_APP_MCUBOOT_HEADER_SIZE)
+    set(HEADER_SIZE ${CONFIG_ESPRESSIF_APP_MCUBOOT_HEADER_SIZE})
+  else()
+    set(HEADER_SIZE 0x20)
+  endif()
+
+  if(DEFINED CONFIG_ESPRESSIF_OTA_SLOT_SIZE)
+    set(SLOT_SIZE ${CONFIG_ESPRESSIF_OTA_SLOT_SIZE})
+  else()
+    set(SLOT_SIZE 0x100000)
+  endif()
+
+  if(CONFIG_ESPRESSIF_ESPTOOL_TARGET_PRIMARY)
+    set(VERIFIED --confirm)
+  else()
+    set(VERIFIED "")
+  endif()
+
+  set(IMGTOOL_SIGN_ARGS
+      --pad
+      ${VERIFIED}
+      ${IMGTOOL_ALIGN_ARGS}
+      -v
+      ${MCUBOOT_VERSION}
+      -s
+      auto
+      -H
+      ${HEADER_SIZE}
+      --pad-header
+      -S
+      ${SLOT_SIZE})
+
+  execute_process(
+    COMMAND ${IMGTOOL} sign ${IMGTOOL_SIGN_ARGS} ${BINARY_DIR}/nuttx.hex
+            ${BINARY_DIR}/nuttx.bin
+    RESULT_VARIABLE IMGTOOL_RESULT
+    WORKING_DIRECTORY ${BINARY_DIR})
+
+  if(NOT IMGTOOL_RESULT EQUAL 0)
+    message(FATAL_ERROR "imgtool sign failed")
+  endif()
+
+  message(STATUS "Generated: nuttx.bin (MCUboot compatible)")
+
+else()
+  # Simple boot or legacy: Use esptool elf2image
+  message(STATUS "Generate NuttX image (esptool elf2image)")
+
+  # Check if nuttx ELF exists
+  if(NOT EXISTS "${BINARY_DIR}/nuttx")
+    message(FATAL_ERROR "nuttx ELF not found in ${BINARY_DIR}")
+  endif()
+
+  # Build elf2image options
+  set(ELF2IMAGE_OPTS -fs ${FLASH_SIZE} -fm ${FLASH_MODE} -ff ${FLASH_FREQ})
+
+  if(CONFIG_ESPRESSIF_SIMPLE_BOOT)
+    list(APPEND ELF2IMAGE_OPTS --ram-only-header)
+  endif()
+
+  execute_process(
+    COMMAND ${ESPTOOL} -c ${CHIP_SERIES} elf2image ${ELF2IMAGE_OPTS} -o
+            ${BINARY_DIR}/nuttx.bin ${BINARY_DIR}/nuttx
+    RESULT_VARIABLE ESPTOOL_RESULT
+    WORKING_DIRECTORY ${BINARY_DIR})
+
+  if(NOT ESPTOOL_RESULT EQUAL 0)
+    message(FATAL_ERROR "esptool.py elf2image failed")
+  endif()
+
+  message(STATUS "Generated: nuttx.bin")
+endif()
+
+# ##############################################################################
+# Update manifest
+# ##############################################################################
+
+file(APPEND "${BINARY_DIR}/nuttx.manifest" "nuttx.bin\n")
+
+# ##############################################################################
+# Merge binaries (optional)
+# ##############################################################################
+
+if(CONFIG_ESPRESSIF_MERGE_BINS)
+  message(STATUS "MERGEBIN: Creating merged flash image ${SOURCE_DIR}")
+
+  if(NOT ESPTOOL)
+    message(FATAL_ERROR "esptool.py not found - cannot merge binaries")
+  endif()
+
+  # Build the list of binaries to merge Format: offset1 file1 offset2 file2 ...
+  set(ESPTOOL_BINS "")
+
+  if(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT)
+    # MCUboot configuration
+
+    if(EXISTS "${SOURCE_DIR}/mcuboot-${CHIP_SERIES}.bin")
+      message(
+        STATUS
+          "Merge bin: ${BL_OFFSET} -> ${SOURCE_DIR}/mcuboot-${CHIP_SERIES}.bin")
+      list(APPEND ESPTOOL_BINS ${BL_OFFSET}
+           "${SOURCE_DIR}/mcuboot-${CHIP_SERIES}.bin")
+    else()
+      message(
+        FATAL_ERROR "mcuboot-${CHIP_SERIES}.bin not found in ${SOURCE_DIR}")
+    endif()
+
+    # Create empty vefuse.bin if it doesn't exist
+    if(NOT EXISTS "${BINARY_DIR}/vefuse.bin")
+      file(WRITE "${BINARY_DIR}/vefuse.bin" "")
+    endif()
+    list(APPEND ESPTOOL_BINS ${EFUSE_OFFSET} "${BINARY_DIR}/vefuse.bin")
+    message(STATUS "Merge bin: ${EFUSE_OFFSET} -> ${BINARY_DIR}/vefuse.bin")
+
+    list(APPEND ESPTOOL_BINS ${MCUBOOT_APP_OFFSET} "${BINARY_DIR}/nuttx.bin")
+    message(
+      STATUS "Merge bin: ${MCUBOOT_APP_OFFSET} -> ${BINARY_DIR}/nuttx.bin")
+
+  elseif(CONFIG_ESPRESSIF_SIMPLE_BOOT)
+    # Simple boot: same base offset as BL_OFFSET (0x2000 on ESP32-P4, else 0x0)
+    list(APPEND ESPTOOL_BINS ${BL_OFFSET} "${BINARY_DIR}/nuttx.bin")
+
+  else()
+    # Legacy boot: application at offset 0
+    list(APPEND ESPTOOL_BINS 0x0000 "${BINARY_DIR}/nuttx.bin")
+  endif()
+
+  # Execute merge_bin
+  execute_process(
+    COMMAND ${ESPTOOL} -c ${CHIP_SERIES} merge-bin --pad-to-size ${FLASH_SIZE}
+            --output ${BINARY_DIR}/nuttx.merged.bin ${ESPTOOL_BINS}
+    RESULT_VARIABLE MERGEBIN_RESULT
+    WORKING_DIRECTORY ${BINARY_DIR})
+
+  if(NOT MERGEBIN_RESULT EQUAL 0)
+    message(FATAL_ERROR "esptool merge-bin failed")
+  endif()
+
+  message(STATUS "Generated: nuttx.merged.bin")
+  file(APPEND "${BINARY_DIR}/nuttx.manifest" "nuttx.merged.bin\n")
+endif()