Fix some typos

ChangeLog

@@ -14252,7 +14252,7 @@
 	* arch/arm/src/xmc4:  Initial, partial support for Infineon XMC4xxx
 	  (2017-03-14).
 	* photon:  Porting wlan device.  From Simon Piriou (2017-03-14).
-	* lp_worker:  Guard from pend_reprios overlow.  From David Sidrane
+	* lp_worker:  Guard from pend_reprios overflow.  From David Sidrane
 	  (2017-03-15).
 	* wireless/ieee802154: Renamed file ieee802154_device to
 	  radio802154_device.  From Anthony Merlino (2017-03-15).
@@ -16621,7 +16621,7 @@
 	  another TCP-specific logic in inet/ that should be moved sometime,
 	  but those are more entangled (2017-08-29).
 	* Networking:  TCP disconnection callbacks are not retained in a list.
-	  This will support mutiple callbacks per lower-level TCP connection
+	  This will support multiple callbacks per lower-level TCP connection
 	  structure.  That is necessary for the cae where a socket is dup'ed
 	  and shares the same lower-level connection structure.  NOTE:  There
 	  still needs to be a call to tcp_start_monitor() when the socket is
@@ -23637,7 +23637,7 @@
 	* arch/arm/src/armv7-a:  Guard some assembly files if configuration not
 	  selected.  From zhangyuan7 (2019-03-19).
 	* arch/arm/src/armv7-a/arm_head.S:  Add weak attribute to
-	  arm_data_initialize so platform could provide the new implemenation as
+	  arm_data_initialize so platform could provide the new implementation as
 	  needed.  From zhangyuan7 (2019-03-19).
 	* arch/arm/src/armv7-a:  Fix assemble error when including gic.h  From
 	  Xiang Xiao (2019-03-19).
@@ -23714,7 +23714,7 @@
 	  apps/examples/pwlines.  From Gregory Nutt (2019-03-20).
 	* configs/stm32f769i-disco/netnsh/defconfig:  Remove
 	  CONFIG_STM32F7_QUADSPI=y from the configuration.  This was apparently
-	  set before the implementation was added.  Now that the implemenation
+	  set before the implementation was added.  Now that the implementation
 	  was added, the configuration will not build because it requires that
 	  QSPI GPIO pin definitions be provided in the board.h header file.
 	  From Gregory Nutt (2019-03-20).
@@ -25209,7 +25209,7 @@
 	* fs/dirent/fs_opendir.c:  Fix typo and style.  opendir() did set errno
 	  to a negative value in one error case.  Fixed some coding style issues
 	  found by nxstyle.  From Michael Jung (2019-07-31).
-	* libs/libc/dirent/:  Added alphasort() implemenation, scandir()
+	* libs/libc/dirent/:  Added alphasort() implementation, scandir()
 	  implementation and DT_* definitions to include/dirent.h.  Apparently
 	  those definitions are not required by POSIX, but are part of 4.3BSD and
 	  available in glibc as well.  From Michael Jung (2019-07-31).

ReleaseNotes

@@ -2540,7 +2540,7 @@ Bugfixes include:
     * STM32.  GPIO initialize logic (submitted by Mike Smith).  Fix the
       debug logic that dumps the GPIO configuration.
 
-    * LPC17xxx.  Correct an integeter overlow in GPIO interrupt setup
+    * LPC17xxx.  Correct an integer overflow in GPIO interrupt setup
       (prevented pins > 15 from being used as interrupt sources).  Correct
       a value used in GPIO interrupt number range test.
 
@@ -14028,7 +14028,7 @@ detailed bugfix information):
         pend_reprios.  The second case rtcb->sched_priority <=
         htcb->sched_priority did not check if there is sufficient space in
         the pend_reprios array.  From David Sidrane.
-      - lp_worker:  Guard from pend_reprios overlow.  From David Sidrane.
+      - lp_worker:  Guard from pend_reprios overflow.  From David Sidrane.
       - Priority inheritance: Fixes improper restoration of base_priority in
         the case of CONFIG_SEM_PREALLOCHOLDERS=0.  The call to
         sem_restorebaseprio_task context switches in the
@@ -15168,7 +15168,7 @@ detailed bugfix information):
       - TCP Networking:  Correct some issues that prevent TCP from working
         correctly when both IPv4 and IPv6 are enabled.
       - TCP Networking:  TCP disconnection callbacks are not retained in a
-        list.  This will support mutiple callbacks per lower-level TCP
+        list.  This will support multiple callbacks per lower-level TCP
         connection structure.  That is necessary for the cae where a socket is
         dup'ed and shares the same lower-level connection structure.  NOTE:
         There still needs to be a call to tcp_start_monitor() when the socket
@@ -21993,7 +21993,7 @@ Additional new features and extended functionality:
       - ARMv7-A:  Support thumb mode and fix interworking issue. From
         zhangyuan7.
       - ARMv7-A:  Add weak attribute to arm_data_initialize so platform
-        could provide the new implemenation as needed.  From zhangyuan7.
+        could provide the new implementation as needed.  From zhangyuan7.
       - ARMv7-A:  Add SCR bit definitions.  From Xiang Xiao.
       - ARMv7-A:  Add mmu_l1_map_regions() to remove the code duplication.
         From Xiang Xiao.
@@ -22714,7 +22714,7 @@ detailed bugfix information):
         defined.  From GregoryN.
       - STM32F769I-DISCO:  Remove CONFIG_STM32F7_QUADSPI=y from the
         configuration.  This was apparently set before the implementation
-        was added.  Now that the implemenation was added, the configuration
+        was added.  Now that the implementation was added, the configuration
         will not build because it requires that QSPI GPIO pin definitions
         be provided in the board.h header file.  From Gregory Nutt.
 
@@ -24979,7 +24979,7 @@ Additional new features and extended functionality:
         with applications.  This should permit built-in application in the
         PROTECTED build where binfmt/libbuiltin was not available in user
         space.  From Gregory Nutt.
-      - libs/libc/dirent/:  Added alphasort() implemenation, scandir()
+      - libs/libc/dirent/:  Added alphasort() implementation, scandir()
         implementation and DT_* definitions to include/dirent.h.  Apparently
         those definitions are not required by POSIX, but are part of
         4.3BSD and available in glibc as well.  From Michael Jung.

TODO

@@ -286,7 +286,7 @@ o Task/Scheduler (sched/)
                  open() used within the OS.  There are places under libs/ and
                  boards/ that have not been converted.  I also note cases
                  where fopen() is called under libs/libc/netdb/.
-               2019-09-11:  built_isavail() no longer sets the errno varaible.
+               2019-09-11:  built_isavail() no longer sets the errno variable.
 
   Status:      Open
   Priority:    Low.  Things are working OK the way they are.  But the design

arch/README.txt

@@ -268,7 +268,7 @@ arch/xtensa
     LX6 DPU support:
       arch/xtensa/include/lx6 and arch/xtensa/xtensa/lx6
 
-    Expressif ESP32 implemenation of the LX6 DPU:
+    Expressif ESP32 implementation of the LX6 DPU:
       arch/xtensa/include/esp32 and arch/xtensa/xtensa/esp32
 
 arch/z16 - ZiLOG 16-bit processors

arch/arm/include/cxd56xx/gnss.h

@@ -72,8 +72,8 @@ extern "C" {
 /* Select the satellite systems.
  * This command is used to select the satellite systems to be used for
  * positioning.
- * The satellite system is defined as a bit, and you can select mutiple
+ * The satellite system is defined as a bit, and you can select multiple
- * sattelites using OR value.
+ * satellites using OR value.
  * Do not specify zero, please select at least one system.
  * This command must be issued in idle mode.
  *

arch/arm/include/spinlock.h

@@ -105,8 +105,8 @@
  * locations in the form of the Load-Exclusive (LDREX) and Store-Exclusive
  * (STREX) instructions in ARM and Thumb instruction sets.  ARMv6K extended
  * this to included byte, halfword, and doubleword variants of LDREX and
- * STREX.  ARMv7-M supports byte and halfwor, but not the doudleword varient
+ * STREX.  ARMv7-M supports byte and halfword, but not the doubleword varient
- * (ARMv6-M does not support exlusive access)
+ * (ARMv6-M does not support exclusive access)
  *
  * ARM architectures prior to ARMv6 supported SWP and SWPB instructions that
  * atomically swap a 32-bit word for byte value between a register and a

arch/arm/src/cxd56xx/cxd56_i2c.h

@@ -70,7 +70,7 @@ extern "C"
  *   Port number (for hardware that has multiple I2C interfaces)
  *
  * Returned Value:
- *   Valid I2C device structure reference on succcess; a NULL on failure
+ *   Valid I2C device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/cxd56xx/cxd56_spi.c

@@ -1092,7 +1092,7 @@ static int spi5_colockchange(uint8_t id)
  *   port - Port number
  *
  * Returned Value:
- *   Valid SPI device structure reference on succcess; a NULL on failure
+ *   Valid SPI device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/efm32/efm32_adc.c

@@ -1262,7 +1262,7 @@ static int adc_interrupt(int irq, FAR void *context, FAR struct adc_dev_s *dev)
  *   nchannels - Number of channels
  *
  * Returned Value:
- *   Valid ADC device structure reference on succcess; a NULL on failure
+ *   Valid ADC device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/efm32/efm32_adc.h

@@ -572,7 +572,7 @@ extern "C" {
  *   nchannels - Number of channels
  *
  * Returned Value:
- *   Valid can device structure reference on succcess; a NULL on failure
+ *   Valid ADC device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/efm32/efm32_i2c.h

@@ -60,7 +60,7 @@
  *   Port number (for hardware that has multiple I2C interfaces)
  *
  * Returned Value:
- *   Valid I2C device structure reference on succcess; a NULL on failure
+ *   Valid I2C device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/efm32/efm32_usbhost.c

@@ -5222,7 +5222,7 @@ static inline void efm32_sw_initialize(FAR struct efm32_usbhost_s *priv)
  * Name: efm32_hw_initialize
  *
  * Description:
- *   One-time setup of the host controller harware for normal operations.
+ *   One-time setup of the host controller hardware for normal operations.
  *
  * Input Parameters:
  *   priv -- USB host driver private data structure.

arch/arm/src/imx1/imx_cspi.h

@@ -190,14 +190,14 @@ struct spi_dev_s; /* Forward reference */
  *
  *   One GPIO, SS (PB2 on the eZ8F091) is reserved as a chip select.  However,
  *   If multiple devices on on the bus, then multiple chip selects will be
- *   required.  Theregore, all GPIO chip management is deferred to board-
+ *   required.  Therefore, all GPIO chip management is deferred to board-
  *   specific logic.
  *
  * Input Parameters:
- *   Port number (for hardware that has mutiple SPI interfaces)
+ *   Port number (for hardware that has multiple SPI interfaces)
  *
  * Returned Value:
- *   Valid SPI device structre reference on succcess; a NULL on failure
+ *   Valid SPI device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/imx1/imx_spi.c

@@ -1021,14 +1021,14 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
  *
  *   One GPIO, SS (PB2 on the eZ8F091) is reserved as a chip select.  However,
  *   If multiple devices on on the bus, then multiple chip selects will be
- *   required.  Theregore, all GPIO chip management is deferred to board-
+ *   required.  Therefore, all GPIO chip management is deferred to board-
  *   specific logic.
  *
  * Input Parameters:
- *   Port number (for hardware that has mutiple SPI interfaces)
+ *   Port number (for hardware that has multiple SPI interfaces)
  *
  * Returned Value:
- *   Valid SPI device structre reference on succcess; a NULL on failure
+ *   Valid SPI device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/imx6/imx_ecspi.c

@@ -1210,10 +1210,10 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
  *   specific logic.
  *
  * Input Parameters:
- *   Port number (for hardware that has mutiple SPI interfaces)
+ *   Port number (for hardware that has multiple SPI interfaces)
  *
  * Returned Value:
- *   Valid SPI device structre reference on succcess; a NULL on failure
+ *   Valid SPI device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/imx6/imx_ecspi.h

@@ -82,21 +82,21 @@ struct spi_dev_s; /* Forward reference */
  *
  *   One GPIO, SS (PB2 on the eZ8F091) is reserved as a chip select.  However,
  *   If multiple devices on on the bus, then multiple chip selects will be
- *   required.  Theregore, all GPIO chip management is deferred to board-
+ *   required.  Therefore, all GPIO chip management is deferred to board-
  *   specific logic.
  *
  * Input Parameters:
- *   Port number (for hardware that has mutiple SPI interfaces)
+ *   Port number (for hardware that has multiple SPI interfaces)
  *
  * Returned Value:
- *   Valid SPI device structre reference on succcess; a NULL on failure
+ *   Valid SPI device structure reference on success; a NULL on failure
  *
  ************************************************************************************/
 
 FAR struct spi_dev_s *imx_spibus_initialize(int port);
 
 /************************************************************************************
- * The external functions, imx_spiselect, imx_spistatus, and imx_cmddaa must be
+ * The external functions, imx_spiselect, imx_spistatus, and imx_cmddata must be
  * provided by board-specific logic.  These are implementations of the select and
  * status methods of the SPI interface defined by struct spi_ops_s (see
  * include/nuttx/spi/spi.h).  All other methods (including imx_spibus_initialize()) are

arch/arm/src/imxrt/imxrt_lpspi.c

@@ -1553,7 +1553,7 @@ static void imxrt_lpspi_bus_initialize(struct imxrt_lpspidev_s *priv)
  *   Initialize the selected SPI bus
  *
  * Input Parameters:
- *   Port number (for hardware that has mutiple SPI interfaces)
+ *   Port number (for hardware that has multiple SPI interfaces)
  *
  * Returned Value:
  *   Valid SPI device structure reference on success; a NULL on failure

arch/arm/src/imxrt/imxrt_lpspi.h

@@ -73,10 +73,10 @@ struct spi_dev_s; /* Forward reference */
  *   Initialize the selected SPI bus
  *
  * Input Parameters:
- *   bus number (for hardware that has mutiple SPI interfaces)
+ *   bus number (for hardware that has multiple SPI interfaces)
  *
  * Returned Value:
- *   Valid SPI device structure reference on succcess; a NULL on failure
+ *   Valid SPI device structure reference on success; a NULL on failure
  *
  ************************************************************************************/
 

arch/arm/src/kinetis/hardware/kinetis_k20memorymap.h

@@ -94,7 +94,7 @@
 #define KINETIS_DMADESC_BASE   0x40009000  /* DMA controller transfer control descriptors */
 #define KINETIS_FMC_BASE       0x4001f000  /* Flash memory controller */
 #define KINETIS_FTFL_BASE      0x40020000  /* Flash memory */
-#define KINETIS_DMAMUX0_BASE   0x40021000  /* DMA channel mutiplexer 0 */
+#define KINETIS_DMAMUX0_BASE   0x40021000  /* DMA channel multiplexer 0 */
 #define KINETIS_CAN0_BASE      0x40024000  /* FlexCAN 0 */
 #define KINETIS_SPI0_BASE      0x4002c000  /* SPI 0 */
 #define KINETIS_SPI1_BASE      0x4002d000  /* SPI 1 */

arch/arm/src/kinetis/hardware/kinetis_k28memorymap.h

@@ -109,7 +109,7 @@
 #  define KINETIS_SDRAMC_BASE        0x4000f000 /* SDRAMC */
 #  define KINETIS_FMC_BASE           0x4001f000 /* Flash memory controller */
 #  define KINETIS_FTFE_BASE          0x40020000 /* Flash memory */
-#  define KINETIS_DMAMUX0_BASE       0x40021000 /* DMA channel mutiplexer 0 */
+#  define KINETIS_DMAMUX0_BASE       0x40021000 /* DMA channel multiplexer 0 */
 #  define KINETIS_SPI0_BASE          0x4002c000 /* DSPI 0 */
 #  define KINETIS_SPI1_BASE          0x4002d000 /* DSPI 1 */
 #  define KINETIS_SAI0_BASE          0x4002f000 /* SAI 0 (12S/SSI) */

arch/arm/src/kinetis/hardware/kinetis_k40memorymap.h

@@ -101,7 +101,7 @@
 #define KINETIS_MPU_BASE       0x4000d000  /* MPU */
 #define KINETIS_FMC_BASE       0x4001f000  /* Flash memory controller */
 #define KINETIS_FTFL_BASE      0x40020000  /* Flash memory */
-#define KINETIS_DMAMUX0_BASE   0x40021000  /* DMA channel mutiplexer 0 */
+#define KINETIS_DMAMUX0_BASE   0x40021000  /* DMA channel multiplexer 0 */
 #define KINETIS_CAN0_BASE      0x40024000  /* FlexCAN 0 */
 #define KINETIS_SPI0_BASE      0x4002c000  /* SPI 0 */
 #define KINETIS_SPI1_BASE      0x4002d000  /* SPI 1 */

arch/arm/src/kinetis/hardware/kinetis_k60memorymap.h

@@ -96,7 +96,7 @@
 #define KINETIS_MPU_BASE       0x4000d000  /* MPU */
 #define KINETIS_FMC_BASE       0x4001f000  /* Flash memory controller */
 #define KINETIS_FTFL_BASE      0x40020000  /* Flash memory */
-#define KINETIS_DMAMUX0_BASE   0x40021000  /* DMA channel mutiplexer 0 */
+#define KINETIS_DMAMUX0_BASE   0x40021000  /* DMA channel multiplexer 0 */
 #define KINETIS_CAN0_BASE      0x40024000  /* FlexCAN 0 */
 #define KINETIS_SPI0_BASE      0x4002c000  /* DSPI 0 */
 #define KINETIS_SPI1_BASE      0x4002d000  /* DSPI 1 */

arch/arm/src/kinetis/hardware/kinetis_k64memorymap.h

@@ -101,7 +101,7 @@
 # define KINETIS_MPU_BASE       0x4000d000 /* MPU */
 # define KINETIS_FMC_BASE       0x4001f000 /* Flash memory controller */
 # define KINETIS_FTFE_BASE      0x40020000 /* Flash memory */
-# define KINETIS_DMAMUX0_BASE   0x40021000 /* DMA channel mutiplexer 0 */
+# define KINETIS_DMAMUX0_BASE   0x40021000 /* DMA channel multiplexer 0 */
 # define KINETIS_CAN0_BASE      0x40024000 /* FlexCAN 0 */
 # define KINETIS_SPI0_BASE      0x4002c000 /* DSPI 0 */
 # define KINETIS_SPI1_BASE      0x4002d000 /* DSPI 1 */

arch/arm/src/kinetis/hardware/kinetis_k66memorymap.h

@@ -120,7 +120,7 @@
 # define KINETIS_SDRAMC_BASE        0x4000f000 /* SDRAMC */
 # define KINETIS_FMC_BASE           0x4001f000 /* Flash memory controller */
 # define KINETIS_FTFE_BASE          0x40020000 /* Flash memory */
-# define KINETIS_DMAMUX0_BASE       0x40021000 /* DMA channel mutiplexer 0 */
+# define KINETIS_DMAMUX0_BASE       0x40021000 /* DMA channel multiplexer 0 */
 # define KINETIS_CAN0_BASE          0x40024000 /* FlexCAN 0 */
 # define KINETIS_RNGA_BASE          0x40029000 /* Random Number Generator (RNGA) */
 # define KINETIS_SPI0_BASE          0x4002c000 /* DSPI 0 */

arch/arm/src/kinetis/kinetis_i2c.h

@@ -61,7 +61,7 @@
  *   Port number (for hardware that has multiple I2C interfaces)
  *
  * Returned Value:
- *   Valid I2C device structure reference on succcess; a NULL on failure
+ *   Valid I2C device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/kinetis/kinetis_spi.c

@@ -1110,10 +1110,10 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *rxbuffer, size_t
  *   Initialize the selected SPI port.
  *
  * Input Parameters:
- *   Port number (for hardware that has mutiple SPI interfaces)
+ *   Port number (for hardware that has multiple SPI interfaces)
  *
  * Returned Value:
- *   Valid SPI device structure reference on succcess; a NULL on failure
+ *   Valid SPI device structure reference on success; a NULL on failure
  *
  ************************************************************************************/
 

arch/arm/src/kinetis/kinetis_spi.h

@@ -76,10 +76,10 @@ struct spi_dev_s;
  *   Initialize the selected SPI bus
  *
  * Input Parameters:
- *   bus number (for hardware that has mutiple SPI interfaces)
+ *   bus number (for hardware that has multiple SPI interfaces)
  *
  * Returned Value:
- *   Valid SPI device structure reference on succcess; a NULL on failure
+ *   Valid SPI device structure reference on success; a NULL on failure
  *
  ************************************************************************************/
 

arch/arm/src/kl/hardware/kl_memorymap.h

@@ -79,7 +79,7 @@
 # define KL_DMAC_BASE      0x40008000 /* DMA controller */
 # define KL_AIPSGPIO_BASE  0x4000f000 /* GPIO controller (aliased to 0x400ff000) */
 # define KL_FTFL_BASE      0x40020000 /* Flash memory */
-# define KL_DMAMUX0_BASE   0x40021000 /* DMA channel mutiplexer 0 */
+# define KL_DMAMUX0_BASE   0x40021000 /* DMA channel multiplexer 0 */
 # define KL_PIT_BASE       0x40037000 /* Periodic interrupt timers (PIT) */
 # define KL_TPM0_BASE      0x40038000 /* Timer/PWM (TPM) 0 */
 # define KL_TPM1_BASE      0x40039000 /* Timer/PWM (TPM) 1 */

arch/arm/src/kl/kl_spi.c

@@ -613,10 +613,10 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *rxbuffer, size_t
  *   Initialize the selected SPI port.
  *
  * Input Parameters:
- *   Port number (for hardware that has mutiple SPI interfaces)
+ *   Port number (for hardware that has multiple SPI interfaces)
  *
  * Returned Value:
- *   Valid SPI device structure reference on succcess; a NULL on failure
+ *   Valid SPI device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/kl/kl_spi.h

@@ -72,10 +72,10 @@ struct spi_dev_s;  /* Forward reference */
  *   Initialize the selected SPI port.
  *
  * Input Parameters:
- *   Port number (for hardware that has mutiple SPI interfaces)
+ *   Port number (for hardware that has multiple SPI interfaces)
  *
  * Returned Value:
- *   Valid SPI device structure reference on succcess; a NULL on failure
+ *   Valid SPI device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/lc823450/lc823450_adc.c

@@ -530,7 +530,7 @@ static int lc823450_adc_ioctl(FAR struct adc_dev_s *dev, int cmd,
  * Input Parameters:
  *
  * Returned Value:
- *   Valid ADC device structure reference on succcess; a NULL on failure
+ *   Valid ADC device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/lc823450/lc823450_spi.c

@@ -513,10 +513,10 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
  *   Initialize the selected SPI port.
  *
  * Input Parameters:
- *   Port number (for hardware that has mutiple SPI interfaces)
+ *   Port number (for hardware that has multiple SPI interfaces)
  *
  * Returned Value:
- *   Valid SPI device structure reference on succcess; a NULL on failure
+ *   Valid SPI device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/lpc17xx_40xx/lpc17_40_adc.h

@@ -104,10 +104,10 @@ EXTERN uint8_t g_adc_chanlist[CONFIG_LPC17_40_ADC_NCHANNELS];
  * Name: lpc17_40_adcinitialize
  *
  * Description:
- *   Initialize the adc
+ *   Initialize the ADC
  *
  * Returned Value:
- *   Valid can device structure reference on succcess; a NULL on failure
+ *   Valid ADC device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/lpc17xx_40xx/lpc17_40_can.c

@@ -1213,13 +1213,13 @@ static int can_bittiming(struct up_dev_s *priv)
  * Name: lpc17_40_caninitialize
  *
  * Description:
- *   Initialize the selected can port
+ *   Initialize the selected CAN port
  *
  * Input Parameters:
- *   Port number (for hardware that has mutiple can interfaces)
+ *   Port number (for hardware that has multiple CAN interfaces)
  *
  * Returned Value:
- *   Valid can device structure reference on succcess; a NULL on failure
+ *   Valid CAN device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/lpc17xx_40xx/lpc17_40_can.h

@@ -69,13 +69,13 @@ extern "C"
  * Name: lpc17_40_caninitialize
  *
  * Description:
- *   Initialize the selected can port
+ *   Initialize the selected CAN port
  *
  * Input Parameters:
- *   Port number (for hardware that has mutiple can interfaces)
+ *   Port number (for hardware that has multiple CAN interfaces)
  *
  * Returned Value:
- *   Valid can device structure reference on succcess; a NULL on failure
+ *   Valid CAN device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/lpc17xx_40xx/lpc17_40_dac.c

@@ -187,7 +187,7 @@ static int dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg)
  *   Initialize the DAC
  *
  * Returned Value:
- *   Valid dac device structure reference on succcess; a NULL on failure
+ *   Valid DAC device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/lpc17xx_40xx/lpc17_40_dac.h

@@ -72,7 +72,7 @@ extern "C"
  *   Initialize the DAC
  *
  * Returned Value:
- *   Valid dac device structure reference on succcess; a NULL on failure
+ *   Valid DAC device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/lpc17xx_40xx/lpc17_40_i2c.h

@@ -61,7 +61,7 @@
  *   Port number (for hardware that has multiple I2C interfaces)
  *
  * Returned Value:
- *   Valid I2C device structure reference on succcess; a NULL on failure
+ *   Valid I2C device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/lpc17xx_40xx/lpc17_40_spi.c

@@ -519,10 +519,10 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
  *   Initialize the selected SPI port.
  *
  * Input Parameters:
- *   Port number (for hardware that has mutiple SPI interfaces)
+ *   Port number (for hardware that has multiple SPI interfaces)
  *
  * Returned Value:
- *   Valid SPI device structure reference on succcess; a NULL on failure
+ *   Valid SPI device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/lpc17xx_40xx/lpc17_40_spi.h

@@ -79,10 +79,10 @@ struct spi_dev_s; /* Forward reference */
  *   Initialize the selected SPI port.
  *
  * Input Parameters:
- *   Port number (for hardware that has mutiple SPI interfaces)
+ *   Port number (for hardware that has multiple SPI interfaces)
  *
  * Returned Value:
- *   Valid SPI device structure reference on succcess; a NULL on failure
+ *   Valid SPI device structure reference on success; a NULL on failure
  *
  ************************************************************************************/
 

arch/arm/src/lpc17xx_40xx/lpc17_40_ssp.c

@@ -769,7 +769,7 @@ static void ssp_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
  *   None
  *
  * Returned Value:
- *   Valid SPI device structure reference on succcess; a NULL on failure
+ *   Valid SPI device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 
@@ -823,7 +823,7 @@ static inline FAR struct lpc17_40_sspdev_s *lpc17_40_ssp0initialize(void)
  *   None
  *
  * Returned Value:
- *   Valid SPI device structure reference on succcess; a NULL on failure
+ *   Valid SPI device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 
@@ -877,7 +877,7 @@ static inline FAR struct lpc17_40_sspdev_s *lpc17_40_ssp1initialize(void)
  *   None
  *
  * Returned Value:
- *   Valid SPI device structure reference on succcess; a NULL on failure
+ *   Valid SPI device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 
@@ -931,10 +931,10 @@ static inline FAR struct lpc17_40_sspdev_s *lpc17_40_ssp2initialize(void)
  *   Initialize the selected SSP port.
  *
  * Input Parameters:
- *   Port number (for hardware that has mutiple SPI interfaces)
+ *   Port number (for hardware that has multiple SPI interfaces)
  *
  * Returned Value:
- *   Valid SPI device structure reference on succcess; a NULL on failure
+ *   Valid SPI device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/lpc17xx_40xx/lpc17_40_ssp.h

@@ -62,10 +62,6 @@ extern "C"
 {
 #endif
 
-/************************************************************************************
- * Public Data
- ************************************************************************************/
-
 /************************************************************************************
  * Public Functions
  ************************************************************************************/
@@ -77,10 +73,10 @@ extern "C"
  *   Initialize the selected SSP port.
  *
  * Input Parameters:
- *   Port number (for hardware that has mutiple SPI interfaces)
+ *   Port number (for hardware that has multiple SPI interfaces)
  *
  * Returned Value:
- *   Valid SPI device structure reference on succcess; a NULL on failure
+ *   Valid SPI device structure reference on success; a NULL on failure
  *
  ************************************************************************************/
 

arch/arm/src/lpc214x/lpc214x_spi.h

@@ -151,14 +151,6 @@
 
 #define LPC214X_SPI1_FIFOSZ      (8)
 
-/************************************************************************************
- * Public Types
- ************************************************************************************/
-
-/************************************************************************************
- * Inline Functions
- ************************************************************************************/
-
 /************************************************************************************
  * Public Function Prototypes
  ************************************************************************************/
@@ -172,10 +164,10 @@ struct spi_dev_s; /* Forward reference */
  *   Initialize the selected SPI port
  *
  * Input Parameters:
- *   Port number (for hardware that has mutiple SPI interfaces)
+ *   Port number (for hardware that has multiple SPI interfaces)
  *
  * Returned Value:
- *   Valid SPI device structre reference on succcess; a NULL on failure
+ *   Valid SPI device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/lpc2378/lpc23xx_i2c.h

@@ -167,7 +167,7 @@
  *   Port number (for hardware that has multiple I2C interfaces)
  *
  * Returned Value:
- *   Valid I2C device structure reference on succcess; a NULL on failure
+ *   Valid I2C device structure reference on success; a NULL on failure
  *
  ************************************************************************************/
 

arch/arm/src/lpc31xx/lpc31.h

@@ -177,10 +177,10 @@ void lpc31_clockconfig(void);
  *   Initialize the selected SPI port
  *
  * Input Parameters:
- *   Port number (for hardware that has mutiple SPI interfaces)
+ *   Port number (for hardware that has multiple SPI interfaces)
  *
  * Returned Value:
- *   Valid SPI device structure reference on succcess; a NULL on failure
+ *   Valid SPI device structure reference on success; a NULL on failure
  *
  ************************************************************************************/
 

arch/arm/src/lpc31xx/lpc31_i2c.h

@@ -210,7 +210,7 @@
  *   Port number (for hardware that has multiple I2C interfaces)
  *
  * Returned Value:
- *   Valid I2C device structure reference on succcess; a NULL on failure
+ *   Valid I2C device structure reference on success; a NULL on failure
  *
  ************************************************************************************/
 

arch/arm/src/lpc31xx/lpc31_spi.c

@@ -904,10 +904,10 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *rxbuffer, size_t
  *   Initialize the selected SPI port
  *
  * Input Parameters:
- *   Port number (for hardware that has mutiple SPI interfaces)
+ *   Port number (for hardware that has multiple SPI interfaces)
  *
  * Returned Value:
- *   Valid SPI device structure reference on succcess; a NULL on failure
+ *   Valid SPI device structure reference on success; a NULL on failure
  *
  ************************************************************************************/
 

arch/arm/src/lpc43xx/lpc43_adc.h

@@ -80,7 +80,7 @@ extern "C"
  *   Initialize the adc
  *
  * Returned Value:
- *   Valid can device structure reference on succcess; a NULL on failure
+ *   Valid can device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/lpc43xx/lpc43_can.c

@@ -1207,13 +1207,13 @@ static int can_bittiming(struct up_dev_s *priv)
  * Name: lpc43_caninitialize
  *
  * Description:
- *   Initialize the selected can port
+ *   Initialize the selected CAN port
  *
  * Input Parameters:
- *   Port number (for hardware that has mutiple can interfaces)
+ *   Port number (for hardware that has multiple CAN interfaces)
  *
  * Returned Value:
- *   Valid can device structure reference on succcess; a NULL on failure
+ *   Valid CAN device structure reference on success; a NULL on failure
  *
  ****************************************************************************/
 

arch/arm/src/lpc43xx/lpc43_can.h

@@ -62,13 +62,13 @@ extern "C"
  * Name: lpc43_caninitialize
  *
  * Description:
- *   Initialize the selected can port
+ *   Initialize the selected CAN port
  *
  * Input Parameters:
- *   Port number (for hardware that has mutiple can interfaces)
+ *   Port number (for hardware that has multiple CAN interfaces)
  *
  * Returned Value:
- *   Valid can device structure reference on succcess; a NULL on failure
+ *   Valid CAN device structure reference on success; a NULL on failure
  *
  ****************************************************************************/